UART Interfacing
UART Interfacing
Theory:
Communication is an important tool in our day to day life. It is basically done in two
ways namely: Serial Communication & Parallel Communication.
Serial Communication is transmitting single bit at a time. It can be achieved Synchronously or
Asynchronously. Hence, there is corresponding module for each mode. i.e. USART or UART.
UART:
It stands for Universal Asynchronous Receiver Transmitter.
In case of LPC2148 (ARM7 microcontroller), there are two UART’s present on chip UART0 &
UART1.In addition to standard Transmit & Receive Data lines, UART1 also supports “Full
Modem Control Handshake Interface.”
UART0:
It has only two pins: Serial Transmit Data (TxD0) as output pin & Serial Receive Data
(TxD0) as input pin. The pins are on Port0.0 & P0.1 respectively included as second
functionality on pins along with GPIO functionality as 1st .
1) U0RBR & U0THR are registers used for holding data on which operations are to be
performed.
2) U0DLL & U0DLM are used to determine the Baud Rate of the Transmission.
3) U0FDR bits 7:0 are used for fractional generator enabling. (AddDivVal & MulVal)
4) UOLSR is used to check the status of UORBR & UOTHR registers. i.e. if they contain
valid data or not.
5) UOFCR bit 0 = 1 => Enable UART0
= 0 => Disable UART0
6) UOLCR is used to give access to U0DLL & U0DLM registers for Baud Rate setting by
configuring bit 7. U0LCR is also used to set the word length with help of bits 1:0.
7) U0TER bit 7 = 1 => Data in U0THR is sent to TxD pin
= 0 => Data is not transmitted.
Baud Rate Calculation: The Baud Rate can be calculated using the following formula:
PCLK
UART0baud rate = 16∗( 256∗UODLM +UODLL )∗ 1+ ( DivAddVal
MulVal )
Where PCLK = Peripheral Clock;
UODLL & UODLM = Standard Baud Rate Registers;
DivAddVal & MulVal = Fractional Baud Rate Generator Parameters;
NB.: Check the U0LSR register for status of U0THR & U0RBR. If it is empty, then transfer the
data. Else, wait till it becomes empty.
UART1:
It is same as UART0 but has additional Pins for MODEM Interfacing. The additional
pins include CTS, DCD, DSR, DTR, RI, RTS.
Interfacing Diagram:
TxD0
MA
11 X2 14
P0.0
UAR 32 HyperTerminal
Or
T0 P0.1 TeraTerminal
12 13
LPC2148 RxD0
LPC2148
LLPP C
C22 11 4488
Conclusion:
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Baudrate Calculation:
Equation 1:
Taking Baudrate of 115200;
if(BaudRate >=115200 && BaudRate < 460800 )
{
U0FDR |= (1<<0); // DIVADDVAL
U0FDR |= (12<<4); // MULVAL
}
Note: The Table 167 on Pg. 152 of LPC2148 user manual is for PCLK = 20MHz (But in our
case we have 12 MHz so values of MulVal and DivAddVal is different and have to
manually calculate)