UNIT III FEEDBACK AND SINGLE STAGE OPERATIONAL AMPLIFIERS

Properties and types of negative feedback circuits, effect of loading in feedback

networks, operational amplifier performance parameters, single stage Op Amps, two-
stage Op Amps, input range limitations, gain boosting, slew rate, power supply
rejection, noise in Op Amps.

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General Considerations:
Figure 8.1 shows a negative-feedback system, where H(s) and G(s) are called the
feedforward and the feedback networks, respectively. Since the output of G(s) is equal to
G(s)Y (s), the input to H(s), called the feedback error, is given by X(s) − G(s)Y (s). That is

Y (s) = H(s)[X(s) − G(s)Y (s)] (8.1)

Thus,

We call H(s) the “open-loop” transfer function and Y (s)/X(s) the “closed-loop” transfer
function. In most cases of interest in this book, H(s) represents an amplifier and G(s) is a
frequency-independent quantity. In other words, a fraction of the output signal is sensed and
compared with the input, generating an error term. In a well-designed negative-feedback
system, the error term is minimized, thereby making the output of G(s) an accurate “copy” of
the input and hence the output of the system a faithful (scaled) replica of the input (Fig.
8.2).We also say that the input of H(s) is a “virtual ground” because the signal amplitude at
this point is small. In subsequent developments, we replace G(s) by a frequency-independent
quantity β and call it the “feedback factor.” It is instructive to identify four elements in the
feedback system of Fig. 8.1: (1) the feedforward amplifier, (2) a means of sensing the output,
(3) the feedback network, and (4) a means of generating the feedback error, i.e., a subtractor
(or an adder). These elements exist in every feedback system, even though they may not be
obvious in cases such as a simple common-source stage with resistive degeneration.

1. Properties of Feedback Circuits

i)Gain Desensitization Consider the common-source stage shown in Fig. 8.3(a), where the
voltage gain is equal to gm1rO1. A critical drawback of this circuit is the poor definition of the
gain: both gm1 and rO1 vary with process and temperature. Now suppose the circuit is
configured as in Fig. 8.3(b), where the gate bias of M1 is set by means not shown here . The
overall voltage gain of the circuit at relatively low frequencies such that C2 draws a negligible
(small-signal) current from the output node, i.e., Vout/VX = −gm1rO1 because the entire drain
current flows through rO1. Since (Vout − VX )C2s = (VX − Vin)C1s, we have

If gm1rO1 is sufficiently large, the 1/(gm1rO1) terms in the denominator can be neglected,
yielding

where we have assumed that β A> 1. We note that the closed-loop gain is determined, to the
first order by the feedback factor, β. More important, even if the open-loop gain, A, varies by
a factor of, say, 2, Y/X varies by a small percentage because 1/(β A)<1.
ii)Terminal Impedance Modification
As shown in Fig. 8.8(a), where a capacitive voltage divider senses the output voltage
of a common-gate stage, applying the result to the gate of current source M2 and hence
returning a signal to the input. Our objective is to compute the input resistance at relatively
low frequencies with and without feedback. Neglecting channel length modulation and the
current drawn by C1, we break the feedback loop as shown in Fig. 8.8(b) and write

Thus, the small-signal drain current of M2 equals gm2(gm1 + gmb1)VX RDC1/(C1 + C2).
Adding this current to the drain current of M1 with proper polarity yields IX :

We therefore conclude that this type of feedback reduces the input resistance by a factor of 1
+
gm2RDC1/(C1 + C2). The reader can prove that the quantity gm2RDC1/(C1 + C2) is the loop
gain.Let us now consider the circuit of Fig. 8.9(a) as an example of output impedance
modification by feedback. Here M1, RS, and RD constitute a common-source stage and C1,C2,
and M2 sense the output voltage,4 returning a current equal to [C1/(C1 + C2)]Voutgm2 to the
source of M1. The reader can prove that the feedback is indeed negative. To compute the
output resistance at relatively low frequencies, we set the input to zero [Fig. 8.9(b)] and write

iii)Bandwidth Modification. The effect of negative feedback on the bandwidth. The

feedforward amplifier has a one-pole transfer function:
The numerator of (8.21) is simply the closed-loop gain at low frequencies—as predicted by
(8.5)—and the denominator reveals a pole at (1 + β A0)ω0. Thus, the 3-dB bandwidth has
increased by a factor of 1 + β A0, albeit at the cost of a proportional reduction in the gain (Fig.
8.10).

2. Types of Amplifiers
Most of the circuits studied thus far can be considered “voltage amplifiers” because
they sense a voltage at the input and produce a voltage at the output. However, three other
types of amplifiers can also be constructed such that they sense or produce currents. Shown in
Fig. 8.13, the four configurations have quite different properties: (1) circuits sensing a voltage
must exhibit a high input impedance (a voltmeter measures a voltage with minimal loading)
whereas those sensing a current must provide a low input impedance (a current meter inserted
in a wire must negligibly disturb the current); (2) circuits generating a voltage must exhibit a
low output impedance (as a voltage source) while those generating a current must provide a
high output impedance (as a current source). Note that the gains of transimpedance and
transconductance amplifiers have a dimension of resistance and conductance, respectively.
For example,a transimpedance amplifier may have a gain of 2 k_, which means that it
produces a 2-V output in response to a 1-mA input. Also, we use the sign conventions
depicted in Fig. 8.13; for example, the transimpedance R0 = Vout/Iin if Iin flows into the
amplifier.
2.1 Voltage-Voltage Feedback
This topology senses the output voltage and returns the feedback signal as a voltage.
Following the conceptual illustrations of below Figs.we note that the feedback network is
connected in parallel with the output and in series with the input port (Fig. 8.21). An ideal
feedback network in this case exhibits infinite input impedance and zero output impedance
because it senses a voltage and generates a voltage. We can therefore write VF = βVout, Ve =
Vin − VF , Vout = A0(Vin − βVout), and hence

We recognize that β A0 is the loop gain and that the overall gain has dropped by 1+β A0. Note
that here both A0 and β are dimensionless quantities. As a simple example of voltage-voltage
feedback, suppose we employ a differential voltage amplifier with single-ended output as the
feedforward amplifier and a resistive divider as the feedback network .

Let us first consider the output impedance. Recall that a negative-feedback system attempts to
make the output an accurate (scaled) replica of the input. Now suppose, as shown in Fig.
8.23, we load the output by a resistor RL , gradually decreasing its value. While in the open-
loop configuration, the output would simply drop in proportion to RL/(RL + Rout), in the
feedback system, Vout is maintained as a reasonable replica of Vin even though RL decreases.
That is, so long as the loop gain remains much greater than unity, Vout/Vin ≈ 1/β, regardless
of the value of RL . since the circuit stabilizes (“regulates”) the output voltage amplitude
despite load variations, it behaves as a voltage source, thus exhibiting a low output
impedance.

This property fundamentally originates from the gain desensitization provided by feedback.In
order to formally prove that voltage feedback lowers the output impedance, we consider the
simple model in Fig. 8.24, where Rout represents the output impedance of the feedforward
amplifier. Setting the input to zero and applying a voltage at the output, we write VF = βVX ,
Ve = −βVX , VM = −β A0VX , and hence IX = [VX − (−β A0VX )]/Rout (if the current drawn by the
feedback network is neglected). It follows that

Thus, the output impedance and the gain are lowered by the same factor.Voltage-voltage
feedback also modifies the input impedance. Comparing the configurations in Fig. 8.27,we
note that the input impedance of the feedforward amplifier sustains the entire input voltage in
Fig. 8.27(a), but only a fraction of Vin in Fig. 8.27(b). As a result, the current drawn by Rin in
the feedback topology is less than that in the open-loop system, suggesting that returning a
voltage quantity to the input increases the input impedance.

The foregoing observation can be confirmed analytically with the aid of Fig. 8.28. Since Ve =
IX Rin and VF = β A0 IX Rin, we have Ve = VX − VF = VX − β A0 IX Rin. Thus, IX Rin = VX − β A0
IX Rin, and

The input impedance therefore increases by the ubiquitous factor 1 + β A0.

2.2 Current-Voltage Feedback
In some circuits, it is desirable or simpler to sense the output current to perform feedback.
The current is actually sensed by placing a (preferably small) resistor in series with the output
and using the voltage drop across the resistor as the feedback information. This voltage may
even serve as the return signal that is directly subtracted from the input.

Let us consider the general current-voltage feedback system in Fig. Since the feedback
network senses the output current and returns a voltage, its feedback factor, β, has the
dimension of resistance and is denoted by RF . It is important to note that a Gm stage must be
loaded (“terminated”) by a finite impedance, ZL , to ensure that it can deliver its output
current. If ZL = ∞, then an ideal Gm stage would sustain an infinite output voltage. We write
VF = RF Iout, Ve = Vin − RF Iout, and hence Iout = Gm(Vin − RF Iout). It follows that

Sensing the current at the output of a feedback system increases the output impedance. This
is because the system attempts to make the output current a faithful replica of the input signal
Consequently, the system delivers the same current waveform as the load varies, in essence
approaching an ideal current source and hence exhibiting a high output impedance.

To prove the above result, we consider the current-voltage feedback topology shown in Fig.
where Rout represents the finite output impedance of the feedforward amplifier. The
feedback network produces a voltage VF proportional to IX :VF = RF IX , and the current
generated by Gm equals −RF IXGm. As a result, −RF IXGm = IX − VX /Rout, yielding
The output impedance therefore increases by a factor of 1 + Gm RF .As with voltage-voltage
feedback, current-voltage feedback increases the input impedance by a factor equal to one
plus the loop gain. As illustrated in Fig. 8.34, we have IX RinGm = Iout. Thus, Ve =VX − Gm RF
IX Rin and

2.3 Voltage-Current Feedback

In this type of feedback, the output voltage is sensed and a proportional current is
returned to the summing point at the input.The feedforward path incorporates a
transimpedance amplifier with gain R0 and the feedback factor has a dimension of
conductance.
A voltage-current feedback topology is shown in Fig. Sensing a voltage and
producing a current, the feedback network is characterized by a transconductance gmF, ideally
exhibiting infinite input and output impedances. Since IF = gmFVout and Ie = Iin − IF, we have
Vout = R0 Ie = R0(Iin − gmFVout).
It follows that

It prove that gmF R0 is indeed the loop gain, concluding that this type of feedback lowers the
transimpedance by a factor equal to one plus the loop gain.

Voltage current feedback decreases both the input and the output impedances. As shown in
Fig., the input resistance of R0 appears in series with its input port.We write IF = IX−VX /Rin
and (VX /Rin)R0gmF = IF . Thus,

we have IF = VX gmF, Ie = −IF , and VM = −R0gmFVX . Neglecting the input current of the
feedback network, we write IX = (VX − VM)/Rout = (VX + gmF R0VX )/Rout.
That is
2.4 Current-Current Feedback
The feedforward amplifier is characterized by a current gain, AI , and the feedback network
by a current ratio, β. In a fashion similar to the previous derivations, the reader can easily
prove that the closed-loop current gain is equal to AI /(1 + β AI ), the input impedance is
divided by 1 + β AI and the output impedance is multiplied by 1 + β AI .

3. Effect of Loading
The problem of loading manifests itself when we need to break the feedback loop so as to
identify the open-loop system, e.g., calculate the open-loop gain and the input and output
impedances. To arrive at the proper procedure for including the feedback network terminal
impedances, we first review models of two-port networks.

3.1 Two-Port Network Models

. The feedback network placed around the feedforward amplifier can be considered a
two-port circuit sensing and producing voltages or currents. That a two-port linear (and time-
invariant) network can be represented by any of the four models shown in Fig. 8.50. The “Z
model” in Fig. 8.50(a) consists of input and output impedances in series with current-
dependent voltage sources, whereas the “Y model” in Fig. 8.50(b) comprises input and output
admittances in parallel with voltage-dependent current sources.
The “hybrid models” of Figs. 8.50(c) and (d) incorporate a combination of
impedances and admittances and voltage sources and current sources. Each model is
described by two equations. For the Z model, we have

Each Z parameter has a dimension of impedance and is obtained by leaving one port open,
e.g., Z11 = V1/I1 when I2 = 0. Similarly, for the Y model,
3.2 Loading in Voltage-Voltage Feedback
The Z and H models fail to represent voltage amplifiers if the input current is very
Small as in a simple CS stage.We therefore choose the G model here.The complete
equivalent circuit is shown in Fig. (a), where the forward and feedback network parameters
are denoted by upper-case and lower-case letters, respectively. Since the input port of the
feedback network is connected to the output port of the forward amplifier, g11 and g12 Iin are
tied to Vout.
It is possible to solve this circuit exactly, but we simplify the analysis by neglecting
two quantities: the amplifier’s internal feedback, G12Vout, and the “forward” propagation of
the input signal through the feedback network, g12 Iin. In other words, the loop is
“unilateralized.” Figure (b) depicts the resulting circuit with our intuitive amplifier notations
(Zin, Zout, A0) added to indicate equivalencies. Let us first directly compute the closed-loop
voltage gain. Recognizing that g11 is an admittance and g22 an impedance, we write a KVL
around the input network and a KCL at the output node:
The open loop gain is

The loaded forward amplifier now emerges as shown in Fig.. This model excludes the two
generators G12Vout and g12 Iin, which are generally not negligible.

It is obtained by leaving the output of the feedback network open whereas g22 is calculated by
shorting the input of the feedback network. Thus, a separate calculation of the loop gain is
not necessary. Also, the open-loop input and output impedances obtained from Fig. are scaled
by 1+ g21Av,open to yield the closed-loop values.

2.3 Loading in Current-Voltage Feedback

The feedback network appears in series with the output so as to sense the current. We
represent the forward amplifier and the feedback network by Y and Z models, respectively
Fig. , neglecting the generators Y12Vout and z12 Iin. We wish to compute the closed-loop gain,
Iout/Vin, and there from determine how the open-loop parameters can be obtained in the
presence of loading. Noting that Iin = Y11Ve and I2 = Iin, we write two KVLs:
The open loop gain is

Note that Y21 is in fact the transconductance gain, Gm, of the original amplifier. The two
attenuation factors (1 + z22Y11) −1 and (1 + z11Y22)−1 respectively correspond to voltage
division at the input and current division at the output, allowing us to construct the loaded
open-loop forward amplifier as shown in Fig. Since z22 = V2/I2 with I1 = 0 and z11 = V1/I1 with
I2 = 0, we arrive at the conceptual picture depicted in Fig.for properly breaking the feedback.
Note that the loop gain is equal to z21Gm,open.
3.4 Loading in Voltage-Current Feedback
The forward (transimpedance) amplifier generates an output voltage in response to
the input current and can thus be represented by a Z model. Sensing the output voltage and
returning a proportional current, the feedback network lends itself to a Y model. The
equivalent circuit is shown in Fig. where the effect of Z12 and y12 is neglected. we compute
the closed-loop gain, Vout/Iin, by writing two equations:

Thus, the equivalent open-loop gain and feedback factor are given by

Interpreting the attenuation factors in R0,open as current division at the input and voltage
division at the output, we arrive at the conceptual view in Fig. The loop gain is given by
y21R0,open.
3.5 Loading in Current-Current Feedback
The forward amplifier in this case generates an output current in response to the input
current and can be represented by an H model, and so can the feedback network. Shown in
Fig. is the equivalent circuit with the H12 and h12 generators neglected. We write
As in previous topologies, we define the equivalent open-loop current gain and the feedback
factor as

The conceptual view of the broken loop is depicted in Fig. and the loop gain is equal to
h21AI,open.

4.Operational Amplifier
An op amp as a “high-gain differential amplifier.” By “high,” we mean a value that is
adequate for the application, typically in the range of 101 to 105. Since op amps are usually
employed to implement a feedback system, their open-loop gain is chosen according to the
precision required of the closed-loop circuit.
Most op amps were designed to serve as “general-purpose” building blocks,satisfying
the requirements of many different applications. Such efforts sought to create an “ideal” op
amp, e.g., with a very high voltage gain (several hundred thousand), high input impedance,
and low output impedance, but at the cost of many other aspects of the performance, e.g.,
speed, output voltage swings, and power dissipation.
Op amp design proceeds with the recognition that the trade-offs between the
parameters eventually require a multi dimensional compromise in the overall implementation,
making it necessary to know the adequate value that must be achieved for each parameter.

4.1 Performance Parameters

Consider the differential cascode circuit shown in Fig. as a representative op amp
design
Gain :
The open-loop gain of an op amp determines the precision of the feedback system
employing the op amp. As mentioned before, the required gain may vary by four orders of
magnitude according to the application. Trading with such parameters as speed and output
voltage swings, the minimum required gain must therefore be known.A high open-loop gain
may also be necessary to suppress nonlinearity.
While it is possible to obtain a nominal gain of gm RD = 10 by a common-source
stage, it is extremely difficult to guarantee an error less than 1%. The variations in the
mobility and gate-oxide thickness of the transistor and the value of the resistor typically yield
an error greater than 20%.

Small-Signal Bandwidth :
The high-frequency behavior of op amps plays a critical role in many applications.
For example, as the frequency of operation increases, the open-loop gain begins to drop,
creating larger errors in the feedback system. The small-signal bandwidth is usually defined
as the “unitygain”frequency, fu, which can reach several gigahertz in today’s CMOS op
amps. The 3-dB frequency, f3-dB, may also be specified to allow easier prediction of the
closed-loop frequency response.

Large-Signal Bandwidth:
Op amps must operate with large transient signals. Under these conditions, nonlinear
phenomena make it difficult to characterize the speed merely by small-signal properties such
as the open-loop response .The feedback circuit incorporates a realistic op amp (i.e., with
finite output impedance) while driving a large load capacitance.

Output Swing :
Most systems employing op amps require large voltage swings to accommodate a
wide range of signal amplitudes. For example, a high-quality microphone that senses the
music produced by an orchestra may generate instantaneous voltages that vary by more than
four orders of magnitude, demanding that subsequent amplifiers and filters handle large
swings (and/or achieve a low noise).The need for large output swings has made fully
differential op amps popular. such op amps generate “complementary” outputs, roughly
doubling the available swing.

Linearity :
Open-loop op amps suffer from substantial nonlinearity. In the CS circuit ,the input
pair M1–M2 exhibits a nonlinear relationship between its differential drain current and its
input voltage., the issue of nonlinearity is tackled by two approaches: using fully
differential implementations to suppress even-order harmonics and allowing sufficient open-
loop gain for the closed-loop feedback system to achieve adequate linearity. It is interesting
to note that in many feedback circuits, the linearity requirement, rather than the gain error
requirement, governs the choice of the open-loop gain.
Noise and Offset :
The input noise and offset of op amps determine the minimum signal level that can
be processed with reasonable quality. In a typical op amp topology, several devices
contribute noise and offset, necessitating large dimensions or bias currents. We should also
recognize a trade-off between noise and output swing. For a given bias current, as the
overdrive voltage of M7 and M8 in CS amplifier circuit is lowered to allow larger swings at
the output, their transconductance increases and so does their drain noise current.

Supply Rejection:
Op amps are often employed in mixed-signal systems and sometimes connected to
noisy digital supply lines. Thus, the performance of op amps in the presence of supply noise,
especially as the noise frequency increases, is important. For this reason, fully differential
topologies are preferred.

5. One-Stage Op Amps
5.1 Basic Topologies
The below Fig shows two such topologies with single-ended and differential outputs.
The small-signal, low-frequency gain of both circuits is equal to gmN(rON//rOP), where the
subscripts N and P denote NMOS and PMOS, respectively.This value hardly exceeds 10 in
nanometer technologies. The bandwidth is usually determined by the load capacitance, CL .
Note that the circuit of Fig. 9.6(a) exhibits a mirror pole whereas that of Fig. 9.6(b) does not,
a critical difference in terms of the stability of feedback systems using these topologies .

In order to achieve a high gain, the differential cascode topologies can be used. Shown in
Figs. 9.8(a) and (b) for single-ended and differential output generation, respectively, such
circuits display a gain on the order of gmN[(gmNr 2ON)_(gmPr 2OP)], but at the cost of output
swing and additional poles. These configurations are also called “telescopic” cascode op
amps to distinguish them from another cascode op amp described below.
Another drawback of telescopic cascodes is the difficulty in shorting their inputs and outputs,
e.g., to implement a unity-gain. To understand the issue, let us consider the unity-gain
feedback topology shown in Fig. 9.9. Under the conditions of both M2 and M4 in
Saturation.We must have Vout ≤ VX +VT H2 and Vout ≥ Vb−VT H4. Since VX = Vb−VGS4, Vb−VT
H4 ≤Vout ≤ Vb − VGS4 + VT H2.

In order to alleviate the drawbacks of telescopic cascode op amps, namely, limited

output swings and difficulty in choosing equal input and output CM levels, a “folded-
cascode” op amp can be used. In an NMOS or PMOS cascode amplifier, the input device is
replaced by the opposite type while still converting the input voltage to a current.
In the four circuits shown in Fig. 9.13, the small-signal current generated by M1 flows
through M2 and subsequently the load, producing an output voltage approximately equal to
gm1RoutVin. The primary advantage of the folded structure lies in the choice of the voltage
levels because it does not “stack” the cascode transistor on top of the input device.
The folding idea depicted in Fig. 9.13 can easily be applied to differential pairs, and
hence to operational amplifiers as well. Shown in Fig. 9.14, the resulting circuit replaces the
input NMOS pair with a PMOS counterpart. Note two important differences between the two
circuits. In Fig. 9.14(a), one bias current, ISS, provides the drain current of both the input
transistors and the cascode devices, whereas in Fig. 9.14(b),the input pair requires an
additional bias current. In other words, ISS1 = ISS/2+ ID3 = ISS/2+ I1. Thus, the folded-cascode
configuration generally consumes more power. (2) In Fig. 9.14(a), the input CM level cannot
exceed Vb1 − VGS3 + VT H1, whereas in Fig. 9.14(b), it cannot be less than Vb1 − VGS3 − |VT HP|.
It is therefore possible to design the latter to allow shorting its input and output
terminals with negligible swing limitation.In Fig. 9.14(b), it is possible to tie the n-wells of
M1 and M2 to their common source point

To achieve a higher gain, additional cascode devices can be inserted in each branch. A triple
cascade provide a gain in the order of gmro3/2 but further limit the output swings. With six
overdrive voltage subtracted from VDD in the circuit it is difficult to operate the amplifier
from a supply voltage of 3V or lower to obtain the output voltage swings.
6. Two-Stage Op Amps
The op amps studied thus far exhibit a “one-stage” nature in that they allow the small-
signal current produced by the input pair to flow directly through the output impedance, i.e.,
they perform voltage-to current conversion only once. The gain of these topologies is
therefore limited to the product of the input pair transconductance and the output impedance.
We have also observed that cascoding in such circuits increases the gain while limiting the
output swings.
In some applications, the gain and/or the output swings provided by cascode op amps
are not adequate. For example, a modern op amp must operate with supply voltages as low as
0.9 V while delivering single ended output swings as large as 0.8 V. In such cases, we resort
to “two-stage” op amps, with the first stage providing a high gain and the second, large
swings (Fig. 9.22). In contrast to cascode op amps, a two-stage configuration isolates the gain
and swing requirements.

The second stage is typically configured as a simple common-source stage so as to

allow maximum output swings. Figure 9.23 shows an example, where the first and second
stages exhibit gains equal to gm1,2(rO1,2//rO3,4) and gm5,6(rO5,6//rO7,8), respectively. The overall
gain is therefore comparable to that of a cascode op amp, but the swing at Vout1 and Vout2 is
equal to VDD − |VOD5,6| − VOD7,8, the highest possible value.
To obtain a higher gain, the first stage can incorporate cascode devices, as depicted in
Fig. 9.24.With a gain of, say, 10 in the output stage, the voltage swings at X and Y are quite
small, allowing optimization of M1–M8 for higher gain. The overall voltage gain can be
expressed as

A two-stage op amp can provide a single-ended output. One method is to convert the
differential currents of the two output stages to a single-ended voltage. Illustrated in Fig.
9.25, this approach maintains the differential nature of the first stage, using only the current
mirror M7–M8 to generate a single-ended output.
6.1 Gain Boosting
The limited gain of the one-stage op amps and the difficulties in using two-stage op
amps at high speeds have motivated extensive work on new topologies. In one-stage op amps,
such as telescopic and folded-cascode topologies, the objective is to maximize the output
impedance so as to attain a high voltage gain. The idea behind gain boosting is to further
increase the output impedance without adding more cascode devices .
6.2 Input Range Limitations
The op amp circuits studied thus far have evolved to achieve large differential output
swings. While the differential input swings are usually much smaller (by a factor equal to the
open-loop gain), the input common-mode level may need to vary over a wide range in some
applications. For example, consider the simple unity-gain buffer shown in Fig. 9.65, where
the input swing is nearly equal to the output swing.
The voltage swings are limited by the input differential pair rather than the output
cascode branch. Specifically, Vin,min ≈ Vout,min = VGS1,2 + VI SS, approximately one threshold
voltage higher than the allowable minimum provided by M5–M8.
 If Vin falls belowthe minimum given above? The MOS transistor operating as ISS
enters the triode region, decreasing the bias current of the differential pair and hence lowering
the transconductance. We then postulate that the limitation is overcome if the
transconductance can somehow be restored.
A simple approach to extending the input CM range is to incorporate both NMOS and
PMOS differential pairs such that when one is “dead,” the other is “alive.” In Fig. 9.66, the
idea is to combine two folded-cascode op amps with NMOS and PMOS input differential
pairs. Here, as the input CM level approaches the ground potential, the NMOS pair’s
transconductance drops, eventually falling to zero. Nonetheless, the PMOS pair remains
active, allowing normal operation. Conversely, if the input CM level approaches VDD, M1P
and M2P begin to turn off, but M1 and M2 function properly.
An important concern in the circuit of Fig. 9.66 is the variation of the overall
transconductance of the two pairs as the input CM level changes. Considering the operation
of each pair, we anticipate the behavior depicted in Fig. 9.67. Thus, many properties of the
circuit, including gain, speed, and noise,vary.
6.3 Slew Rate
Op amps used in feedback circuits exhibit a large-signal behavior called “slewing.”
We first describe an interesting property of linear systems that vanishes during slewing.
Consider the simple RC network shown in Fig. 9.68, where the input is an ideal voltage step
of height V0. Since Vout = V0[1−exp(−t/τ )],where τ = RC, we have

That is, the slope of the step response is proportional to the final value of the output; if
we apply a larger input step, the output rises more rapidly. This is a fundamental property of
linear systems: if the input amplitude is, say, doubled while other parameters remain constant,
the output signal level must double at every point, leading to a twofold increase in the slope.

The foregoing observation applies to linear feedback systems as well. Shown in Fig. 9.69 is
an example, where the op amp is assumed linear. Here, we can write

Assuming R1 + R2 >> Rout, we have

As expected, both the low-frequency gain and the time constant are divided by 1+ AR2/(R1 +
R2). The step response is therefore given by

indicating that the slope is proportional to the final value. This type of response is called
“linear settling.”With a realistic op amp, on the other hand, the step response of the circuit
begins to deviate from (9.61) as the input amplitude increases. in Fig. 9.70, the response to
sufficiently small inputs follows the exponential of Eq. (9.61), but with large input steps, the
output displays a linear ramp having a constant slope. Under this condition, we say that the
op amp experiences slewing and call the slope of the ramp the “slew rate.”

To understand the origin of slewing, let us replace the op amp of Fig. 9.70 by a simple
CMOS implementation (Fig. 9.71), assuming for simplicity that R1 + R2 is very large. We
first examine the circuit with a small input step. If Vin experiences a change of V, ID1
increases by gm_V/2 and ID2 decreases by gm_V/2. Since the mirror action of M3 and M4
raises |ID4| by gm_V/2, the total small signal
current provided by the op amp equals gm_V. This current begins to charge CL , but as Vout
rises,so does VX , reducing the difference between VG1 and VG2 and hence the output current
of the op amp. As a result, Vout varies according to (9.61).

Now suppose _V is so large that M1 absorbs all of ISS, turning off M2. The circuit then reduces
to that shown in Fig. 9.72(a), generating a ramp output with a slope equal to ISS/CL (if the
channel-length modulation of M4 and the current drawn by R1 + R2 are neglected). Note that
so long as M2 remains off, the feedback loop is broken and the current charging CL is constant
and independent of the input level.As Vout rises, VX eventually approaches Vin, M2 turns on,
and the circuit returns to linear operation.
 In Fig. 9.71, slewing occurs for falling edges at the input as well. If the input drops so
much that M1 turns off, then the circuit is simplified as in Fig. 9.72(b), discharging CL by a
current approximately equal to ISS. After Vout decreases sufficiently, the difference between
VX and Vin is small enough to allow M1 to turn on, leading to linear behavior thereafter.
The foregoing observations explain why slewing is a nonlinear phenomenon. If the
input amplitude,say, doubles, the output level does not double at all points because the ramp
exhibits a slope independent of the input.Slewing is an undesirable effect in high-speed
circuits that process large signals. While the small-signal bandwidth of a circuit may suggest
a fast time-domain response, the large-signal speed may be limited by the slew rate simply
because the current available to charge and discharge the dominant capacitor in the circuit is
small. Moreover, since the input-output relationship during slewing is nonlinear, the output
of a slewing amplifier exhibits substantial distortion. For example, if a circuit is to amplify a
sinusoid V0 sin ω0t (in the steady state), then its slew rate must exceed V0ω0.

6.4 Power Supply Rejection

Op amps are often supplied from noisy lines and must therefore “reject” the
noise adequately. For this reason, it is important to understand how noise on the supply
manifests itself at the output of an op amp. Let us consider the simple op amp shown in Fig.
9.81, assuming that the supply voltage varies slowly.
If the circuit is perfectly symmetric, Vout = VX . Since the diode-connected device
“clamps” node X to VDD, VX and hence Vout experience approximately the same change as
does VDD. In other words, the gain from VDD to Vout is close to unity. The power supply
rejection ratio (PSRR) is defined as the gain from the input to the output divided by the gain
from the supply to the output. At low frequencies:
6.5 Noise in Op Amps
In low-noise applications, the input-referred noise of op amps becomes critical.We
now extend the noise analysis of differential amplifiers to more sophisticated topologies.
With many transistors in an op amp, it may seem difficult to intuitively identify the dominant
sources of noise. A simple rule for inspection is to (mentally) change the gate voltage of each
transistor by a small amount and predict the effect at the output.
Let us first consider the telescopic op amp shown in Fig. 9.84. At relatively low
frequencies, the cascode devices contribute negligible noise, leaving M1–M2 and M7–M8 as
the primary noise sources. The input-referred noise voltage per unit bandwidth is therefore
similar to that in Fig. 7.59(a) and given by

where KN and KP denote the 1/ f noise coefficients of NMOS and PMOS devices, respectively

The noise behavior of the folded-cascode op amp of Fig. 9.85(a), considering only thermal
noise at this point. Again, the noise of the cascode devices is negligible at low frequencies,
leaving M1–M2, M7–M8, and M9–M10 as potentially significant sources. Both pairs M7–M8 and
M9–M10 contribute noise? we change the gate voltage of M7 by a small amount [Fig. 9.85(b)],
noting that the output indeed changes considerably. The same observation applies to M8–M10
as well. To determine the input-referred thermal noise, we first refer the noise of M7–M8 to
the output:
where the factor 2 accounts for the (uncorrelated) noise of M7 and M8 and Rout denotes the
open-loop output resistance of the op amp. Similarly,

In applications where flicker noise is critical, we opt for a PMOS-input op amp as PMOS
transistors typically exhibit less flicker noise than do NMOS devices.The noise contribution
of the PMOS and NMOS current sources increases in proportion to their transconductance.
This results in a tradeoff between output voltage swings and input-referred noise: for a given
current, as implied by gm =2ID/(VGS − VT H), if the overdrive voltage of the current sources is
minimized to allow large swings,then their transconductance is maximized.
we calculate the input-referred thermal noise of the two-stage op amp shown in Fig. 9.86.
Beginning with the second stage, we note that the noise current of M5 and M7 flows through
rO5//rO7. Dividing the resulting output noise voltage by the total gain, gm1(rO1//rO3) ×
gm5(rO5//rO7),and doubling the power, we obtain the input-referred contribution of M5–M8:

The noise due to M1–M4 is simply equal to

It follows that