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Computer Architecture

Architectural designs of computer systems using the CPU ALU and the controller which is the control unit

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jimmyiniobong43
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7 views

Computer Architecture

Architectural designs of computer systems using the CPU ALU and the controller which is the control unit

Uploaded by

jimmyiniobong43
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Introduction

- Computer architecture is the design and organization of a computer's internal components

- It defines how the hardware components interact to perform tasks

- Goals: performance, power efficiency, cost-effectiveness, scalability

Components

- *Central Processing Unit (CPU)*: executes instructions

- Arithmetic Logic Unit (ALU): performs calculations

- Registers: small amount of on-chip memory

- Control Unit: manages instruction execution

- Memory: stores data and programs

- Main Memory (RAM): volatile, temporary storage

- Cache Memory: small, fast memory for frequently accessed data

- *Input/Output (I/O) Devices*: interact with users and external devices

- Keyboard, Display, Disk, etc.

- *Bus*: communication pathway between components

- Data Bus: transfers data

- Address Bus: transfers memory addresses

- Control Bus: transfers control signals

*CPU Components*

- *Arithmetic Logic Unit (ALU)*: performs arithmetic and logical operations

- *Registers*:

- Program Counter (PC): stores current instruction address


- Instruction Register (IR): stores current instruction

- Accumulator: stores results of ALU operations

- *Control Unit*:

- Instruction Decoder: decodes instructions

- Instruction Scheduler: schedules instruction execution

*Memory Hierarchy*

- *Main Memory (RAM)*: volatile, temporary storage

- *Cache Memory*:

- L1 Cache: smallest, fastest cache

- L2 Cache: larger, slower cache

- L3 Cache: shared among multiple cores

- *Virtual Memory*:

- Paging: divides memory into fixed-size pages

- Segmentation: divides memory into variable-size segments

*Instruction Set Architecture*

- *Instruction Format*:

- Opcode: specifies instruction operation

- Operands: specifies data or addresses

- *Instruction Types*:

- Data Transfer: moves data between registers or memory

- Arithmetic: performs arithmetic operations


- Control Flow: alters program execution sequence

*Pipelining*

- *Instruction Pipeline*:

- Fetch: retrieves instruction from memory

- Decode: decodes instruction

- Execute: executes instruction

- Memory Access: accesses memory (if necessary)

- Write Back: writes results to registers or memory

- *Stages*: each stage completes a specific task

*Parallel Processing*

- *Multi-Core Processors*:

- multiple processing cores on a single chip

- improves performance and power efficiency

- *Multi-Processing*:

- Symmetric: all processors have equal access to resources

- Asymmetric: processors have different access to resources

*Input/Output Systems*

- *I/O Devices*:

- Keyboard, Display, Disk, etc.


- *I/O Interfaces*:

- UART: serial communication interface

- SPI: serial peripheral interface

- I2C: inter-integrated circuit interface

*Bus Structures*

- *Bus Types*:

- Serial: data transferred one bit at a time

- Parallel: data transferred multiple bits at a time

- *Bus Protocols*:

- PCI: peripheral component interconnect

- USB: universal serial bus

- SCSI: small computer system interface

Let me know if you have any specific questions or if there's anything else I can help with!Here are some
notes on Computer Architecture:

*Introduction*

- Computer architecture refers to the design and organization of a computer's internal components

- It defines how the hardware components interact to perform tasks

*Components*

- Central Processing Unit (CPU)


- Memory (Main Memory, Cache Memory)

- Input/Output (I/O) Devices

- Bus (Data, Address, Control)

*CPU Components*

- Arithmetic Logic Unit (ALU)

- Registers (Program Counter, Instruction Register, Accumulator)

- Control Unit

*Memory Hierarchy*

- Main Memory (RAM)

- Cache Memory (L1, L2, L3)

- Virtual Memory (Paging, Segmentation)

*Instruction Set Architecture*

- Instruction Format (Opcode, Operands)

- Instruction Types (Data Transfer, Arithmetic, Control Flow)

*Pipelining*

- Instruction Pipeline

- Stages (Fetch, Decode, Execute, Memory Access, Write Back)


*Parallel Processing*

- Multi-Core Processors

- Multi-Processing (Symmetric, Asymmetric)

*Input/Output Systems*

- I/O Devices (Keyboard, Display, Disk)

- I/O Interfaces (UART, SPI, I2C)

*Bus Structures*

- Bus Types (Serial, Parallel)

- Bus Protocols (PCI, USB, SCSI)

These four stages are part of the Instruction Pipeline in a computer's CPU:

1. *Fetch*:

- Retrieves an instruction from memory

- Instruction is stored in the Instruction Register (IR)

- Program Counter (PC) is incremented to point to the next instruction

2. *Decode*:

- Decodes the instruction in the IR

- Determines the operation, operands, and addressing mode

- Generates control signals for the execution stage


3. *Memory Access* (optional):

- If the instruction requires data from memory, this stage:

- Retrieves data from memory

- Stores data in a register or temporary storage

- Not all instructions require memory access (e.g., register-to-register operations)

4. *Write Back* (optional):

- If the instruction produces a result, this stage:

- Writes the result back to a register or memory

- Not all instructions produce a result (e.g., control flow instructions)

Note that some instructions may require additional stages or combine these stages. The pipeline stages
may also vary depending on the specific CPU architecture.

Here's an example of how these stages work together:

- Fetch: Retrieve instruction "LOAD R1, #10" from memory

- Decode: Determine that it's a load instruction, with R1 as the destination and #10 as the immediate
value

- Memory Access: Not required, since the value is an immediate constant

- Write Back: Write the value #10 to register R1

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