The Pressure Sensing Project

Session Number 2526
The Pressure Sensing Project

Nghia T. Le, Terry O’Connor
Purdue University
School of Technology
Electrical Engineering Technology
A. Introduction
The paper discusses the use of a multi-faceted electronic project as a capstone experience
for an associate degree program in Electrical and Computer Engineering Technology
(ECET) at Purdue University's School of Technology New Albany location. This project
incorporates several different technologies from both the analog and digital realms of
electronics. The project is designed by the course instructor of ECET 297 Electronic
System Design and Fabrication. ECET 297 is in the fourth semester of the A.S. program.
The students are given the design of the circuit in block diagram and schematic form.
Each subpart of the circuit is intended to provide review to the student as each technology
has been covered in previous courses. The students are then required to fabricate the
circuit one portion at a time until the project is completed. Fabrication of the project is
done on prototyping (UBS-100) boards. Each section must be functioning correctly
before the next section is to be fabricated and thus the project provides an excellent
troubleshooting experience. Careful and neat layout of the circuit is mandated by the
course instructor and the course grade is partially dependent on that. A project such as
this one has been used each of the past six years in ECET 297 in New Albany. Each
year's project is unique as the course instructor designs a new one for each successive
class. The faculty in ECET at New Albany considers the projects used over the past six
years in the course to have been effective capstone experiences for the students. Student
feedback on this course has been excellent and individual students have reported that they
have had such pride in their completed project that they have kept it fully assembled on
its protoboard years after graduating.
The remainder of the paper discusses the design of the project. This project is a Pressure
Sensing circuit that utilizes a variable capacitor as a pressure switch. The variable
capacitor is constructed by using two conducting plates with a foam layer in between as
in Figure 1 on the next page.
Page 9.1283.1
Proceedings of the 2004 American Society for Engineering Education Annual Conference & Exposition
Copyright©2004, American Society for Engineering Education
TOP CONDUCTING PLATE
MIDDLE FOAM LAYER
BOTTOM CONDUCTING PLATE
Figure 1 – The Variable Capacitor
When pressure is applied to the top plate, the foam layer collapses resulting in an increase
in the capacitance. The project utilizes this behavior to sense the pressure presence. The
design covers basic analog/digital circuits that the students learn during the first two
years in the Electrical Engineering Technology Program at Purdue University. Figures 2
and 3 show the block diagrams of the project.
When the top plate is pressed down to 1/3 of the gap, the 3-digit display shows the time
in seconds that the pressure is present. At the same time, the first LED is lit to show that
the distance between the two plates has decreased 30%. If the pressure keeps increasing,
the time continues to count and the second and third LED’s show 60% or 90% when the
gap reaches these points. When the pressure is released, the time freezes to show the total
time the pressure has been presented. When the top plate is pressed down the second time
at 30%, the time resets itself and starts counting again.
The project consists of different stages that are manageable as weekly classroom
activities. It helps the students to utilize their knowledge to design and build a working
circuit.
OSCILLATOR
RC ACTIVE ACTIVE
INSTRUMENTATION ACTIVE
WHEATSTONE BAND PASS PEAK
AMPLIFIER RECTIFIER
BRIDGE FILTER DETECTOR
LED1 COMPARATOR LED2 COMPARATOR LED3 COMPARATOR

Page 9.1283.2
TO A
Figure 2 – The Analog Section of the Project
DECODER/ DECODER/ DECODER/
DRIVER DRIVER DRIVER
COUNTER COUNTER COUNTER OSCILLATOR
TRANSISTOR ONE-SHOT
FROM A
DRIVER CIRCUIT
Figure 3 – The Digital Section of the Project
B. The Analog Section of the Project
1. The Wien-Bridge Oscillator
The schematic diagram of the Wien-Bridge oscillator is in Figure 4 below.
+15V +15V
C1 R4
470 F 2k
R1 R3
GND 8.2k 15k
C2
470 F
15V 15V
LM741 VOUT1
C4 R5
0.0015 F 22k
R2 C3
22k 0.0015 F
Figure 4 – The Wien-Bridge Oscillator
The 15VDC power supply has two 470 F filtering capacitors as in the top left corner in
Figure 4.
Page 9.1283.3
In the oscillator, if we let R2 = R5 = R and C3 = C4 = C, the oscillating frequency is:
1 1
f 4.82kHz
2 RC 2 22k 0.0015 F
Let K be the closed-loop gain of the Non-Inverting amplifier section. In order for
oscillation to occur, we need:
R5 C3 22k 0.0015 F
K 1 1 3
R2 C4 22k 0.0015 F
Therefore,
R3 R4
K 3 1 R3 R4 2 R1 2 8.2k 16.4k
R1
In the design, a 2k 22 turn rheostat is used for R4 to fine-tune the circuit for oscillation.
The waveform of the output of the oscillator is in Figure 5 below.
+14V
50 s/DIV
14V
Figure 5 – The Oscillator Output
The output of the oscillator is the reference voltage for the following RC Wheatstone
bridge circuit.
Page 9.1283.4
2. The RC Wheatstone Bridge
The schematic diagram of the RC Wheatstone bridge is in Figure 6 below.

VOUT1
C6
C5 39pF
VOUT2 VOUT3
R6 R7
100k 100k
Figure 6 – The RC Wheatstone Bridge
The reference voltage of the bridge VOUT1 comes from the output of the Wien-Bridge
oscillator. The variable capacitor C5 is the pressure switch that is mentioned at the
beginning of this paper. The 100k 22turn rheostat R7 is used to balance the bridge.
The outputs of the bridge VOUT2 and VOUT3 are the inputs of the following
Instrumentation amplifier.
3. The Instrumentation Amplifier
The schematic diagram of the Instrumentation amplifier is in Figure 7 below.
R11 R14
VOUT3
12k 1% 12k 1%
LM741
R9
12k 1% LM741 VOUT4
R8
10k
R10 R12
12k 1% 12k 1%
R13
12k 1%
LM741
VOUT2
Page 9.1283.5
Figure 7 – The Instrumentation Amplifier
In the amplifier, if we let R9 = R10 = … = R14 = R, the output of the amplifier is:
Because of the phase 2R 2 12k

VOUT 4 V OUT 2 VOUT 3shift
1 betweenVVOUT
OUT2 and
2 VOUTV3 OUT3
1 , it is impossible
3.4 VtoOUTobtain
2
a 0V
VOUT 3
output level for VOUT4. R8 10k
Table 1 below shows the peak values of VOUT4 at different pressure levels.
Normal First Level Second Level Third Level
VOUT4 PEAK 300mV 400mV 480mV 600mV
Table 1 – The Output Peak Values of the Instrumentation Amplifier
The waveform of VOUT4 under normal condition is in Figure 8 below.
+300mV
50 s/DIV
300mV
Figure 8 – VOUT4 Under Normal Condition
Since the above output is not a perfect sinusoidal wave, we need to condition the
waveform and to amplify the signal by using a Second Order Active Band Pass filter.
Page 9.1283.6
4. The Second Order Active Band Pass Filter
The schematic diagram of the filter is in Figure 9 below.
In the circuit, a Buffer is used to isolate the output impedance of the Instrumentation
amplifier from the input impedance of the filter.
If we let R15 = R17 = R18 = R, and C7 = C8 = C, the center frequency of the filter is:
2 2
f0 4.81kHz
2 RC 2 12k 0.0039 F
The above center frequency matches with the oscillating frequency of the Wien-Bridge
oscillator.
Let K be the closed-loop gain of the Non-Inverting amplifier section, we have:
R19 33k
K 1 1 3.75
R16 12k
The sensitivity value of the circuit is:
2 2
Q 5.7
4 K 4 3.75
R17
12k 1%
R16 R19
12k 33k
R15 C8
12k 1% 0.0039 F LM741 VOUT5
LM741
VOUT4
C7 R18
0.0039 F 12k 1%
Figure 9 – The Second Order Active Band Pass Filter

Page 9.1283.7
Figure 10 below shows the output waveform of the filter under normal condition.
+5V
50 s/DIV
5V
Figure 10 – The Output Voltage of the Band Pass Filter
Figure 11 below shows the frequency response of the filter with a 600mV-peak input
signal.
14
12
10
Output Peak (V)
0
0 2 4 6 8 10
f (kHz)
Figure 11 – The Band Pass Filter Response

Page 9.1283.8
VOUT5 PEAK 5.0V 6.5V 9.0V 13.0V
Table 2 – The Output Peak Values of the Band Pass Filter
5. The Active Full Wave Rectifier or The Absolute Value Circuit
The next stage of the project is the Active Full Wave Rectifier circuit. This circuit is also
known as the Absolute Value circuit. The circuit doubles the operating frequency of the
system to enhance the performance of the Peak Detector circuit in the system.
Figure 12 shows the schematic diagram of the Absolute Value circuit. In the circuit, R20 =
R21 = R22 = R24. In order for the circuit to function properly, the resistor R23 must be half
of the other resistors. Therefore, a 10k 22 turn rheostat is used to accomplish this task.
R21 R23 R24

12k 1% 10k 12k 1%
D2
D1 1N914
1N914
R20 LM741 VOUT6
12k 1%
VOUT5
LM741
R22
12k 1%
Figure 12 – The Absolute Value Circuit Page 9.1283.9
Figure 13 below shows the output waveform of the Absolute Value circuit after the
rheostat R23 is properly set.
+5V
50 s/DIV
5V
Figure 13 – The Output Waveform Under Normal Condition
VOUT6 PEAK 5.0V 6.5V 9.0V 13.0V
Table 3 – The Output Peak Values of the Absolute Value Circuit
The full-wave rectified signal is then converted into a DC voltage by the Peak Detector
circuit. Page 9.1283.10
6. The Active Peak Detector Circuit
The schematic diagram of the Active Peak Detector circuit is in Figure 14 below.
R25
100k
D3
1N914
LM741 VOUT7
VOUT6
C9 R26
1 F 10k
Figure 14 – The Active Peak Detector Circuit
The output signal VOUT7 is a DC voltage that has a small ripple voltage riding on it.
Under normal condition, this peak-to-peak ripple voltage is:
5V
VRIPPLE 10k 51.87 mV
9.64kHz 1 F
Figure 15 on the next page shows the ripple voltage (with the AC input selector mode of
the oscilloscope) of VOUT7.
+25mV
50 s/DIV
25mV
Page 9.1283.11
Figure 15 – The Ripple Voltage of VOUT7
Figure 16 below shows the output of the Peak Detector circuit VOUT7 under normal
condition, the first, second, and third levels of pressure.
THIRD LEVEL
13.0V
SECOND LEVEL
9.0V
FIRST LEVEL
6.5V
NORMAL CONDITION
5.0V
0.0V
Figure 16 – VOUT7 Under Different Conditions
This output is used as the inputs of the three Voltage Comparator circuits.
7. The Voltage Comparators
The next stage of the project consists of three Voltage Comparator circuits. The
schematic diagram of this stage is in Figure 17 below.
+15V
VOUT8
R27
100k
+6.5V R30
1k
LM741
VOUT7 LED1
+15V
R28
100k
+9.0V R31
1k
LM741
LED2
+15V
R29
100k
+13V R32
1k
LM741
LED3
Page 9.1283.12
Figure 17 – The Voltage Comparator Circuits
In these circuits, the potentiometers R27, R28, and R29 are used to set the reference
voltages for the Voltage Comparators. The settings are 6.5V, 9.0V, and 13.0V
respectively.
Under normal condition, all three LED’s are off. When the pressure reaches the first
level, the light-emitting-diode LED1 is on. When the pressure reaches the second level,
the light-emitting-diodes LED1 and LED2 are on. When the pressure reaches the third
level, all three light-emitting-diodes are on.
This stage is the end of the analog section of the design.
C. The Digital Section of the Project
1. The Transistor Driver and the One-Shot Circuit
Since the Counters in the later part of the design require an active LO signal to function, a
transistor driver is used to achieve this objective. In addition, a Monostable Multivibrator
(One-Shot) circuit is also used to reset the Counters. The schematic diagram of this
section is in Figure 18 below.
+5V
+5V +5V R35

18k
C10
470 F
C12
0.082 F
GND
14 13 12 11 10 9 8
+5V Vcc NC NC Rext Cext Rint NC
74121
R34 Q NC A1 A2 B Q GND
1k 1 2 3 4 5 6 7
VOUT10
R33
10k
VOUT8 2N3904 C11 R36
10 F 1k
VOUT9
+5V
Figure 18 – The Transistor Driver and the One-Shot Circuits
In the circuit, another 470 F capacitor C10 is used to filter the +5VDC power supply.
The design of the One-Shot circuit is based on the Function Table in Figure 19 on the
next page.
Page 9.1283.13
INPUTS OUTPUTS
A1 A2 B Q Q
L X H L H
X L H L H
X X L L H
H H X L H
H H
H H
L X
X L
Figure 19 – The Function Table of the 74121
The output pulse width of the 74121 is:
PULSE _ WIDTH 0.7 R35 C12 0.7 18k 0.082 F 10.3ms
The above pulse is used to reset the Counters.
The timing diagram of the circuit is in Figure 20 below.
FIRST LEVEL OF PRESSURE
+15V
VOUT8 GND
15V
+5V
VOUT9 GND
+5V
VOUT10 GND
10.3ms
Page 9.1283.14
Figure 20 – The Timing Diagram of the Outputs
The output voltage VOUT9 enables the Counters and the output voltage VOUT10 resets the
Counters.
2. The Clock Circuit
The next part of the digital section is the Clock circuit that generates a 10Hz square wave
signal for the Counters. The circuit is a 555 Timer in its astable mode.
The schematic diagram of the Timer is in Figure 21 on the next page.
The output frequency of the Timer is:
1.44 1.44
f 9.9 Hz
R37 2 R38 C13 1k 2 330k 0.22 F
+5V
R37
1k
8 4
7
R38
330k
6 555 3 VOUT11
2 5
1
C13 C14
0.22 F 0.01 F
Figure 21 – The 555 Timer Circuit
Page 9.1283.15
3. The Counter and Driver Circuits
The schematic diagram of the last part of the design is in Figure 22 below.
COMMON ANODE COMMON ANODE COMMON ANODE
+5V +5V +5V
ALL R'S ALL R'S ALL R'S

330 330 330
a b c d e f g a b c d e f g a b c d e f g
7446 7446 7446

QA QB QC QD QA QB QC QD QA QB QC QD
U/D
U/D
U/D
QA QB QC QD QA QB QC QD QA QB QC QD
RCO 74190 RCO 74190 RCO 74190

LOAD
LOAD
LOAD
CTEN
CTEN
CTEN
CLK
CLK
CLK
DA
DD
DA
DD
DA
DD
DB
DC
DB
DC
DB
DC
VOUT9 VOUT10 VOUT11
Figure 22 – The Counter and Driver Circuits
When the pressure reaches its first level, the voltage VOUT9 enables the Counters and the
voltage VOUT10 resets the display to 00.0 in about 10ms. After that, the display shows the
time the pressure is present to 1/10 of a second. After the pressure is released, the display
freezes to show the total time the pressure was at the switch. If the switch is pressed again
to the first level of pressure, the three-digit display resets to 00.0 and then starts showing
the time as before.
D. Conclusion
The project produces indicators for the relative position between the top and the bottom
plates of the variable capacitor. Three light-emitting-diodes show that the gap between
the two plates is being closed. A three-digit display shows the total time the gap is at a
preset level.
The project consists of different analog and digital circuits that the students have learned
during the first three semesters in the Electrical and Computer Engineering Technology
Program of Purdue University. This design gives the students an opportunity to put into
practice the theories and applications they possess. It also enhances their troubleshooting
skills.
Page 9.1283.16
This project concept has been used in ECET 297 and it predecessor course ECET 296 for
the past six years. Each year the project has changed and grown in complexity. The
faculty members of the ECET department in New Albany have used the results of the
project to gauge overall academic success of their program. Since the project has grown
each year in both size and complexity and nearly all of the students have succeeded each
of the six years, the faculty believes that this is an indication of increasing strength in the
program.
Bibliography
1. Boylestad, R. L. (1995). Introductory circuit analysis (6th ed.). Ohio: Merrill Publishing.
2. Budak, A. (1974). Passive and active network analysis and synthesis. Boston: Houghton Mifflin.
3. Malvino, A. P. (1999). Electronic Principles (6th ed.). Ohio: Glencoe/McGraw-Hill.
NGHIA T. LE
Nghia T. Le is an Assistant Professor of Electrical Engineering Technology of Purdue University. He
teaches at Purdue University, School of Technology at New Albany, Indiana. He earned his B. S. and M. E.
E. E. degrees from the University of Louisville. He specializes is instrumentation and controls. He can be
reached at: [email protected].
TERRENCE P. O’CONNOR
Terrence P. O’Connor is an Associate Professor of Electrical Engineering Technology for Purdue
University. He teaches at the New Albany site where he has taught all but one of the courses in the two
year degree offered there. He is primarily interested in ELF/ULF signal detection in the area of research,
but also has delved into engineering ethics. He is a graduate of Northern Arizona University where he
received a B.S. in Engineering Technology. He received his Master of Science degree in Engineering
Technology from West Texas State University. He can be reached at: [email protected].
Page 9.1283.17

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Session Number 2526

The Pressure Sensing Project

MIDDLE FOAM LAYER

BOTTOM CONDUCTING PLATE

Figure 1 – The Variable Capacitor

LED1 COMPARATOR LED2 COMPARATOR LED3 COMPARATOR

Figure 2 – The Analog Section of the Project

COUNTER COUNTER COUNTER OSCILLATOR

Figure 3 – The Digital Section of the Project

B. The Analog Section of the Project

1. The Wien-Bridge Oscillator

The schematic diagram of the Wien-Bridge oscillator is in Figure 4 below.

Figure 4 – The Wien-Bridge Oscillator

The waveform of the output of the oscillator is in Figure 5 below.

Figure 5 – The Oscillator Output

The schematic diagram of the RC Wheatstone bridge is in Figure 6 below.

Figure 6 – The RC Wheatstone Bridge

3. The Instrumentation Amplifier

The schematic diagram of the Instrumentation amplifier is in Figure 7 below.

Figure 7 – The Instrumentation Amplifier

Because of the phase 2R 2 12k

Normal First Level Second Level Third Level

VOUT4 PEAK 300mV 400mV 480mV 600mV

Table 1 – The Output Peak Values of the Instrumentation Amplifier

The waveform of VOUT4 under normal condition is in Figure 8 below.

Figure 8 – VOUT4 Under Normal Condition

The schematic diagram of the filter is in Figure 9 below.

Let K be the closed-loop gain of the Non-Inverting amplifier section, we have:

The sensitivity value of the circuit is:

Figure 9 – The Second Order Active Band Pass Filter

Figure 10 – The Output Voltage of the Band Pass Filter

Figure 11 – The Band Pass Filter Response

Normal First Level Second Level Third Level

VOUT5 PEAK 5.0V 6.5V 9.0V 13.0V

Table 2 – The Output Peak Values of the Band Pass Filter

5. The Active Full Wave Rectifier or The Absolute Value Circuit

R21 R23 R24

Figure 12 – The Absolute Value Circuit Page 9.1283.9

Figure 13 – The Output Waveform Under Normal Condition

Normal First Level Second Level Third Level

VOUT6 PEAK 5.0V 6.5V 9.0V 13.0V

Table 3 – The Output Peak Values of the Absolute Value Circuit

Figure 14 – The Active Peak Detector Circuit

Figure 15 – The Ripple Voltage of VOUT7

Figure 16 – VOUT7 Under Different Conditions

7. The Voltage Comparators

Figure 17 – The Voltage Comparator Circuits

This stage is the end of the analog section of the design.

C. The Digital Section of the Project

1. The Transistor Driver and the One-Shot Circuit

+5V +5V R35

Figure 18 – The Transistor Driver and the One-Shot Circuits

Figure 19 – The Function Table of the 74121

The output pulse width of the 74121 is:

PULSE _ WIDTH 0.7 R35 C12 0.7 18k 0.082 F 10.3ms

The above pulse is used to reset the Counters.

The timing diagram of the circuit is in Figure 20 below.

FIRST LEVEL OF PRESSURE

Figure 20 – The Timing Diagram of the Outputs