Memory Numerical 1
Memory Numerical 1
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I
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Answer:
is paging faster than segmentation?
..
In segmentation, the offset must be . . .added.
~- to
. the starting segment address. With
. .-
pagifig, n o addition need be performed. The page fraxinumber and the offset are
~
....... ~-~
concatenated
- . to form the physical address. Concatenating'the two bit is faster
th
.,Y' adding them.
What are the two major differences between segmentation and paging?
A.41 In each of the listed memory management schemes, briefly describe the functions
performed by the operating system software.
(a) Single Relocatable Partition
(b) Multiple Fixed Partitions
(c) Simple Segmentation
4.42 In each of the listed memory management schemes, briefly @scribe the functions
performed by the memory management hardware.
(a) Single Relocatable Partition
(b) Multiple Fixed Partitions
(c) Simple Segmentation
4.43 A program containing relocatable code was created, assuming it would be loaded at
address 100. In its code, the program refers ,to the following addresses: 135, 160,
164, 220, 224. If the program is loaded into memory starting at location 500, to what
do those addresses have to be changed?
4.44 On a system with 232bytes of memory and fixed partitions, all of size 220bytes, what
is the minimum number of bits needeh in an entry in the' process table to record the.
partition to which a process has been allocated?
n a system using fixed partitions with sizes 2', 224,and 264,rhowmany bits must the
register have?
n a system using fixed partitions, all of size 2';. how many bits must the limit
register have?
-.
Used Hole Used llolc Used Hole Used Hole
4.49 --
On a system using best-fimcation, assume memory is allocated as spe~ifiedin Fig.
4-1 1 before additional requests for 10K, 25K, and 20K (in that order)-are received.
At what starting address will each of the additional requests be allocated?
i
4.52 On a system with 1Mb of memoly using the buddy system, draw a diagram showing
the allocation of memory after each of the following events:
(a) Process A, request 150K
(b) Process B, request 40K
(c) Process C, request 80
(4 Process D, request 210
(e) Process B, exit
Process E, request 60
Process C, exit
Process A, exit
Process E, exit
Process F, request 1 15
Process G, request 150
Process F, exit
Process G, exit
Process D, exit
4.53 On a system with 1Mb of memory using the buddy system, what is the first request
that will fail in the following string of requests, due to lack of available memory?
Requests: 150K, 70K, 260K, 40K, 70K, IsOK, 50K, 120K, 60K.
4.54 In the previous problem, at the time of the failed request, how much memory is
wasted due to internal fragmentation and how ~ n u c his wasted due tn external
fragmentation?
C 4.55 On a simple paging system with .?32 bytes of physical memory, 2;; pages of virtual
address space, and page size\of 512 bytes, how many bits are in-a virtual address?
-.
4.56 On a simple paging system with 232 bytes of phy~icalmemory, 2" pages of virtual
$
/
address space, and page size of 5 12 bytes. how many bytes are in. a page
. . . !?frame?
4.57 On a simple paging system \vith 2'"bytes of physical memory, 2'' pages of vr~t.ial
address space, and page size of 512 bytes, how tnany bits in the physical address
specify the page frame?
-
t
4.58 On a simple paging systenl with 232 bytes of physical memory, 2 I p a g e s of virtual
address space, and page size of-512 bytes. how many entries are in the page table
(how long is the page table)?
A
4.59On a simple paging system with 232 bytes of physical memory, 2'%ages of virtual
address space, and page size of 5 12 bytes, how many bits are needed to store an ently
in the page table (how wide is the page table)? Assume each,page table entry contains
o l i d / i n v a l i d bit in addision to the page frame number.
4.60 On a simple paging system ivith a page table containing 512 entries of 16 bits
(including validlinvalid bit) sach, afid a page size of 1024 bytes, how many bits in
the logical address specify the page number?
4.61 On a simple paging systern with a page table containing 512 entries of 15 bits
(including valid/invalid .bit) ka'ch, and a page size of 1024 bytes, how many bits in
the logical address specify the offset within the page?'
4.62 On a simple paging system with a page table containing 512 entries of 16 bits
(including validlinvalid bit) each, and a page size of 1024 bytes, how many b'its are
in a logical address?
4.63 On a simple paging system with a page table containing 512 entries of 16 bits
(including validlinvalid bit) each, and 2 page size of 1024 bytes, what is the size of
the logical address spacq?
4.64 On a simple paging system with a page table containing 512 entries of 16 bits
)f (including validlinvalid bit) each, and a page size of 1024 bytes, how many bits in
the physical address specify the page frame number?
-,
4.65 O n a simple paging systen page table containing 512 entries of 16 bits
(including validlinvalid bit) eacn, and a page size of 1024 bytes, how many bits in
the physical address specify the offset within the page ffame?
____L-
4.66 On a simple paging system with a page table containing 512 entries of 16 bits
(including validlinvalid bit) each, and a page size of 1024 bytes, how many bits are
in a physical address?
..
4.67 On a simple paging system with a page table containing 512 entries of 16 .bits
(including validlinvalid bit) each, and a page size of 1024 bytes, what is the size of
the physical address space?
4.68 A system that uses a two-level page table has 32-bit virtual addresses. The first 8 bits
of the address serve as the index into the first-level page table, and the iiext 10 bits
specifr,,the level-two page table entry.
gty (a) How many bytes in a page?
2 (b) How many entries in a level-one page table?
I (c) How many entries in a level-two page table?
4.69 A computer has a 64-bit virtual address space and 2048-byte pages. A page table
entry rakes 4 bytes. A multilevel page table is used because each table must be
contained with a page. How many levels are required?
4r
-
n a simple paged system, associative registers hold the most active page entries, and
.L the full page table is stored in main memory. If references satisfied by the associative
registers rake 60 ns and references through the main memory page table take 200 ns:
what is the effective access time if 40% of all memory references find their e'ntries in
the associative registers?
7
1 On a simple paged system, associative registers hold the most active page entires, and
V
the full page table is stored in main memory. If reference satisfied by the associative
)'-'(o registers take 90 ns and referent-s through the main memoly page table
what must the hit ratio be to achieve an effective access time of 120 ns?
.72 Simulate in a 'C' hnction the memoly management hardware in a simple segmented
system. Write the function 'Trarzs', which takes a se,mented virtual address and
translates it into a physical address, returningthe pliysical address as an int. You may
assume the hnction Fatilt handles segment faults and has already been written. The
'segTable' variable contains the segment table.
struct SegTableType
( int loc; / * Startlng segment addr */
int len; / * Length of segment in bytes */
);
struct VirtualAddressType
( int seq; / * Portlon of address specifying
segment */
int off; / * Portion of address specifying
offset */
1;
struct SegTableType segTable[NUMBER-SEGMENTS];
void Fault ( ) ; / * Processes a segment fault. * /
CF" On a system using simple segmentation, c ~ m p u t ethe physical address for each of the
logical addresses, given the following segment table. If the address generates a
segment fault, indicate so.
0 1100 500
1 2500 1000
2 200 600
3 4000 1200
(a) 0,300
(b) 2,800
(c) 1,600
(4 3,1100
(e) 1,1111
&n a system using paging and segmentation, tlie virtual address space consists of up
to 16,segments where each segment can be up to 2L6 bytes long. The hardware pages
eachsegment into 512-byte pages. How many bits in the virtual address specify the
following?
(a) Segment number -94v + t!2'6 la9
(6) Page number
(c) Offset within page
-7-
9
(d) Entire virtual address
4.41 (a) Single Relocatable partition
When the system is booted, the operating system loads the relocation register
with the address of the lowest memory location that can be accessed by a user
program.
(b) Multiple Fixed Partitions
When the operating system is booted up, it must load the size of a partition into
the size register. The operating system must keep track of which partitions are
in use and which are free. When a process is created or a process terminates, the
.. operating ,system must update the partition usage data. Before allocating a
process to memory, the operating system ~iiustcheck that the process is smaller
than the pal-tition size. When a process is given control of the CPU, the
operating system must load the process's starting address into the relocation
register.
(c) Simple Segmentation
The operating system must keep track 06-which memory locations are in use
and which are free. When a process is created, the operating system must
allocate thc segments to memory and create a segment table for the process.
When a process terminates, the operating system must reset its memory
locations as free. When a process is given control of the CPU, the operating
system must load the process's segment table into the memory management
registers. If a segment fault occurs, the operating system must handle the fault.
4.44 12 bits
4.45 (0) Each logical address generated by a program is compared to the size (or limit)
register. Any address greater than the size register results in a memory-fault
trap.
(11). Each logical address is added to the relocation register to generate a physical
address. The physical address is then compared to the maximum physical
address. Any address greater than the maximum physical address results in a
memory-fault trap.
(c) The comparison of the logical address to the size can occur at the same time that
the relocatioh register is being added to the logical address. The cljinparison of
the physical address to the maximutn physical address must occur after the
addition. By doing :!1e comparison concurrently, the mapping from virtual to
physical address can be accon~plishedfaster.
( j) Process F, request 1 15 I
F 128 G D 256
I I I l l I l l I I I
0 128K 256K 384K 512K 640K 768K 896K 1024K
70K
21
512
23
212 = 4096
24
9
4.68 [a) 214
( h ) 28
(c) 21°
(4 218
4.69 Six
4.74 (a) 4
(b) 7
(c) 9
(4 20