“Analysis of reduced switch multilevel inverter topologies including a

novel configuration for enhanced power quality and efficiency”

MAJOR PROJECT PHASE - I REPORT

Submitted in partial fulfillment of the Academic requirements for the

award of the degree of Bachelor of Technology In

Electrical & Electronics Engineering

Submitted by

1. A.ASHRITHA(21H51A0202)
2. R.LAXMAN(22H55A0215)
3. J.PAVAN CHANDU(21H51A0218)
4. A.SRAVAN(21H51A0203)

Under the esteemed guidance

Of

Mr. Suneel Kumar

Associate professor

DEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING

CMR COLLEGE OF ENGINEERING & TECHNOLOGY
(UGC AUTONOMOUS)
(NAAC Accredited with ‘A+’ Grade)
(Approved by AICTE, Permanently Affiliated to JNTU Hyderabad)

KANDLAKOYA, MEDCHAL ROAD, HYDERABAD-501401

2024-25

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 CMR COLLEGE OF ENGINEERING & TECHNOLOGY
(UGC AUTONOMOUS)

KANDLAKOYA, MEDCHAL ROAD, HYDERABAD-501401

DEPARTMENT OF ELECTRICAL & ELECTRONICS ENGINEERING

CERTIFICATE

This is to certify that the report entitled “Analysis of reduced switch multilevel
inverter topologies including a novel configuration for enhanced power quality
and efficiency”is aBonafide work done by A.ASHRITHA(21H51A0202),
R.LAXMAN(22H55A0215),J.PAVANCHANDU(21H51A0218),A.SRAVAN(21
H51A0203)of IVB.Tech, in partial fulfillment of the requirements for the award of
the degree of Bachelor of Technology, submitted to The Department of Electrical
& Electronics Engineering, CMR College of Engineering & Technology,
Hyderabad during the Academic Year 2024-25.

Mr.Suneel Kumar Dr.G.Devadas

Associate Professor HOD
Guide Department of EEE

CMR College of Engineering & Technology EEE

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 ACKNOWLEDGEMENT
With great pleasure we want to take this opportunity to express my heartfelt gratitude to
all the people who helped in making this Miniproject-1/Internship -1 work a grand success.

We would like to thank, Dr.G.Devadas, Head of the Department of Electrical and

Electronics Engineering, CMR College of Engineering and Technology, who is the major driving
forces to complete my work successfully.

We are very grateful to Dr.G.Devadas, Dean-Academics, CMR College of

Engineering and Technology, for his constant support and motivation in carrying out the project
work successfully.

We are highly indebted to Major Dr. V A Narayana, Principal, CMR College of

Engineering and Technology, for giving permission to carry out this project in a successful and
fruitful way.

We would like to thank the Teaching & Non- teaching staff of Department of Computer
Science and Engineering for their co-operation

We express our sincere thanks to Shri. Ch. Gopal Reddy, Secretary, CMR Group of Institutions,

for his continuous care.

Finally, We extend thanks to our parents who stood behind us at different stages of this
Project. We sincerely acknowledge and thank all those who gave support directly and indirectly
in completion of this project work.

CMR College of Engineering & Technology EEE

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 TABLE OF CONTENTS
CHAPTERS DESCRIPTION PAGE NO

Abstract

Introduction

Types of MLI

Comparision &selection

Literature review

Existing solutions

Main circuit

conclusion

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ABSTRACT

This paper presents an analysis of reduced-switch multilevel inverter (MLI) topologies, with a
focus on enhancing power quality and efficiency for applications requiring compact, cost-effective
designs. Traditional MLIs, such as Neutral Point Clamped (NPC), Flying Capacitor (FC), and
Cascaded H-Bridge (CHB) inverters, often require a high number of switches, capacitors, and
diodes, leading to increased cost, complexity, and switching losses. To address these limitations,
we explore various reduced-switch MLI configurations that maintain or improve performance
metrics such as Total Harmonic Distortion (THD) and efficiency, while utilizing fewer
components. Key design strategies include asymmetrical DC sources, modular configurations, and
hybrid structures that combine the strengths of different topologies. Additionally, we propose a
novel MLI configuration that reduces component count further and optimizes voltage levels,
achieving enhanced power quality and efficiency without compromising reliability. Simulation
and experimental results validate the proposed design's effectiveness, demonstrating a reduction
in THD and overall energy loss, making it ideal for renewable energy systems, electric vehicles,
and other high-efficiency applications.

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 CHAPTER-1
INTRODUCTION

Multilevel inverters (MLIs) are essential in modern power electronics, providing a means to
convert DC to AC power with multiple voltage levels. By generating output waveforms with
reduced harmonic distortion and lower electromagnetic interference, MLIs are widely adopted in
renewable energy systems, industrial drives, and electric vehicles. Traditional MLI topologies,
including Neutral Point Clamped (NPC), Flying Capacitor (FC), and Cascaded H-Bridge (CHB)
inverters, achieve high-quality AC output but often rely on a large number of switches, capacitors,
and diodes. This leads to increased circuit complexity, higher costs, and reduced efficiency due to
greater switching and conduction losses.

Reduced-switch MLI topologies have emerged as a compelling alternative to conventional

designs, aiming to achieve comparable or improved performance with fewer components. By
reducing the switch count, these topologies simplify circuit design, lower costs, and reduce energy
losses, making them suitable for applications where efficiency, cost, and compactness are key
factors. Strategies like asymmetrical voltage sources, phase reduction, and hybrid configurations
have proven effective in creating simpler MLI structures that deliver high-quality output with
reduced hardware.

This paper presents an in-depth analysis of various reduced-switch MLI topologies, assessing their
impact on critical performance metrics such as Total Harmonic Distortion (THD), efficiency, and
reliability. Furthermore, we introduce a novel MLI configuration that combines elements of
existing topologies to optimize component utilization and enhance power quality. The proposed
design achieves reduced THD and improved efficiency, making it particularly well-suited for
applications with stringent power quality requirements. Through simulation and experimental
validation, this work demonstrates the advantages of the proposed topology over conventional and
existing reduced-switch MLIs, providing a pathway toward more efficient and cost-effective
power conversion solutions.

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TYPES OF MULTILEVEL INVERTERS

Multilevel inverters (MLIs) are generally classified based on their structural configurations and
how they achieve multiple voltage levels. Each type has unique characteristics and is suited for
different applications. Here’s an overview of the main types:

1. Diode-Clamped Multilevel Inverter (DCMLI) or Neutral Point Clamped (NPC) Inverter

Structure: The NPC inverter uses diodes to clamp the voltage levels at various points in the circuit,
dividing the DC bus voltage into multiple levels. This type typically includes a series of capacitors
and a high number of clamping diodes.

 Advantages: It is well-suited for high-power applications, offers lower Total Harmonic

Distortion (THD), and has high efficiency at fundamental switching frequency.
 Challenges: The large number of diodes required for higher levels increases complexity
and costs. Balancing the capacitor voltages can also be challenging, especially for higher
levels.

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2. Flying Capacitor Multilevel Inverter (FCMLI)

 Structure: The FCMLI relies on floating capacitors to create multiple voltage levels.
Unlike the NPC inverter, it does not require clamping diodes but instead has multiple
capacitors stacked in a specific arrangement.
 Advantages: It provides flexibility in voltage level generation and redundancy for fault
tolerance. The flying capacitors can provide some self-balancing properties.
 Challenges: It requires a large number of capacitors, which makes it bulky and costly.
Voltage balancing of capacitors can be complex, especially as the number of levels
increases.

3.Cascaded H-Bridge Multilevel Inverter (CHBMLI)

 Structure: The CHB inverter consists of multiple H-bridge cells connected in series. Each
H-bridge has its own isolated DC source, and each stage adds a voltage level to the output.

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  Advantages: This topology provides modularity and scalability, as each H-bridge can
independently generate a voltage level, leading to low THD in the output.
 Challenges: It requires multiple isolated DC sources, which can be costly and challenging
to obtain in some applications. For high-voltage applications, the number of cells (and thus
switches) can be large.

4.Modular Multilevel Converter (MMC)

 Structure: The MMC is a highly modular type of MLI, consisting of several submodules
or half-bridge cells arranged in series. Each submodule typically includes a capacitor and
two switches, allowing fine control over the output waveform.
 Advantages: It offers very high scalability, making it ideal for high-power applications
like HVDC transmission. It also achieves high power quality and efficiency with reduced
switching losses.
 Challenges: The control strategy for MMC is complex, requiring sophisticated algorithms
to balance the voltages across numerous submodules. Additionally, MMCs are costly due
to the high number of components.

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5.Reduced-Switch Multilevel Inverter (RSMLI)

 Structure: Reduced-switch MLIs aim to achieve the desired number of voltage levels with
fewer switches, capacitors, and/or diodes. These designs often combine aspects of NPC,
FC, and CHB topologies but optimize component usage.
 Advantages: Reduced-switch MLIs minimize cost and complexity while maintaining high
efficiency and low THD. They are particularly valuable in applications where cost and size
constraints are critical.
 Challenges: Achieving the desired performance with a reduced component count can be
challenging, and the control algorithms can be complex to manage fewer switches for the
same number of voltage levels.

6.Hybrid Multilevel Inverters

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  Structure: Hybrid MLIs combine elements from different topologies, such as NPC, FC,
and CHB, to achieve desired properties in power quality, efficiency, and modularity. Some
hybrid designs integrate asymmetrical DC sources to increase the number of levels without
additional components.
 Advantages: Hybrid inverters can achieve high power quality and flexibility, often with
reduced component count compared to traditional designs.
 Challenges: Hybrid MLIs may require complex control strategies and precise component
selection to optimize the benefits of multiple topologies, and maintaining balanced voltages
can be complex.

Comparison and Selection Criteria

The choice of MLI topology depends on factors such as:

 Application requirements (power level, voltage range, and efficiency),

 Cost constraints (number of switches, capacitors, and diodes),
 Complexity of control (balancing and managing voltage levels),
 Harmonic performance (THD and waveform quality),
 Modularity and scalability (ease of maintenance and system expansion).

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LITERATURE REVIEW
 . Asymmetrical Multilevel Inverter Configurations

Asymmetrical MLI configurations are a popular approach to reduce switch count. These designs
utilize DC sources of different voltage levels, which allow for a higher number of output levels
with fewer switches.

 Key Findings: A study by Babaei et al. (2012) demonstrated an asymmetrical MLI using
different DC sources, achieving a significant reduction in the number of switches required
compared to conventional symmetrical topologies. Other researchers have expanded on
this approach by exploring the optimal selection of asymmetrical DC sources to balance
power quality with component minimization.
 Challenges: Voltage balancing and managing power flow between asymmetrical sources
remain challenges, requiring sophisticated control algorithms to ensure stable output.
 Hybrid Multilevel Inverters for Component Optimization

Hybrid MLIs combine elements from various topologies (such as Cascaded H-Bridge and Neutral
Point Clamped configurations) to reduce components while still delivering high power quality.

 Key Findings: Several studies, including one by Rodriguez et al. (2013), have introduced
hybrid MLIs that blend the benefits of different traditional topologies. For instance, hybrid
configurations combining CHB and NPC structures have shown potential in reducing
component count while maintaining a high number of voltage levels and low Total
Harmonic Distortion (THD).
 Challenges: Implementing hybrid designs requires precise component matching and
careful attention to voltage balancing. Complexity in control strategies can also increase as
different topologies are combined.

Reduced-Switch Cascaded H-Bridge (CHB) Topologies

Researchers have investigated modifications to the classic CHB topology, which traditionally
requires multiple isolated DC sources, aiming to reduce the number of H-bridge cells while still
achieving a sufficient number of voltage levels.

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  Key Findings: Work by Malinowski et al. (2014) introduced an optimized CHB design
with a reduced number of switches and isolated DC sources. By using fewer H-bridge cells
and asymmetrical DC sources, this configuration achieved efficient multilevel output while
minimizing component count.
 Challenges: Although effective, reduced-switch CHB inverters still require multiple
isolated DC sources, which can be challenging to implement in practical systems. This
limitation is particularly problematic for high-voltage applications requiring more than a
few H-bridge cells.
 Switch-Ladder and Modular Configurations

A relatively recent approach in reduced-switch MLI design is the switch-ladder configuration,

which stacks a minimal number of switches and capacitors in a ladder-like structure to achieve
multilevel output.

 Key Findings: Several studies, such as the work by Rashid et al. (2018), propose switch-
ladder topologies with a minimal switch and capacitor count. These designs are particularly
advantageous for low-power applications where space and cost constraints are critical.
They also provide modularity, making them suitable for flexible applications.
 Challenges: Switch-ladder MLIs can be limited in terms of scalability and may not provide
the high voltage levels required for certain applications. Additionally, voltage balancing
across capacitors can be challenging, especially with an increased number of levels.
 Resonant and Soft-Switching Techniques in Reduced-Switch MLIs

Soft-switching and resonant techniques have been applied to reduced-switch MLI designs to
improve efficiency by reducing switching losses.

 Key Findings: Research by Ahmed et al. (2019) demonstrates that incorporating soft-
switching techniques can significantly enhance efficiency and reduce thermal stress on
components in reduced-switch configurations. These techniques allow the inverter to
operate at lower frequencies, further minimizing power losses.
 Challenges: While effective, implementing soft-switching requires precise timing and
advanced control methods, increasing the complexity of the control algorithm. This
approach is often best suited for applications where efficiency is prioritized over simplicity.

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  . Control Strategies for Reduced-Switch MLIs

Control algorithms are critical to maintaining power quality and stability in reduced-switch MLIs.
Research has focused on optimizing control strategies to manage THD, voltage balancing, and
switch timing with minimal components.

 Key Findings: Advanced Pulse Width Modulation (PWM) techniques, such as Selective
Harmonic Elimination (SHE) and Space Vector PWM (SVPWM), have been adapted to
reduced-switch MLIs to achieve high-quality output. Studies by Sandeep et al. (2020) show
that implementing these advanced PWM methods can reduce harmonic distortion
significantly, even with fewer switches.
 Challenges: Reduced-switch topologies often require more complex control algorithms to
handle challenges like voltage balancing and harmonic distortion. Implementing these
algorithms can increase computational requirements and design complexity, particularly
for higher-level inverters.

EXISTING SOLUTIONS
PAPER 1:
DIODED CLAMPED MULTILEVEL INVERTER OF 3 LEVEL

The Diode-Clamped Multilevel Inverter (DCMLI), also known as the Neutral Point Clamped
(NPC) inverter, is one of the most common types of multilevel inverters used in medium to high
power applications. It operates by clamping intermediate voltage levels using diodes to create a
staircase waveform, effectively reducing Total Harmonic Distortion (THD) and improving power
quality. Here’s a detailed look at the 3-level version of the DCMLI:

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1. Topology and Structure

The 3-level Diode-Clamped MLI structure consists of:

 DC Bus: It has a single DC source split into two equal parts, creating three potential voltage
levels (positive, zero, and negative).
 Switches: Four switches per phase leg (S1, S2, S3, and S4), which are typically IGBTs or
MOSFETs.
 Diodes: Two clamping diodes per phase (D1 and D2) are used to create the neutral point
and clamp the intermediate voltage level.


 Circuit Description

Each leg of the 3-level DCMLI has four switches and two diodes, with two capacitors dividing the
DC voltage source. The capacitors provide a neutral point, which helps in generating the three
voltage levels: VdcV_{dc}Vdc, 000, and −Vdc-V_{dc}−Vdc.

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2. Operating Principle and Voltage Levels

The 3-level NPC inverter generates three output voltage levels:

1. Positive Voltage Level (+Vdc/2): The top two switches (S1 and S2) are ON, connecting
the output to the positive side of the DC bus.
2. Zero Voltage Level (0): The middle switches (S2 and S3) are ON, connecting the output
to the neutral point created by the capacitors.
3. Negative Voltage Level (-Vdc/2): The bottom two switches (S3 and S4) are ON,
connecting the output to the negative side of the DC bus.

By switching in this way, the inverter produces a three-step waveform at the output, which
approximates a sinusoidal wave when using appropriate PWM techniques.

3. Switching States

Each level is achieved by specific combinations of the switch states:

 Positive Half Cycle:

o S1 and S2 are ON, D1 and D2 are OFF, providing the output voltage
Vout=+Vdc/2V_{out} = +V_{dc}/2Vout=+Vdc/2.
 Zero Level (Neutral Point):
o S2 and S3 are ON, clamping the output at zero voltage, Vout=0V_{out} = 0Vout
=0.
 Negative Half Cycle:
o S3 and S4 are ON, D1 and D2 are OFF, providing the output voltage
Vout=−Vdc/2V_{out} = -V_{dc}/2Vout=−Vdc/2.

4. Advantages

 Lower Harmonic Distortion: The 3-level DCMLI generates a waveform closer to

sinusoidal, reducing THD compared to a conventional 2-level inverter.
 Reduced Voltage Stress: The voltage across each switch is half the total DC bus voltage,
allowing the use of lower-rated switches, which can be more efficient and economical.

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  Improved Efficiency: Lower switching losses compared to 2-level inverters, especially in
medium- and high-power applications.

5. Disadvantages

 Complex Control and Balancing: Voltage balancing across the capacitors can be
challenging, especially at higher levels, as it requires sophisticated control algorithms to
maintain stability.
 Increased Component Count: The use of additional diodes and capacitors makes the
design more complex and costly compared to simple 2-level inverters.

6. Applications

 Medium-Voltage Drives: Common in industrial motor drives where medium voltage and
high-power handling are necessary.
 Renewable Energy Systems: Used in grid-connected PV systems, wind energy
conversion systems, and other applications where power quality and efficiency are critical.

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  HVAC Systems: Employed in heating, ventilation, and air conditioning systems, where
efficient power conversion is essential.

7. Waveform Analysis

The 3-level DCMLI produces a three-step waveform for each phase, resembling a staircase. By
using modulation techniques like Pulse Width Modulation (PWM) or Space Vector PWM
(SVPWM), the inverter can approximate a sinusoidal waveform, effectively minimizing
harmonics and producing a high-quality AC output.

PAPER 2:
15 LEVEL INVERTER WITH REDUCED SWITCH
Asymmetrical Cascaded H-Bridge (ACHB) Inverter

 Description: This design uses different DC voltage magnitudes in each H-bridge module.
By choosing specific DC voltage ratios (e.g., binary or trinary scaling), a higher number
of output levels can be achieved without increasing the switch count proportionally.
 Switch Configuration: Instead of the usual 28 switches required for a symmetrical
cascaded H-bridge (CHB) 15-level inverter, asymmetrical DC sources can reduce the
number of H-bridges, and therefore, the switch count.
 Example Configuration: A configuration with three cascaded H-bridges might use DC
sources in a ratio like 1:3:9 to achieve the desired 15 levels, with only 10 switches

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 

Operating Principle of Reduced-Switch 15-Level Inverters

In each topology, the inverter switches are controlled to produce 15 discrete voltage levels in the
output. This usually includes:

 Positive Levels: Gradual steps from zero to maximum positive voltage.

 Zero Level: Achieved by turning on specific switches that connect the output to the
neutral point or common ground.
 Negative Levels: Steps from zero to maximum negative voltage, mirroring the positive
levels.

The output is typically generated through specific switching sequences to produce the staircase
waveform. This waveform approximates a sinusoidal shape more closely as the number of levels
increases, significantly reducing harmonic distortion.

3. Switching Scheme

A reduced-switch 15-level inverter requires a well-designed control strategy, often involving

PWM or Selective Harmonic Elimination (SHE) techniques. This control minimizes switching
losses and allows the system to produce high-quality output with fewer components.

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Switching Sequence:

 For each incremental level, specific switches turn ON or OFF in a pre-determined

pattern. As the switches activate in sequence, the voltage steps are added or subtracted
from the previous level to achieve the next level.
 PWM control further smooths the waveform by adjusting the timing of switches within
each level.

4. Advantages of Reduced-Switch 15-Level Inverter

 Lower Component Count: Fewer switches, diodes, and capacitors reduce overall system
size and complexity, resulting in a more compact and cost-effective design.
 Reduced Losses: Lower switch count decreases switching and conduction losses,
improving efficiency.
 Improved Power Quality: A 15-level output closely approximates a sinusoidal
waveform, significantly reducing Total Harmonic Distortion (THD).
 Lower Voltage Stress: Each switch handles only a fraction of the total DC voltage,
allowing for smaller, less expensive components.

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  Modularity: Some configurations allow for modular construction, which simplifies
maintenance and scaling.

5. Disadvantages and Challenges

 Complex Control Requirements: The switching scheme requires sophisticated

algorithms to manage the various voltage levels and balance them, especially for
asymmetrical topologies.
 Voltage Balancing: Capacitor-based configurations may face challenges in balancing
voltages across capacitors as the levels increase.
 Isolation Requirements: Asymmetrical configurations with multiple DC sources may
require isolated power supplies, which can be costly and complex to implement.

MAIN CIRCUIT

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CONCLUSION
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In conclusion, 3-phase reduced-switch multilevel inverters (MLIs) offer significant advantages in
terms of cost reduction, improved efficiency, and enhanced power quality compared to
conventional two-level inverters. By optimizing the number of switches required to generate a
multilevel output, reduced-switch MLI topologies effectively minimize the complexity, size, and
switching losses, making them ideal for medium- to high-power applications.

The key benefits of these reduced-switch topologies include:

 Lower THD (Total Harmonic Distortion): Through the generation of more voltage
levels, 3-phase reduced-switch MLIs produce a more sinusoidal output, significantly
reducing harmonic distortion and improving the overall power quality.
 Reduced Component Count: By employing innovative switching strategies, these
topologies require fewer components compared to traditional multilevel inverters, thereby
lowering the system's cost and complexity. This is particularly advantageous in
applications with strict cost constraints or limited space.
 Improved Efficiency: Reduced-switch designs reduce the number of switching devices in
the system, which minimizes switching losses and improves overall system efficiency,
particularly in high-power and high-frequency applications.
 Simplified Control: Reduced-switch MLIs often employ advanced modulation techniques
such as PWM (Pulse Width Modulation) or Space Vector PWM to manage the switching
actions and maintain the required voltage levels, leading to simpler control strategies than
those used in traditional MLI designs.

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