683XXC Maintenance Manual, Rev A - Performance Test
683XXC Maintenance Manual, Rev A - Performance Test
683XXC
SYNTHESIZED HIGH PERFORMANCE
SIGNAL GENERATOR
MAINTENANCE MANUAL
Anritsu’s obligation covers repairing or replacing products which prove to be defective during the
warranty period. Buyers shall prepay transportation charges for equipment returned to Anritsu for
warranty repairs. Obligation is limited to the original purchaser. Anritsu is not liable for consequen-
tial damages.
LIMITATION OF WARRANTY
The foregoing warranty does not apply to Anritsu connectors that have failed due to normal wear.
Also, the warranty does not apply to defects resulting from improper or inadequate maintenance by
the Buyer, unauthorized modification or misuse, or operation outside of the environmental specifi-
cations of the product. No other warranty is expressed or implied, and the remedies provided herein
are the Buyer’s sole and exclusive remedies.
TRADEMARK ACKNOWLEDGEMENTS
Adobe Acrobat is a registered trademark of Adobe Systems Incorporated.
NOTICE
Anritsu Company has prepared this manual for use by Anritsu Company personnel and customers
as a guide for the proper installation, operation, and maintenance of Anritsu Company equipment
and computor programs. The drawings, specifications, and information contained herein are the
property of Anritsu Company, and any unauthorized use or disclosure of these drawings, specifica-
tions, and information is prohibited; they shall not be reproduced, copied, or used in whole or in part
as the basis for manufacture or sale of the equipment or software programs without the prior writt-
ten consent of Anritsu Company.
Table of Contents
683XXC MM i
Table of Contents (Continued)
ii 683XXC MM
Table of Contents (Continued)
3-7 FREQUENCY SYNTHESIS TESTS . . . . . . . . 3-10
Test Setup . . . . . . . . . . . . . . . . . . . 3-10
Coarse Loop/ YIG Loop Test Procedure . . . . . 3-10
Fine Loop Test Procedure . . . . . . . . . . . . 3-11
3-8 SPURIOUS SIGNALS TEST: RF OUTPUT
SIGNALS <2 GHz . . . . . . . . . . . . . . . . . 3-12
Test Setup . . . . . . . . . . . . . . . . . . . 3-12
Test Procedure . . . . . . . . . . . . . . . . . 3-12
3-9 HARMONIC TEST: RF OUTPUT SIGNALS
FROM 2 TO 20 GHz . . . . . . . . . . . . . . . . 3-15
Test Setup . . . . . . . . . . . . . . . . . . . 3-15
Test Procedure (2 to 10 GHz) . . . . . . . . . . 3-16
Test Procedure (11 to 20 GHz) . . . . . . . . . 3-17
3-10 SINGLE SIDEBAND PHASE NOISE TEST . . . . 3-19
Test Setup . . . . . . . . . . . . . . . . . . . 3-19
Test Procedure . . . . . . . . . . . . . . . . . 3-20
3-11 POWER LEVEL ACCURACY AND FLATNESS
TESTS . . . . . . . . . . . . . . . . . . . . . . . . 3-23
Test Setup . . . . . . . . . . . . . . . . . . . 3-23
Power Level Accuracy Test Procedure . . . . . . 3-24
Power Level Flatness Test Procedure . . . . . . 3-25
3-12 AMPLITUDE MODULATION TEST . . . . . . . . 3-27
Test Setup . . . . . . . . . . . . . . . . . . . 3-27
AM Input Sensitivity Procedure. . . . . . . . . 3-28
3-13 FREQUENCY MODULATION TESTS . . . . . . . 3-30
Test Setup . . . . . . . . . . . . . . . . . . . 3-30
FM Input Sensitivity Procedure . . . . . . . . . 3-30
3-14 PULSE MODULATION TESTS: RISE TIME,
FALL TIME, OVERSHOOT, AND LEVEL . . . . 3-36
Test Setup . . . . . . . . . . . . . . . . . . . 3-36
Rise/Fall Time and Overshoot . . . . . . . . . . 3-37
Pulse Leveling Accuracy . . . . . . . . . . . . 3-38
3-15 PULSE MODULATION TEST: VIDEO
FEEDTHROUGH . . . . . . . . . . . . . . . . . . 3-40
Test Setup . . . . . . . . . . . . . . . . . . . 3-40
Test Procedure . . . . . . . . . . . . . . . . . 3-41
683XXC MM iii
Table of Contents (Continued)
Chapter 4 - Calibration
4-1 INTRODUCTION . . . . . . . . . . . . . . . . . . . 4-3
4-2 RECOMMENDED TEST EQUIPMENT . . . . . . . 4-3
4-3 TEST RECORDS . . . . . . . . . . . . . . . . . . . 4-3
4-4 CALIBRATION FOLLOWING SUBASSEMBLY
REPLACEMENT. . . . . . . . . . . . . . . . . . . 4-4
4-5 CONNECTOR AND KEY LABEL NOTATION . . . 4-4
4-6 INITIAL SETUP. . . . . . . . . . . . . . . . . . . . 4-7
Interconnection . . . . . . . . . . . . . . . . . 4-7
PC Setup — Windows 3.1 . . . . . . . . . . . . 4-8
PC Setup — Windows 95/Windows 98 . . . . . . 4-10
4-7 PRELIMINARY CALIBRATION . . . . . . . . . . 4-13
Equipment Setup . . . . . . . . . . . . . . . . 4-13
Calibration Steps . . . . . . . . . . . . . . . . 4-14
Alternate Reference Oscillator Calibration . . . 4-17
4-8 SWITCHED FILTER SHAPER CALIBRATION . . 4-19
Equipment Setup . . . . . . . . . . . . . . . . 4-19
Log Amplifier Zero Calibration . . . . . . . . . 4-20
Limiter DAC Adjustment . . . . . . . . . . . . 4-20
Shaper DAC Adjustment . . . . . . . . . . . . 4-22
4-9 RF LEVEL CALIBRATION . . . . . . . . . . . . . 4-23
4-10 ALC SLOPE CALIBRATION . . . . . . . . . . . . 4-24
Equipment Setup . . . . . . . . . . . . . . . . 4-24
ALC Slope DAC Adjustment . . . . . . . . . . 4-25
4-11 ALC BANDWIDTH CALIBRATION . . . . . . . . 4-28
Equipment Setup . . . . . . . . . . . . . . . . 4-28
Bandwidth Calibration . . . . . . . . . . . . . 4-28
iv 683XXC MM
Table of Contents (Continued)
4-12 AM CALIBRATION . . . . . . . . . . . . . . . . . 4-30
Equipment Setup . . . . . . . . . . . . . . . . 4-30
AM Calibration Procedure . . . . . . . . . . . 4-31
4-13 FM CALIBRATION . . . . . . . . . . . . . . . . . 4-34
Equipment Setup . . . . . . . . . . . . . . . . 4-34
FM Calibration Procedure . . . . . . . . . . . 4-35
4-14 PHASE MODULATION (FM) CALIBRATION . . . 4-41
Equipment Setup . . . . . . . . . . . . . . . . 4-41
FM Calibration Procedure . . . . . . . . . . . 4-42
Chapter 5 - Troubleshooting
5-1 INTRODUCTION . . . . . . . . . . . . . . . . . . . 5-3
5-2 RECOMMENDED TEST EQUIPMENT . . . . . . . 5-3
5-3 ERROR AND WARNING/STATUS MESSAGES. . . 5-3
Self-Test Error Messages. . . . . . . . . . . . . 5-3
Normal Operation Error and Warning/
Status Messages . . . . . . . . . . . . . . . . 5-7
5-4 MALFUNCTIONS NOT DISPLAYING AN
ERROR MESSAGE . . . . . . . . . . . . . . . . . 5-10
5-5 TROUBLESHOOTING TABLES . . . . . . . . . . 5-10
683XXC MM v
Table of Contents (Continued)
vi 683XXC MM
Table of Contents (Continued)
Appendix A - Test Records
A-1 INTRODUCTION . . . . . . . . . . . . . . . . . . . A-1
683XXC MM vii/viii
Chapter 1
General Information
Table of Contents
1-2 INTRODUCTION This chapter provides a general description of the Series 683XXC Syn-
thesized High Performance Signal Generator, its identification num-
ber, related manuals, and options. Information is included concerning
level of maintenance, replaceable subassemblies and RF components,
exchange assembly program, and preventive maintenance. Static-
sensitive component handling precautions and lists of exchangeable
subassemblies and recommended test equipment are also provided.
1-3 DESCRIPTION The Series 683XXC Synthesized High Performance Signal Generators
are microprocessor-based, synthesized signal sources with high resolu-
tion phase-lock capability. They generate both discrete CW frequencies
and broad (full range) and narrow band sweeps across the frequency
range of 10 MHz to 65 GHz. All functions of the signal generators are
fully controllable locally from the front panel or remotely (except for
power on/standby) via the IEEE-488 General Purpose Interface Bus
(GPIB).
683XXC MM 1-3
GENERAL 683XXC
INFORMATION MODELS
68317C 0.01 – 8.4 GHz +13.0 dBm +11.0 dBm +9.0 dBm
68337C 2.0 – 20.0 GHz +13.0 dBm +11.0 dBm +3.0 dBm
68347C 0.01 – 20.0 GHz +13.0 dBm +11.0 dBm +3.0 dBm
0.01 – 2.0 GHz +13.0 dBm +11.0 dBm
68367C 2.0 – 20.0 GHz +9.0 dBm +7.0 dBm Not Available
20.0 – 40.0 GHz +6.0 dBm +3.0 dBm
0.01 – 2.0 GHz +12.0 dBm +10.0 dBm
2.0 – 20.0 GHz +10.0 dBm +8.5 dBm
68377C Not Available
20.0 – 40.0 GHz +2.5 dBm 0.0 dBm
40.0 – 50.0 GHz +2.5 dBm –1.0 dBm
0.01 – 2.0 GHz +12.0 dBm +10.0 dBm
2.0 – 20.0 GHz +10.0 dBm +8.5 dBm
68387C 20.0 – 40.0 GHz +2.5 dBm 0.0 dBm Not Available
40.0 – 50.0 GHz +2.0 dBm –1.5 dBm
50.0 – 60.0 GHz +2.0 dBm –2.0 dBm
0.01 – 2.0 GHz +12.0 dBm
2.0 – 20.0 GHz +10.0 dBm
68397C 20.0 – 40.0 GHz +2.5 dBm Not Available Not Available
40.0 – 50.0 GHz 0.0 dBm
50.0 – 65.0 GHz –2.0 dBm
Note: In models with Option 22 that have a high-end frequency of £20 GHz, rated output power is reduced by 1 dB.
In models with Option 22 that have a high-end frequency of >20 GHz, rated output power is reduced by 2 dB.
1-4 683XXC MM
GENERAL IDENTIFICATION
INFORMATION NUMBER
1-4 IDENTIFICATION All Anritsu instruments are assigned a unique six-digit ID number,
NUMBER such as “875012.” The ID number is imprinted on a decal that is af-
fixed to the rear panel of the unit. Special-order instrument configura-
tions also have an additional special serial number tag attached to the
rear panel of the unit.
1-5 ELECTRONIC MANUAL This manual is available on CD ROM as an Adobe Acrobat Portable
Document Format (*.pdf) file. The file can be viewed using Acrobat
Reader, a free program that is also included on the CD ROM. The file
is “linked” such that the viewer can choose a topic to view from the
displayed “bookmark” list and “jump” to the manual page on which the
topic resides. The text can also be word-searched. Contact Anritsu
Customer Service for price and availability.
1-6 RELATED MANUALS This is one of a four manual set that consists of an Operation Manual,
a GPIB Programming Manual, a SCPI Programming Manual, and a
Maintenance Manual.
683XXC MM 1-5
GENERAL
INFORMATION OPTIONS
1-6 683XXC MM
GENERAL
INFORMATION OPTIONS
683XXC MM 1-7
GENERAL LEVEL OF
INFORMATION MAINTENANCE
1-9 STATIC-SENSITIVE The 683XXC contains components that can be damaged by static elec-
COMPONENT HANDLING tricity. Figure 1-2 illustrates the precautions that should be followed
PRECAUTIONS when handling static-sensitive subassemblies and components. If fol-
lowed, these precautions will minimize the possibilities of static-shock
damage to these items.
NOTE
Use of a grounded wrist strap when removing and/or replac-
ing subassemblies or components is strongly recommended.
1-8 683XXC MM
GENERAL STATIC-SENSITIVE COMPONENT
INFORMATION HANDLING PRECAUTIONS
1. Do not touch exposed contacts 2. Do not slide static sensitive 3. Do not handle static sensitive
on any static sensitive component across any surface. components in areas where the
component. floor or work surface covering
is capable of generating a
static charge.
4. Wear a static-discharge wrist- 5. Label all static sensitive de- 6. Keep component leads shorted
band when working with static vices. together whenever possible.
sensitive components.
7. Handle PCBs only by their 8. Lift & handle solid state de- 9. Transport and store PCBs and
edges. Do not handle by the vices by their bodies – never other static sensitive devices
edge connectors. by their leads. in static-shielded containers.
683XXC MM 1-9
GENERAL PREVENTIVE
INFORMATION MAINTENANCE
1-10 PREVENTIVE The 683XXC must always receive adequate ventilation. A blocked fan
MAINTENANCE filter can cause the instrument to overheat and shut down. Check and
clean the rear panel fan honeycomb filter periodically. Clean the fan
honeycomb filter more frequently in dusty environments. Clean the fil-
ter as follows.
Step 1 Remove the filter guard from the rear panel by pull-
ing out on the four panel fasteners holding them in
place (Figure 1-3).
1-10 683XXC MM
GENERAL START UP
INFORMATION CONFIGURATION
1-11 STARTUP The 683XXC comes from the factory with a jumper across pins 2 and 3
CONFIGURATIONS of front panel connector J12 (Figure 1-4). In this configuration, con-
necting the instrument to line power automatically places it in operate
mode (front panel OPERATE LED on).
Step 5 Install the top cover and connect the signal genera-
tor to line power. The instrument should come up in
standby mode.
683XXC MM 1-11
GENERAL RECOMMENDED
INFORMATION TEST EQUIPMENT
1-12 RECOMMENDED TEST Table 1-2 provides a list of recommended test equipment needed for
EQUIPMENT the performance verification, calibration, and troubleshooting proce-
dures presented in this manual.
Table 1-2. Recommended Test Equipment (1 of 2)
CRITICAL RECOMMENDED
INSTRUMENT
SPECIFICATION MANUFACTURER/MODEL USAGE (1)
Spectrum Analyzer, Frequency Range: 0.01 to 65 GHz Tektronix, Model 2794, with C, P, T
with Resolution Bandwidth: 10 Hz External Mixers:
External Mixers WM780K (18 to 26.5 GHz)
and WM780A (26.5 to 40 GHz)
Diplexer Assy WM780U (40 to 60 GHz)
WM780E (60 to 90 GHz)
Diplexer Assy: 015-0385-00
Spectrum Analyzer Frequency Range: 20 Hz to 40 MHz Hewlett-Packard, Model 3585B P
Resolution Bandwidth: 3 Hz
Frequency Counter Frequency Range: 0.01 to 40 GHz Anritsu Model MF2414A C, P
Input Impedance: 50W
Resolution: 1 Hz
Other: External Time Base Input
Power Meter, Power Range: –30 to +20 dBm Anritsu Model ML2437A or ML2438A, C, P
with (1mW to 100mW) with
Power Power Sensors:
Sensors MA2474A (0.01 to 40 GHz)
MA2475A (0.01 to 50 GHz)
Digital Multimeter Resolution: 4-1/2 digits (to 20V) John Fluke, Inc., Model 8840A, with C, T
DC Accuracy: 0.002% +2 counts Option 8840A-09K (True RMS AC)
DC Input Impedance: 10 MW
AC Accuracy: 0.07% +100 counts
(to 20 kHz)
AC Input Impedance: 1 MW
Frequency Reference Frequency: 10 MHz Absolute Time Corp., Model 300 P
Accuracy: 5 x 10-12 parts/day
Function Generator Output Voltage: 2 volts peak-to-peak Hewlett-Packard, Model 33120A C
Functions: 0.1 Hz to 100 kHz sine and
square waveforms
Modulation Analyzer Frequency Input: 10 MHz Hewlett-Packard, Model 8901A P
(or the IF of the Spectrum Analyzer)
AM Depth: 0% to 90%
AM Modulation Rates: DC to 100 kHz
Filters: 20 kHz lowpass, 300 Hz highpass
Oscilloscope Bandwidth: DC to 150 MHz Tektronix, Inc. Model TAS485 P, T
Vertical Sensitivity: 2mV/division
Horizontal Sensitivity: 50 ns/division
Mixer Frequency Range: 2 to 26 GHz Miteq, Model DB0226LA1 P
1-12 683XXC MM
GENERAL RECOMMENDED
INFORMATION TEST EQUIPMENT
NOTES: (1) P = Performance Verification Tests (Chapter 3); C = Calibration (Chapter 4); T = Troubleshooting (Chapter 5)
683XXC MM 1-13
GENERAL EXCHANGE
INFORMATION ASSEMBLY PROGRAM
Please have the exact model number and serial number of your unit
available when requesting this service, as the information about your
unit is filed according to the instrument’s model and serial number.
For more information about the program, contact your local sales rep-
resentative or call your local Anritsu service center. Refer to Table 1-5,
on page 1-18, for a list of current Anritsu service centers.
1-14 REPLACEABLE Table 1-3 lists those replaceable subassemblies and RF components of
SUBASSEMBLIES the 683XXC that are presently covered by the Anritsu exchange as-
AND PARTS sembly program. Table 1-4, on page 1-16, lists common replaceable
parts for the 683XXC that are not presently on the exchange assembly
program.
All parts listed in Tables 1-3 and 1-4 may be ordered from your local
Anritsu service center.
1-14 683XXC MM
GENERAL
INFORMATION PARTS LIST
RF Components
683XXC MM 1-15
GENERAL
INFORMATION PARTS LIST
RF Components (Continued)
1-16 683XXC MM
GENERAL
INFORMATION PARTS LIST
683XXC MM 1-17
GENERAL ANRITSU
INFORMATION SERVICE CENTERS
1-18 683XXC MM
Chapter 2
Functional Description
Table of Contents
2-2 MAJOR SUBSYSTEMS The signal generator circuitry consists of various distinct subsystems
that are contained on one or more printed circuit board (PCB) assem-
blies or in microwave components located on the RF deck. The follow-
ing paragraphs identify the subsystems that make up the instrument
and provide a brief description of each. Figure 2-1 (page 2-6) is an
overall block diagram of a typical 683XXC.
683XXC MM 2-3
FUNCTIONAL MAJOR
DESCRIPTION SUBSYSTEMS
2-4 683XXC MM
FUNCTIONAL MAJOR
DESCRIPTION SUBSYSTEMS
YIG, SDM, The A14 YIG, SDM, SQM Driver PCB supplies the
SQM Driver main tuning current and bias voltages for the YIG-
tuned oscillator. It also provides bias voltages for
the Down Converter assembly and the Switched Fil-
ter assembly. For models with a frequency range
greater than 20 GHz, the A14 PCB supplies bias
voltages for the Switched Doubler Module (SDM)
and the Source Quadrupler Module (SQM). In addi-
tion, it provides modulator drive signals for the
SQM.
683XXC MM 2-5
FUNCTIONAL MAJOR
DESCRIPTION SUBSYSTEMS
F ro n t P a n e l R e a r P a n e l
C o n n e c to rs In p u ts O u tp u ts P o w e r In p u t
A M IN T o A 1 0 A L C P C B 1 0 M H z R E F IN T o A 3
( V ia A 2 0 M o th e r b o a r d ) R e fe re n c e L o o p
F M IN T o A 1 1 F M P C B F ro m R F D e c k R F O U T P U T
( O p tio n 9 )
IN T o A 6 P u ls e F ro m A 3 1 0 M H Z R E F O U T A
G e n e ra to r P C B R e fe re n c e L o o p
T o A 1 0 A L C P C B 1 1 0 /2 2 0 V A C
E X T A L C IN F M IN T o A 1 1 F M P C B
( V ia A 2 0 M o th e r b o a r d )
P o w e r S u p p ly
R F O U T P U T F ro m R F D e c k A M IN A M O U T
+ 5 V
E X T A L C IN F M O U T + 9 V
+ 1 6 5 V
P U L S E T R IG G E R IN L in e B r id g e
H O R IZ O U T A 1 9
F ilte r F u s e R e c tifie r / -1 6 5 V A 1 8 + 1 5 V
L C D D o u b le r L in e P o w e r
P U L S E V ID E O O U T C o n d itio n e r A 1 5 -1 5 V
S u p p ly
A 2 1 R e g u la to r + 2 4 V
P U L S E S Y N C O U T P /O R e a r
R e a r -2 8 V
C a s tin g A s s y
P a n e l P C B
A 1 C o n tro l
F ro n t L C D
C o n tro l A U X
P a n e l I/O 4 0 0 K H z
(F ro m A 6 )
+ 2 4 V + 2 4 V
K e y b o a rd K e y b o a rd (F ro m A 2 P C B )
M a tr ix E n c o d e r S E R IA L R e a r P a n e l P u ls e S ig n a ls (T o A 2 P C B )
I/O B
A 2 1 -3
B N C / A U X
L in e + 2 4 V I/0 C O N N E C T O R
L in e (T o A 1 8
S w itc h S w itc h P C B R e a r P a n e l S ig n a ls
L o g ic P C B ) C
S e r ia l I/O
+ 2 4 V
(F ro m
A 1 5 P C B )
O p tic a l P h a s e A / P h a s e B D a ta
E n c o d e r
R o ta ry A 1 6
D a ta C P U D
K n o b A 2 IE E E -4 8 8 G P IB G P IB B u s In te rfa c e
F ro n t P a n e l
C o n tro l
A 1 7
C P U D ig ita l
C o a x ia l C a b le s C o n tro l
D a ta a n d A d d re s s B u s
E
( C o n tin u e d o n S h e e t 2 )
2-6 683XXC MM
FUNCTIONAL MAJOR
DESCRIPTION SUBSYSTEMS
S e r ia l D a ta
S e r ia l D a ta
S e r ia l D a ta 1 0 M H z R E F O U T
R e a l P a n e l B N C
1 0 M H z
A 3 A 4 1 0 M H z A 5 1 0 M H z (T o A 6 )
5 0 0 M H z
R e fe re n c e C o a rs e F in e 2 6 .8 4 3 5 4 5 6 M H z
L o o p 5 0 0 M H z L o o p L o o p ( T o A 8 a n d A 1 3 - O p tio n 2 2 )
(T o D o w n 2 1 9 .5 - 2 4 5 M H z
C o n v e rte r)
1 0 M H z R E F IN F re q u e n c y A 7
R e a r P a n e l B N C
S y n th e s is Y IG
L o o p 2 1 .5 - 4 0 M H z
Y IG L o o p E rro r
A 1 0 M H z S a m p le d
H I-S T A B 2 - 2 0 G H z
X T A L O S C R F
( O p tio n )
F M IN F ro n t P a n e l B N C
A 1 1 F M F M IN R e a r P a n e l B N C R F D e c k
In te rn a l F M (F ro m A 8 ) S w itc h e d F ilte r A s s y S w itc h e d D o u b le r M o d u le
W ID E F M 2 0 - 2 5 G H z 0 .0 1 - D ir e c tio n a l
3 .3 G H z L P F
4 0 G H z C o u p le r 1 1 0 d B
0 .0 1 - 2 0 G H z 2 5 - 3 2 G H z
F M 5 .5 G H z L P F x 2 S te p R F O u tp u t
A 1 4 M a in 3 2 - 4 0 G H z A tte n u a to r 0 .0 1 - 4 0 G H z
Y IG , S D M 8 .4 G H z L P F 2 0 G H z L P F ( O p tio n )
D r iv e r B ia s
A L C
(F ro m A 1 0 ) 2 - 2 0 G H z 8 .5 G H z L P F 1 3 .5 G H z L P F
Y IG
F re q O s c illa to r S te p
F re q B ia s S w itc h
B a n d A tte n u a to r
T u n in g (F ro m A 1 4 ) C o n tro l
S e le c t C o n tro l
B ia s ( to S D M )
B 6 .5 1 - 8 .5 G H z
M o d u la to r P u ls e D o w n C o n v e rte r A s s y
A 1 2
C o n tro l 0 .0 1 - 2 G H z
A n a lo g
C In s tr u c tio n A n a lo g
In s tr u c tio n 5 0 0 M H z
(F ro m A 3 )
P u ls e V id e o / P u ls e S y n c ( T o R e a r P a n e l) S w itc h C o n tr o l
A 9
P u ls e T r ig g e r In P IN 0 .0 1 - 1 0 M H z
A 6 M o d u la to r C o n tr o l (T o R F D e c k
C o n tro l
IN F ro n t P a n e l B N C P u ls e P u ls e v ia D ip le x e r s )
1 0 M H z (F ro m A 5 ) G e n e ra to r 4 0 0 K H z (T o A 1 8 )
D S e r ia l D a ta S a m p le / H o ld
A L C
R e a r P a n e l S ig n a ls A 1 3
A L C /A M /P u ls e D e te c te d (T o A 1 4 ) A L C
1 0 M H z
F M O u t M o d u la tio n 0 .0 1 - 2 G H z R F D e te c te d D D S
A 8 S a m p le / H o ld 2 - 4 0 G H z R F
2 6 .8 4 3 5 4 5 6 M H z A M O u t R e a r P a n e l E X T A L C IN ( O p tio n 2 2 )
F u n c tio n A 1 0
(F ro m A 5 ) G e n e ra to r F M (T o A 1 1 ) E X T A L C IN F ro n t P a n e l B N C
R e a r P a n e l A M IN A L C
A M 2 6 .8 4 3 5 4 5 6 M H z
A M IN F ro n t P a n e l B N C (F ro m A 5 )
In te rn a l A M
D a ta a n d A d d re s s B u s
E
( C o n tin u e d F r o m S h e e t 1 )
683XXC MM 2-7
FUNCTIONAL MAJOR
DESCRIPTION SUBSYSTEMS
2-8 683XXC MM
FUNCTIONAL FREQUENCY
DESCRIPTION SYNTHESIS
2-3 FREQUENCY SYNTHESIS The frequency synthesis subsystem provides phase-lock control of the
683XXC output frequency. It consists of four phase-lock loops, the Ref-
erence Loop, the Coarse Loop, the Fine Loop, and the YIG Loop. The
four phase-lock loops, operating together, produce an accurately syn-
thesized, low-noise RF output signal. Figure 2-2 (page 2-11) is an over-
all block diagram of the frequency synthesis subsystem. The following
paragraphs describe phase-lock loops and the overall operation of the
frequency synthesis subsystem.
683XXC MM 2-9
FUNCTIONAL FREQUENCY
DESCRIPTION SYNTHESIS
2-10 683XXC MM
FUNCTIONAL FREQUENCY
DESCRIPTION SYNTHESIS
A 3 R e fe re n c e L o o p A 4 C o a rs e L o o p 1 0 M H z 1 0 M H z A 5 F in e L o o p
P h a s e
F re q u e n c y E rro r 2 0 6 - 3 9 1 M H z
1 0 M H z R E F In ÷ 1 0 ÷ 1 0 0
S y n th e s iz e r V C O
P h a s e / 1 0 M H z 1 0 M H z 1 M H z 1 0 0 k H z
F re q u e n c y ÷ 1 0
D e te c to r P h a s e 2 1 9 .5 -
P h a s e / C o a rs e P h a s e / 1 0 0 k H z
E rro r 2 4 5 M H z
F re q u e n c y L o o p ÷ 2 F re q u e n c y
D e te c to r O s c illa to r D e te c to r 9 - 1 0 M H z
P h a s e
E rro r
1 M H z P h a s e E rro r
P h a s e
1 0 0 M H z 1 0 0 M H z 5 0 0 M H z 1 0 - 6 1 M H z 4 3 9 - 4 9 0 M H z 9 - 1 0 M H z P h a s e / E rro r F in e 2 1 .5 - 4 0 M H z
1 0 M H z F re q u e n c y 2 6 .8 4 M H z D ig ita l
R e fe re n c e x 5 F re q u e n c y L o o p ÷ 1 0
H i- S ta b ility D iv id e r V C X O S y n th e s iz e r 2 1 5 -
O s c illa to r D e te c to r O s c ila to r
X T A L O s c illa to r 4 0 0 M H z
( O p tio n a l)
5 0 0 M H z
D iv id e r
C o n tro l
A 1 1 F M A 7 Y IG L o o p
F M S w e e p
(F ro m A 1 2 P C B ) S a m p le r
S R D 1 .9 7 5 5 to 2 0 G H z
2 1 9 .5 - 2 4 5 M H z H a r m o n ic s
F M In
(F ro n t P a n e l o r
R e a r P a n e l) F M
2 1 .5 -
In te rn a l F M S w e e p
4 0 M H z IF
(F ro m A 8 P C B ) ÷ 1 2 8
F M
F M
L P F Y IG L o o p E rro r P h a s e /
F M F re q u e n c y
C O IL ÷ 1 2 8
D e te c to r 2 1 .5 - 4 0 M H z
D R IV E R
S a m p le d 2 - 2 0 G H z R F
P /O S w itc h e d F ilte r
A 1 4 Y IG , S D M D r iv e r Y IG - T u n e d
O s c illa to r
F M
M a in M a in 2 - 2 0 G H z
T u n e C o il R F O u t
(F ro m A 1 2 P C B ) D r iv e r s B ia s
+ 1 8 V G B ia s
R e g u la to r s
M o d u la to r P u ls e
C o n to l
683XXC MM 2-11
FUNCTIONAL FREQUENCY
DESCRIPTION SYNTHESIS
2-12 683XXC MM
FUNCTIONAL FREQUENCY
DESCRIPTION SYNTHESIS
0.01 to 2 GHz
RF output frequencies of 0.01 to 2 GHz are gener-
ated by down converting the fundamental frequen-
cies of 6.51 to 8.5 GHz. This is achieved using a
6.5 GHz local oscillator signal that is phase locked
to the 500 MHz output of the Reference Loop. Pre-
cise control of the 0.01 to 2 GHz frequencies to
1 kHz (0.1 Hz with Option 11) resolution is accom-
plished by phase-lock control of the 6.51 to 8.5 GHz
fundamental frequencies prior to down conversion.
20 to 40 GHz
RF output frequencies of 20 to 40 GHz are produced
by doubling the 10 to 20 GHz fundamental frequen-
cies. Phase-lock control of the 10 to 20 GHz funda-
mental frequencies,accomplished prior to doubling,
ensures precise control of the 20 to 40 GHz frequen-
cies to 1 kHz (0.1 Hz with Option 11) resolution.
40 to 65 GHz
RF output frequencies of 40 to 65 GHz are devel-
oped by quadrupling the 10 to 16.25 GHz fundamen-
tal frequencies (refer to Figure 2-7, page 2-24).
Precise control of the 40 to 65 GHz to 1 kHz (0.1 Hz
with Option 11) resolution is achieved by phase-lock
control of the 10 to 16.25 GHz fundamental frequen-
cies prior to quadrupling.
683XXC MM 2-13
FUNCTIONAL FREQUENCY
DESCRIPTION SYNTHESIS
2-14 683XXC MM
FUNCTIONAL ALC/AM/PULSE
DESCRIPTION MODULATION
2-4 ALC/AM/PULSE The ALC, AM, and pulse modulation subsystem provides automatic
MODULATION level control (ALC), amplitude modulation (AM), and pulse modulation
of the signal generator’s RF output signal. The ALC loop consists of
circuits located on the A10 ALC PCB, the A9 PIN Control PCB, and
the A14 YIG, SDM, SQM Driver PCB. These circuits interface with
the Switched Filter assembly, the Down Converter assembly, the
Source Quadrupler Module (SQM), and the Directional Coupler/Level
Detector (all located on the RF deck). AM modulation circuits (located
on the A10 ALC PCB) are included in this loop.
683XXC MM 2-15
FUNCTIONAL ALC/AM/PULSE
DESCRIPTION MODULATION
NOTE
The instrument uses two internal level de-
tection circuits. For frequencies <2 GHz,
the level detector is part of the Down Con-
verter. The signal from this detector is
routed to the A10 ALC PCB as the Detector
0 input. For frequencies ³2 GHz, the level
detector is part of the main Directional
Coupler. The signal from this detector is
routed to the A10 ALC PCB as the Detector
1 input.
External Leveling
In the external leveling mode, an external detector
or power meter monitors the RF output level of the
683XXC instead of an internal level detector. The
signal from the external detector or power meter
goes to the A10 ALC PCB from the front or rear
panel inputs. The ALC controls the RF power output
level as previously described.
ALC Slope
During analog sweeps, a slope-vs-frequency signal,
from the A12 Analog Instruction PCB, is summed
with the level reference and detector inputs into the
ALC loop. The Slope DAC, under the control of the
CPU, adjusts this ALC slope signal to compensate
for an increasing or decreasing output power-vs-
frequency characteristic caused by the level detec-
tors and (optional) step attenuator. In addition, the
Slope DAC lets the user adjust for the slope-vs-
frequency characteristics of external components.
2-16 683XXC MM
FUNCTIONAL ALC/AM/PULSE
DESCRIPTION MODULATION
P /O A 1 0 P C B P /O R F D e c k 1 0 - 1 6 .2 5 G H z
4 0 -
S o u rc e 6 5 G H z
Q u a d r u p le r
E x te rn a l A M M o d u le
A M A M 0 .0 1 - L e v e l T o S te p
(F ro m F ro n t / L O G A M P
IN P U T C A L 0 .0 1 - 2 0 G H z F o rw a rd 6 5 G H z D e te c to r A tte n u a to r
R e a r P a n e l) S w itc h e d
S E N S D A C C o u p le r o r
F ilte r
D A C R F O u tp u t
In te rn a l A M S w itc h e d
2 - 2 0 G H z D o u b le r
(F ro m A 8 P C B ) Y IG 0 .0 1 - D e te c to r 1
M o d u le
O s c illa to r 4 0 G H z
0 .0 1 - 2 G H z
A L C S lo p e S L O P E D o w n
(F ro m A 1 2 P C B ) D A C C o n v e rte r
D e te c to r 0
P u ls e
D 0 - D 1 5 M o d u la to r C o n tr o l
F ro m L _ S E L 3 E P L D
C P U A 0 1 - A 0 3
S w itc h N o n - P u ls e P /O A 9 P C B
C o n tro l L e v e l A m p
C ir c u its A L C
A L C S h a p e r/ M o d u la to r
D e te c to r L e v e l A L C A m p
G a in C o n tro l D r iv e r
C A L R E F
D A C D A C C A L M o d u la to r C o n tr o l
D A C
P u ls e
D 0 - D 1 5 A d d re s s / S h a p e r
E x te rn a l A L C L e v e l A m p
L . S E L 2 D a ta
(F ro m F ro n t / F ix e d A 0 1 - A 0 2 L a tc h e s
D A C P /O A 1 4 P C B
R e a r P a n e l) G a in (F ro m C P U )
D e te c to r 1 D e te c to r L o g
M U X A m p S h a p e r/ D r iv e r /
D e te c to r 0 A m p A m p
S a m p le /H o ld B u ffe r
S a m p le /H o ld P /O A 6 P C B A m p
C o n tro l S e r ia l D a ta S e r ia l/
(F ro m P a r a lle l
A 1 6 P C B ) C o n v e rte r
1 0 M H z P u ls e
(F ro m A 5 P C B ) P u ls e
E x te r n a l P u ls e In p u ts G e n e ra to r
S a m p le / H o ld
( F r o m F r o n t / R e a r P a n e l)
683XXC MM 2-17
FUNCTIONAL ALC/AM/PULSE
DESCRIPTION MODULATION
Power Sweep
In this mode, the CPU has the ALC step the RF out-
put through a range of levels specified by the user.
This feature can be used in conjunction with the
sweep mode to produce a set of identical frequency
sweeps, each with a different RF power output level.
Amplitude Modulation
Amplitude modulation (AM) of the RF output signal
is accomplished by summing an external or internal
modulating signal into the ALC loop. External
modulating signals come from the front panel or
rear panel AM IN inputs; the internal modulating
signal comes from the A8 Function Generator PCB.
The AM Input Sensitivity DAC and the AM Calibra-
tion DAC, under the control of the CPU, adjust the
modulating signal for the proper amount of AM in
both the linear (log amp in) and the log (log amp by-
passed) modes of operation. The adjusted modulat-
ing signal is summed with the level reference, slope,
and detector inputs into the ALC loop. This pro-
duces an ALC control signal that varies with the
modulating signal. The action of the ALC loop then
causes the envelope of the RF output signal to track
the modulation signal.
2-18 683XXC MM
FUNCTIONAL RF DECK
DESCRIPTION ASSEMBLIES
2-5 RF DECK ASSEMBLIES The primary purpose of the RF deck assembly is to generate CW and
swept frequency RF signals and route these signals to the front panel
RF OUTPUT connector. It is capable of generating RF signals in the
frequency range of 0.01 to 65 GHz (0.00001 to 65 GHz with Option 22).
683XXC MM 2-19
FUNCTIONAL RF DECK
DESCRIPTION ASSEMBLIES
2-20 683XXC MM
FUNCTIONAL RF DECK
DESCRIPTION ASSEMBLIES
S w itc h e d F ilte r A s s y . - D 4 5 1 9 6 ( S ta n d a r d )
2 -8 .4 G H z - D 4 5 2 0 0 ( O p tio n 1 5 B )
Y IG O s c illa to r 3 .3 G H z L P F
> + 1 5 d B m (S td .)
B IA S M o d u la to r
J 6 5 .5 G H z L P F > + 2 0 d B m (O p t. 1 5 B ) D ir e c tio n a l
> + 4 d B m C o u p le r S te p R F O u tp u t
M A IN 8 .4 G H z L P F 2 0 G H z L P F A tte n u a to r
J 2 ( O p tio n ) 0 .0 1 - 8 .4 G H z
R F P a th
F M
w ith (0 .0 0 0 0 1 - 8 .4 G H z
8 .5 G H z L P F
1 3 .5 G H z L P F O p tio n 2 2 D ip le x e r w ith O p tio n 2 2 )
A C
2 9 8 6 0
B
J 5 J 7 J 3 J 1 L e v e l C o n tro l
L o s s A - C < 2 d B C o n tro l
> + 1 7 d B m L o s s B - C < 2 d B
C o n tro l
M o d u la to r P u ls e S w itc h
C o n tro l L o s s A - C < 1 .5 d B
C o n tro l 0 .0 0 0 0 1 - 2 G H z L o s s B - C < 1 .5 d B
S a m p le r D o w n C o n v e rte r A s s y .
(-7 to -1 4 d B m
ty p ic a l) D 2 7 3 3 0 0 .0 1 - 2 G H z C
J 3 R F P a th w ith O p tio n 2 2 0 .0 1 - 1 0 M H z A 1 3
J 1
L P F
> + 1 6 d B m
A
D ip le x e r B D D S
6 .5 1 - 8 .5 G H z 4 6 5 0 4 > + 1 5 d B m ( O p tio n 2 2 )
6 .5 G H z
J 2
5 0 0 M H z
C o n tro l
L e v e l
C o n tro l
NOTE
If the Electronic Step Attenuator (Option 2E) is installed,
the 0.01 to 10 MHz signal (Option 22) is inserted at the
Step Attenuator. Diplexers (P/Ns 29860 and 46504) are
not required.
683XXC MM 2-21
FUNCTIONAL RF DECK
DESCRIPTION ASSEMBLIES
2 -2 0 G H z S w itc h e d F ilte r A s s y . - D 4 5 1 9 6 ( S ta n d a r d )
Y IG O s c illa to r - D 4 5 2 0 0 ( O p tio n 1 5 B )
3 .3 G H z L P F
M o d u la to r > + 1 5 d B m (S td .)
B IA S 5 .5 G H z L P F > + 2 0 d B m (O p t. 1 5 B ) D ir e c tio n a l
J 6 R F O u tp u t
> + 4 d B m C o u p le r S te p
M A IN 8 .4 -2 0 G H z 8 .4 G H z L P F 2 0 G H z L P F A tte n u a to r
J 2 R F P a th ( O p tio n ) 0 .0 1 - 2 0 G H z
F M w ith
(0 .0 0 0 0 1 - 2 0 G H z
8 .5 G H z L P F
2 -8 .4 G H z 1 3 .5 G H z L P F O p tio n 2 2 D ip le x e r w ith O p tio n 2 2 )
A 2 9 8 6 0 C
B
J 5 J 7 J 3 J 1 L o s s A - C < 2 d B L e v e l C o n tro l
L o s s B - C < 2 d B C o n tro l
> + 1 7 d B m
C o n tro l
M o d u la to r P u ls e S w itc h
C o n tro l C o n tro l 0 .0 0 0 0 1 - 2 G H z L o s s A - C < 1 .5 d B
L o s s B - C < 1 .5 d B
S a m p le r D o w n C o n v e rte r A s s y .
(-7 to -1 4 d B m
ty p ic a l) D 2 7 3 3 0 0 .0 1 - 2 G H z C
J 1 J 3 R F P a th w ith O p tio n 2 2 0 .0 1 - 1 0 M H z A 1 3
L P F
> + 1 6 d B m
A D ip le x e r B D D S
6 .5 1 - 8 .5 G H z
4 6 5 0 4 > + 1 5 d B m ( O p tio n 2 2 )
6 .5 G H z
J 2
5 0 0 M H z
C o n tro l
L e v e l
C o n tro l
NOTES
1. Down Converter Assy (P/N D27330) not installed in
Model 68337C.
2-22 683XXC MM
FUNCTIONAL RF DECK
DESCRIPTION ASSEMBLIES
2 0 - 4 0 G H z
> + 8 .5 d B m
S w itc h e d D o u b le r M o d u le - D 2 8 5 4 0
2 -2 0 G H z S w itc h e d F ilte r A s s y . - D 4 5 1 9 6 ( S ta n d a r d )
Y IG O s c illa to r - D 4 5 2 0 0 ( O p tio n 1 5 B )
2 0 - 2 5 G H z B P F
3 .3 G H z L P F D ir e c tio n a l
B IA S M o d u la to r 2 5 - 3 2 G H z B P F C o u p le r S te p R F O u tp u t
J 6 5 .5 G H z L P F > + 1 5 d B m (S td .)
J 1 x 2 A tte n u a to r
> + 4 d B m 3 2 - 4 0 G H z B P F
M A IN 8 .4 -2 0 G H z 8 .4 G H z L P F 2 0 G H z L P F J 2 ( O p tio n ) 0 .0 1 - 4 0 G H z
J 2 R F P a th w ith O p tio n 2 2
F M > + 2 0 d B m (O p t. 1 5 B ) (0 .0 0 0 0 1 - 4 0 G H z
w ith O p tio n 2 2 )
8 .5 G H z L P F
2 -8 .4 G H z 1 3 .5 G H z L P F D ip le x e r
A C
2 9 8 5 0
B
L e v e l C o n tro l
J 1 B ia s S w itc h C o n tro l
J 5 J 7 J 3 L o s s A - C < 2 d B
C o n tro l
> + 1 7 d B m L o s s B - C < 2 d B
C o n tro l
M o d u la to r P u ls e S w itc h
C o n tro l C o n tro l L o s s A - C < 1 .5 d B
0 .0 0 0 0 1 - 2 G H z L o s s B - C < 1 .5 d B
S a m p le r D o w n C o n v e rte r A s s y .
(-7 to -1 4 d B m
ty p ic a l) D 2 7 3 3 0 0 .0 1 - 2 G H z C
J 1 J 3 R F P a th w ith O p tio n 2 2 0 .0 1 - 1 0 M H z A 1 3
L P F
> + 1 6 d B m
A
D ip le x e r B D D S
6 .5 1 - 8 .5 G H z
4 6 5 0 4 > + 1 5 d B m ( O p tio n 2 2 )
6 .5 G H z
J 2
5 0 0 M H z
C o n tro l
L e v e l
C o n tro l
683XXC MM 2-23
FUNCTIONAL RF DECK
DESCRIPTION ASSEMBLIES
S o u r c e Q u a d r u p le r M o d u le À
1 6 .8 G H z L P F
Â
x 4 B P F
& 6 d B P A D J 1
(J 1 )
D ir e c tio n a l 9 0 d B R F O u tp u t
B ia s M o d u la to r F o rw a rd Á J 3 C o u p le r S te p
C o n tro l A tte n u a to r
C o u p le r 0 .0 1 - 6 5 G H z
( O p tio n )
J 4 > + 1 8 d B m (0 .0 0 0 0 1 - 6 5 G H z
J 2 w ith O p tio n 2 2 )
2 -2 0 G H z S w itc h e d F ilte r A s s y . - D 4 5 2 0 0 S w itc h e d D o u b le r M o d u le - D 2 8 5 4 0
Y IG O s c illa to r 0 .0 1 - 4 0 G H z
2 0 - 2 5 G H z B P F
3 .3 G H z L P F > + 1 0 d B m L e v e l C o n tro l
B IA S > + 2 0 d B m 2 5 - 3 2 G H z B P F C o n tro l
J 6 5 .5 G H z L P F x 2
> + 4 d B m J 2
M A IN 8 .4 -2 0 G H z 3 2 - 4 0 G H z B P F J 2
8 .4 G H z L P F 2 0 G H z L P F
J 1
R F P a th
F M w ith
À S o u rc e Q u a d ru p le r M o d u le
8 .5 G H z L P F
2 -8 .4 G H z 1 3 .5 G H z L P F O p tio n 2 2 C P a rt N u m b e rs :
D ip le x e r D 2 8 1 8 5 (4 0 - 5 0 G H z )
A
2 9 8 5 0 6 0 -1 4 1 (4 0 - 6 0 G H z )
B ia s B
J 5 J 7 J 1 S w itc h
J 3
C o n tro l 6 0 -1 4 2 (4 0 - 6 5 G H z )
> + 1 7 d B m L o s s A - C < 2 d B
L o s s B - C < 2 d B Á S Q M P /N D 2 8 1 8 5 c o n ta in s a
C o n tro l
M o d u la to r P u ls e S w itc h F o rw a r d C o u p le r.
C o n tro l C o n tro l L o s s A - C < 1 .5 d B
L o s s B - C < 1 .5 d B F o rw a r d C o u p le r P /N C 2 7 1 8 4 is
S a m p le r D o w n C o n v e rte r A s s y . 0 .0 0 0 0 1 - 2 G H z
(-7 to -1 4 d B m u s e d w ith S Q M P /N s 6 0 -1 4 1 a n d
ty p ic a l) D 2 7 3 3 0 0 .0 1 - 2 G H z C
R F P a th w ith O p tio n 2 2
6 0 -1 4 2 .
J 4 J 3 > + 1 6 d B m D ip le x e r
L P F A
6 .5 1 - 8 .5 G H z 4 6 5 0 4 Â T h e 1 6 .8 G H z L P F a n d 6 d B P A D ,
B
6 .5 G H z
J 2 P /N B 2 8 1 6 2 , is u s e d w ith
5 0 0 M H z A 1 3 0 .0 1 - 1 0 M H z S Q M P /N s 6 0 -1 4 1 a n d 6 0 -1 4 2 .
J 1 D D S
C o n tro l
( O p tio n 2 2 ) > + 1 5 d B m
L e v e l
C o n tro l
2-24 683XXC MM
FUNCTIONAL RF DECK
DESCRIPTION ASSEMBLIES
683XXC MM 2-25
FUNCTIONAL RF DECK
DESCRIPTION ASSEMBLIES
2-26 683XXC MM
FUNCTIONAL RF DECK
DESCRIPTION ASSEMBLIES
683XXC MM 2-27
FUNCTIONAL RF DECK
DESCRIPTION ASSEMBLIES
2-28 683XXC MM
FUNCTIONAL RF DECK
DESCRIPTION ASSEMBLIES
Power Level The RF signal output from either the switched filter
Detection/ assembly (£20 GHz models), the SDM (£40 GHz
ALC Loop models), diplexer (£20 GHz and £40 GHz models
with Option 22), or forward coupler (>40 GHz mod-
els) goes to the directional coupler for transfer to the
RF OUTPUT connector. A portion of the RF output
signal is detected, amplified, and coupled out as
feedback to the ALC circuitry on the A10 ALC PCB.
In these circuits, the signal from the detector is
summed with the reference voltage that represents
the desired RF output power level. The resulting
voltage is fed from the A10 ALC PCB to the ALC
modulator driver circuit on the A9 PIN Control PCB
(and the ALC modulator driver circuit on the A14
YIG, SDM, SQM Driver PCB for >40 GHz models).
The resulting modulator control signals go to the
modulators in the switched filter assembly and the
SQM (for >40 GHz models) to adjust the RF output
power level.
683XXC MM 2-29
FUNCTIONAL RF DECK
DESCRIPTION ASSEMBLIES
2-30 683XXC MM
Chapter 3
Performance Verification
Table of Contents
3-2 RECOMMENDED TEST Table 3-1 (page 3-4) provides a list of the recommended test equipment
EQUIPMENT for the performance verification tests.
The test procedures refer to specific test equipment front panel control
settings when the test setup is critical to making an accurate meas-
urement. In some cases, the user may substitute test equipment hav-
ing the same critical specifications as those on the recommended test
equipment list.
Contact your local Anritsu service center (refer to Table 1-5 on page
1-18) if you need clarification of any equipment or procedural refer-
ence.
3-3 TEST RECORDS A blank copy of a sample performance verification test record for each
683XXC model is provided in Appendix A. Each test record contains
the model-specific variables called for by the test procedures. It also
provides a means for maintaining an accurate and complete record of
instrument performance. We recommend that you copy these pages
and use them to record the results of your initial testing of the instru-
ment. These initial test results can later be used as benchmark values
for future tests of the same instrument.
3-4 CONNECTOR AND KEY The test procedures include many references to equipment intercon-
LABEL NOTATION nections and control settings. For all 683XXC references, specific la-
bels are used to denote the appropriate menu key, data entry key, data
entry control, or connector (such as CW/SWEEP SELECT or RF OUT-
PUT). Most references to supporting test equipment use general labels
for commonly used controls and connections (such as Span or RF In-
put). In some cases, a specific label is used that is a particular feature
of the test equipment listed in Table 3-1.
683XXC MM 3-3
PERFORMANCE RECOMMENDED
VERIFICATION TEST EQUIPMENT
3-4 683XXC MM
PERFORMANCE RECOMMENDED
VERIFICATION TEST EQUIPMENT
683XXC MM 3-5
PERFORMANCE 682XXC/683XXC
VERIFICATION POWER LEVELS
3-5 POWER LEVELS Table 3-2 is a listing of the Series 683XXC Synthesized High Perform-
ance Signal Generator models and their maximum leveled ouput
power levels. Certain test procedures will refer you to this table for the
maximum leveled output power level setting of the instrument model
being tested.
Max Leveled
Max Leveled
683XXC Frequency Max Leveled Output Power
Output Power
Model (GHz) Output Power w/Electronic
w/Step Attenuator
Step Attenuator
68317C 0.01 – 8.4 GHz +13.0 dBm +11.0 dBm +9.0 dBm
68337C 2.0 – 20.0 GHz +13.0 dBm +11.0 dBm +3.0 dBm
68347C 0.01 – 20.0 GHz +13.0 dBm +11.0 dBm +3.0 dBm
0.01 – 2.0 GHz +13.0 dBm +11.0 dBm
68367C 2.0 – 20.0 GHz +9.0 dBm +7.0 dBm Not Available
20.0 – 40.0 GHz +6.0 dBm +3.0 dBm
0.01 – 2.0 GHz +12.0 dBm +10.0 dBm
2.0 – 20.0 GHz +10.0 dBm +8.5 dBm
68377C Not Available
20.0 – 40.0 GHz +2.5 dBm 0.0 dBm
40.0 – 50.0 GHz +2.5 dBm –1.0 dBm
0.01 – 2.0 GHz +12.0 dBm +10.0 dBm
2.0 – 20.0 GHz +10.0 dBm +8.5 dBm
68387C 20.0 – 40.0 GHz +2.5 dBm 0.0 dBm Not Available
40.0 – 50.0 GHz +2.0 dBm –1.5 dBm
50.0 – 60.0 GHz +2.0 dBm –2.0 dBm
0.01 – 2.0 GHz +12.0 dBm
2.0 – 20.0 GHz +10.0 dBm
68397C 20.0 – 40.0 GHz +2.5 dBm Not Available Not Available
40.0 – 50.0 GHz 0.0 dBm
50.0 – 65.0 GHz –2.0 dBm
Note: In models with Option 22 that have a high-end frequency of £20 GHz, rated output power is reduced by 1 dB.
In models with Option 22 that have a high-end frequency of >20 GHz, rated output power is reduced by 2 dB.
3-6 683XXC MM
PERFORMANCE INTERNAL TIME BASE
VERIFICATION AGING RATE TEST
3-6 INTERNAL TIME BASE The following test can be used to verify that the 683XXC 10 MHz time
AGING RATE TEST base is within its aging specification. The instrument derives its fre-
(Optional) quency accuracy from an internal 100 MHz crystal oscillator standard.
(With Option 16 installed, frequency accuracy is derived from an inter-
nal high-stability 10 MHz crystal oscillator.) An inherent characteris-
tic of crystal oscillators is the effect of crystal aging within the first
few days to weeks of operation. Typically, the crystal oscillator’s fre-
quency increases slightly at first, then settles to a relatively constant
value for the rest of its life. The 683XXC reference oscillator aging is
specified as <2x10–8 parts per day (<5x10–10 with Option 16).
NOTES
Do not confuse crystal aging with other short term
frequency instabilties; i.e., noise and temperature. The
internal time base of the instrument may not achieve its
specified aging rate before the specified warm-up time of
7 to 30 days has elasped; therefore, this performance test is
optional.
6 8 3 X X C S ig n a l G e n e r a to r
1 0 M H z F re q u e n c y R e fe re n c e
R E F O U T
1 P P S
E S C 1 2 3
- 4 5 6
1 .5 M H z
D E L 7 8 9
1 0 M H z A B S O L U T E T IM E M O D . 0 E N T E R
M o d e l 3 0 0 F re q u e n c y R e fe re n c e
1 0 M H z In p u t
Figure 3-1. Equipment Setup for Internal Time Base Aging Rate Test
Test Setup Connect the 683XXC rear panel 10 MHz REF OUT to
the Frequency Reference front panel input connec-
tor labeled 10 MHz when directed to do so during
the test procedure.
683XXC MM 3-7
PERFORMANCE INTERNAL TIME BASE
VERIFICATION AGING RATE TEST
3-8 683XXC MM
PERFORMANCE INTERNAL TIME BASE
VERIFICATION AGING RATE TEST
683XXC MM 3-9
PERFORMANCE FREQUENCY
VERIFICATION SYNTHESIS TESTS
3-7 FREQUENCY The following tests can be used to verify correct operation of the fre-
SYNTHESIS TESTS quency synthesis circuits. Frequency synthesis testing is divided into
two parts—coarse loop/YIG loop tests and fine loop tests.
6 8 3 X X C S IG N A L G E N E R A T O R F R E Q U E N C Y C O U N T E R
1 0 M H z 1 0 M H z
R E F O U T E X T IN
In p u t 1
R F O U T
Coarse Loop/ The following procedure tests both the coarse loop
YIG Loop Test and YIG loop by stepping the signal generator
Procedure through its YIG-tuned oscillator’s frequency range
in 1 GHz steps and measuring the RF output at
each step.
3-10 683XXC MM
PERFORMANCE FREQUENCY
VERIFICATION SYNTHESIS TESTS
Fine Loop The following procedure tests the fine loop by step-
Test ping the instrument through ten 1 kHz steps (ten
Procedure 100 Hz steps for instruments with Option 11) and
measuring the RF output at each step.
683XXC MM 3-11
PERFORMANCE SPURIOUS SIGNALS TEST:
VERIFICATION RF OUTPUT SIGNALS <2 GHz
3-8 SPURIOUS SIGNALS The following test can be used to verify that the signal generator
TEST: RF OUTPUT meets its spurious signals specifications for RF output signals from
SIGNALS <2 GHz 0.01 to 2 GHz. This test is applicable only to instruments which cover
the frequency range 10 MHz to 2 GHz.
6 8 3 X X C S IG N A L G E N E R A T O R S P E C T R U M A N A L Y Z E R
E X T R E F
IN P U T
1 0 M H z
R E F O U T
R F IN
R F O U T
Figure 3-3. Equipment Setup for Spurious Signals Test: RF Output Signals <2 GHz
3-12 683XXC MM
PERFORMANCE SPURIOUS SIGNALS TEST:
VERIFICATION RF OUTPUT SIGNALS <2 GHz
683XXC MM 3-13
PERFORMANCE SPURIOUS SIGNALS TEST:
VERIFICATION RF OUTPUT SIGNALS <2 GHz
3-14 683XXC MM
PERFORMANCE HARMONIC TEST: RF OUTPUT
VERIFICATION SIGNALS FROM 2 TO 20 GHz
3-9 HARMONIC TEST: RF The following test can be used to verify that the 683XXC meets its
OUTPUT SIGNALS FROM harmonic specifications for RF output signals from 2 to 20 GHz. Test
2 TO 20 GHz record entries are supplied for harmonics up to a frequency limit of
40 GHz. Additional harmonic checks may be made at any frequency of
interest up to the RF output frequency limit of the 683XXC model be-
ing tested. These additional harmonic checks can be accomplished
through the use of waveguide mixers to extend the frequency range of
the spectrum analyzer.
6 8 3 X X C S IG N A L G E N E R A T O R S P E C T R U M A N A L Y Z E R
E X T R E F
IN P U T
1 0 M H z
R E F O U T
C o n n e c tio n B
R F IN
D ip le x e r
R F O U T
M ix e r
C o n n e c tio n A
Figure 3-4. Equipment Setup for Harmonic Test: RF Output Signals from 2 to 20 GHz
683XXC MM 3-15
PERFORMANCE HARMONIC TEST: RF OUTPUT
VERIFICATION SIGNALS FROM 2 TO 20 GHz
3-16 683XXC MM
PERFORMANCE HARMONIC TEST: RF OUTPUT
VERIFICATION SIGNALS FROM 2 TO 20 GHz
NOTE
Because an external mixer is required for
these measurements, the RF output flat-
ness of the signal generator is used to cor-
rect for; (1) variations caused by switching
from the fundamental input to the external
mixer input of the Spectrum Analyzer, and
(2) the flatness of the mixer.
NOTE
If the 683XXC is not fitted with Option 2,
install a 30 dB attenuator (Anritsu 41KC-
20 and 41KC-10 for £40 GHz models; 41V-
20 and 41V-10 for >40 GHz models) and set
L1 to 0.0 dBm output power.
683XXC MM 3-17
PERFORMANCE HARMONIC TEST: RF OUTPUT
VERIFICATION SIGNALS FROM 2 TO 20 GHz
NOTE
The <–30 dB signal level plus the 30 dB at-
tenuation provided by the waveguide
mixer equals a harmonic frequency signal
level of <–60 dBc (specification).
3-18 683XXC MM
PERFORMANCE SINGLE SIDEBAND
VERIFICATION PHASE NOISE TEST
3-10 SINGLE SIDEBAND The following test can be used to verify that the signal generator
PHASE NOISE TEST meets its single sideband phase noise specifications. For this test, a
second 683XXC is required. This additional instrument acts as a local
oscillator (LO). The CW RF output of the 683XXC under test (DUT) is
mixed with the CW RF output from the 683XXC LO which is offset by
1 MHz. Single sideband phase noise is measured at offsets of 100 Hz,
1 kHz, 10 kHz, and 100 kHz away from the resultant 1 MHz IF.
H P 3 5 8 5 B
6 8 3 X X C (L O ) S p e c tr u m A n a ly z e r 6 8 3 X X C (D U T )
E X T E R N A L B N C T E E
1 0 M H z R E F IN P U T 1 0 M H z
R E F IN R E F O U T
R F O U T R F O U T
IF
L O R F
1 0 d B
M ix e r A tte n u a to r
Figure 3-5. Equipment Setup for Single Sideband Phase Noise Test
683XXC MM 3-19
PERFORMANCE SINGLE SIDEBAND
VERIFICATION PHASE NOISE TEST
NOTE
The following technique is a measurement
of phase noise and AM noise. To avoid erro-
neous results, on the 683XXC DUT set L1
for maximum leveled output power and se-
lect External Detector leveling. This will
prevent any AM noise from degrading the
phase noise measurements.
3-20 683XXC MM
PERFORMANCE SINGLE SIDEBAND
VERIFICATION PHASE NOISE TEST
NOTE
If the 683XXC LO output is less than
10 dBm, the Mixer’s local oscillator port
will not be saturated and the resulting
measurements may be in error.
100 Hz <–77 dBc d. Position the Marker to the peak of the signal.
1 kHz <–85 dBc e. Select OFFSET, ENTER OFFSET, and
2.0 GHz
10 kHz <–83 dBc MKRCF.
100 kHz <–99 dBc
f. Adjust the marker for a 100 Hz offset.
100 Hz <–75 dBc
6.0 GHz
1 kHz <–85 dBc g. Select NOISE LVL.
10 kHz <–83 dBc
100 kHz <–99 dBc 4. Measure the phase noise level 100 Hz offset from
100 Hz <–70 dBc the carrier frequency. Record the level on the Test
1 kHz <–83 dBc Record.
10.0 GHz
10 kHz <–80 dBc
100 kHz <–99 dBc 5. On the Spectrum Analyzer:
100 Hz <–63 dBc a. Deselect NOISE LVL.
1 kHz <–75 dBc
20.0 GHz b. Set Frequency Span to 20 kHz.
10 kHz <–75 dBc
100 kHz <–97 dBc c. Set RBW to 100 Hz.
* 3 dB difference from 683XXC single sideband d. Adjust the Marker for a 1 kHz offset.
phase noise specifications to account for LO phase
noise. e. Select NOISE LVL.
683XXC MM 3-21
PERFORMANCE SINGLE SIDEBAND
VERIFICATION PHASE NOISE TEST
3-22 683XXC MM
PERFORMANCE POWER LEVEL ACCURACY
VERIFICATION AND FLATNESS TESTS
3-11 POWER LEVEL The following tests can be used to verify that the 683XXC meets its
ACCURACY AND power level specifications. Power level verification testing is divided
FLATNESS TESTS into two parts—power level accuracy tests and power level flatness
tests.
S E Q S Y N C
H O R IZ O U T
A U X
I/O IN P U T 2 IN P U T 1
A N A L O G D IG IT A L
R F
O U T P O W E R M E T E R
P o w e r
6 8 3 X X C S IG N A L G E N E R A T O R S e n s o r
Figure 3-6. Equipment Setup for Power Level Accuracy and Flatness Tests
NOTE
For £40 Ghz models, use the MA2474A
power sensor; for >40 Ghz models, use the
MA2475A power sensor.
683XXC MM 3-23
PERFORMANCE POWER LEVEL ACCURACY
VERIFICATION AND FLATNESS TESTS
3-24 683XXC MM
PERFORMANCE POWER LEVEL ACCURACY
VERIFICATION AND FLATNESS TESTS
683XXC MM 3-25
PERFORMANCE POWER LEVEL ACCURACY
VERIFICATION AND FLATNESS TESTS
3-26 683XXC MM
PERFORMANCE AMPLITUDE
VERIFICATION MODULATION TEST
3-12 AMPLITUDE This procedure verifies the operation of the 683XXC amplitude modu-
MODULATION TEST lation input sensitivity circuit.
M o d u la tio n
A n a ly z e r
6 8 3 X X C S ig n a l G e n e r a to r
R F In p u t
E X T
R E F In p u t
1 0 M H z IF O u tp u t
R E F O U T
R F
O U T P U T
R F In p u t
S p e c tru m
A n a ly z e r
683XXC MM 3-27
PERFORMANCE AMPLITUDE
VERIFICATION MODULATION TEST
3-28 683XXC MM
PERFORMANCE AMPLITUDE
VERIFICATION MODULATION TEST
683XXC MM 3-29
PERFORMANCE FREQUENCY
VERIFICATION MODULATION TESTS
3-13 FREQUENCY This procedure verifies the operation of the 683XXC frequency modu-
MODULATION TESTS lation input sensitivity circuitry.
6 8 3 X X C S IG N A L G E N E R A T O R S P E C T R U M A N A L Y Z E R
E X T R E F
IN P U T
1 0 M H z
R E F O U T
R F IN
R F O U T
3-30 683XXC MM
PERFORMANCE FREQUENCY
VERIFICATION MODULATION TESTS
683XXC MM 3-31
PERFORMANCE FREQUENCY
VERIFICATION MODULATION TESTS
Figure 3-9. Typical Spectrum Analyzer Display of 4. Since the 683XXC is now in Unlocked Narrow
Bessel Null on FM Waveform FM mode, it is necessary to retune the Spectrum
Analyzer to center the display.
3-32 683XXC MM
PERFORMANCE FREQUENCY
VERIFICATION MODULATION TESTS
æ FM Deviation ( in kHz ) ö
Accuracy ( in %) = ç ÷ ´ 100
è 240 ø
Locked FM Mode
1. Set up the 683XXC as follows:
a. Reset the instrument by pressing SYSTEM ,
then Reset . Upon reset, the CW Menu is dis-
played.
b. Press Edit F1 to open the current frequency
parameter for editing.
c. Set F1 to 5.0 GHz.
683XXC MM 3-33
PERFORMANCE FREQUENCY
VERIFICATION MODULATION TESTS
æ FM Deviation ( in kHz ) ö
Accuracy ( in %) = ç ÷ ´ 100
è 240 ø
3-34 683XXC MM
PERFORMANCE FREQUENCY
VERIFICATION MODULATION TESTS
æ FM Deviation ( in kHz ) ö
Accuracy ( in %) = ç ÷ ´ 100
è 240 ø
683XXC MM 3-35
PERFORMANCE PULSE MODULATION TESTS:
VERIFICATION RISE TIME, FALL TIME, OVERSHOOT, AND LEVEL
6 8 3 X X C S ig n a l G e n e r a to r
P u ls e
S y n c O u t
O s c illo s c o p e
R F O u t
1 5 0 M H z H P F
(F o r O v e rs h o o t
M e a s u re m e n t)
C H . 2 In p u t
P u ls e C H . 4 T r ig g e r
D e te c to r
Figure 3-10. Equipment Setup for Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level
3-36 683XXC MM
PERFORMANCE PULSE MODULATION TESTS:
VERIFICATION RISE TIME, FALL TIME, OVERSHOOT, AND LEVEL
683XXC MM 3-37
PERFORMANCE PULSE MODULATION TESTS:
VERIFICATION RISE TIME, FALL TIME, OVERSHOOT, AND LEVEL
P U L S E D E T E C T O R O U T P U T W A V E F O R M
P e rc e n ta g e C o r r e s p o n d in g
o f D e te c te d T T P e rc e n ta g e
R IS E F A L L
W a v e fo rm o f R F V o lta g e
0 % 0 %
2 % 1 0 %
3 6 % 5 0 %
8 6 % 9 0 %
1 0 0 % 1 0 0 % 0 %
1 1 4 % 1 1 4 % 1 0 %
O V E R -
N o te : W a v e fo r m s h o w n is fo r S H O O T
a n e g a tiv e o u tp u t d e te c to r .
P U L S E W ID T H
1. On the 683XXC:
a. Press On/Off (Internal Pulse Status menu) to
turn off pulse modulation.
b. Press CW/SWEEP SELECT to return to the
CW Menu display.
c. At the CW menu, press Edit F1 and set F1 to
the frequency noted in the Test Record.
2. On the Oscilloscope:
a. Adjust the vertical offset to place the trace ex-
actly on the center graticule; this is used as the
CW-level reference line.
b. Use the Auto Triggering mode to continue
sweeping the display when the pulse is off.
c. Adjust the vertical sensitivity to the most sen-
sitive setting (mV/div) possible while keeping
the trace at the center graticule reference line.
3-38 683XXC MM
PERFORMANCE PULSE MODULATION TESTS:
VERIFICATION RISE TIME, FALL TIME, OVERSHOOT, AND LEVEL
3. On the 683XXC:
a. Press MODULATION , then Pulse to go to the
Internal Pulse Status Menu display.
b. Press Edit Width and set W1 to the pulse
width noted in the Test Record.
c. Press On/Off to turn on pulse modulation.
5. On the 683XXC:
a.Press CW/SWEEP SELECT to return to the
CW Menu display.
b. Record the value of the output level L1, shown
in the Level display area, on the Test Record.
c. Press Edit L1 and adjust the power level until
the nominal peak level is evenly centered on
the display centerline reference.
d. Record this value of the output level L1 on the
Test Record.
7. On the 683XXC:
a. Press Edit L1 and set L1 to the maximum lev-
eled output power level for the instrument be-
ing tested (refer to Table 3-2, page 3-6).
b. Press MODULATION , then Pulse to return to
the Internal Pulse Status Menu display.
c. Press On/Off to turn off pulse modulation.
683XXC MM 3-39
PERFORMANCE PULSE MODULATION TEST:
VERIFICATION VIDEO FEEDTHROUGH
3-15 PULSE MODULATION This pulse modulation test verifies that video feedthrough is within
TEST: VIDEO specifications.
FEEDTHROUGH
6 8 3 X X C S ig n a l G e n e r a to r
P u ls e
S y n c
O u t
O s c illo s c o p e
R F O u tp u t
4 5 0 M H z
L o w P a s s F ilte r C H . 1 In p u t
(F o r V id e o F e e d th ro u g h
M e a s u r e m e n t) C H . 4 T r ig g e r
Figure 3-12. Equipment Setup for Pulse Modulation Test: Video Feedthrough
3-40 683XXC MM
PERFORMANCE PULSE MODULATION TEST:
VERIFICATION VIDEO FEEDTHROUGH
NOTE
Use the Oscilloscope’s 20 MHz bandwidth
limit to aid in viewing the voltage spikes. It
may be necessary to adjust the Oscillo-
scope’s horizontal level as any ripple or
voltage spikes are generally very small in
amplitude.
683XXC MM 3-41
PERFORMANCE PULSE MODULATION TEST:
VERIFICATION RF ON/OFF RATIO
3-16 PULSE MODULATION This pulse modulation test verifies that the ratio of RF on power to RF
TEST: RF ON/OFF off power is within specifications.
RATIO
6 8 3 X X C S IG N A L G E N E R A T O R S P E C T R U M A N A L Y Z E R
E X T R E F
IN P U T
1 0 M H z
R E F O U T
R F IN
R F O U T
Figure 3-13. Equipment Setup for Pulse Modulation Test: RF On/Off Ratio
3-42 683XXC MM
PERFORMANCE PULSE MODULATION TEST:
VERIFICATION RF ON/OFF RATIO
NOTE
A 60 dB level change plus a 20 dB decrease
in the reference level equals an 80 dB on/off
ratio (specification).
683XXC MM 3-43
PERFORMANCE PULSE MODULATION TEST:
VERIFICATION RF ON/OFF RATIO
3-44 683XXC MM
PERFORMANCE PHASE
VERIFICATION MODULATION TESTS
3-17 PHASE MODULATION This procedure verifies the operation of the phase modulation (FM) in-
TESTS put sensitivity circuits in 683XXCs with Option 6.
6 8 3 X X C S IG N A L G E N E R A T O R S P E C T R U M A N A L Y Z E R
E X T R E F
IN P U T
1 0 M H z
R E F O U T
R F IN
R F O U T
683XXC MM 3-45
PERFORMANCE PHASE
VERIFICATION MODULATION TESTS
Wide FM Mode
1. Set up the 683XXC as follows:
a. Reset the instrument by pressing SYSTEM ,
then Reset . Upon reset, the CW Menu is dis-
played.
b. Press Edit F1 to open the current frequency
parameter for editing.
c. Set F1 to 5.0 GHz.
C E N T E R F R E Q U E N C Y
3. On the 683XXC, make the following settings:
a. Press MODULATION , then FM . At the re-
sulting FM Status menu, press More to go the
additional FM Status menu.
b. At the additional FM Status menu, press
Wide , then press Previous Menu to return to
the main FM Status menu.
B E S S E L c. At the FM Status menu, press Edit Dev. and
N U L L set the deviation for 2.40 rad.
d. Press Edit Rate and set the rate to 99.8 kHz.
e. Press On/Off to turn FM on.
3-46 683XXC MM
PERFORMANCE PHASE
VERIFICATION MODULATION TESTS
Narrow FM Mode
1. Set up the 683XXC as follows:
a. Reset the instrument by pressing SYSTEM ,
then Reset . Upon reset, the CW Menu is dis-
played.
b. Press Edit F1 to open the current frequency
parameter for editing.
c. Set F1 to 5.0 GHz.
æ FM Deviation ( in rad ) ö
Accuracy ( in %) = ç ÷ ´ 100
è 240
. ø
683XXC MM 3-47/3-48
Chapter 4
Calibration
Table of Contents
NOTE
The calibration procedures herein support operating firm-
ware versions 1.00 and above. It is recommended that you
upgrade your instrument’s operating firmware to the latest
available version prior to calibration.
4-2 RECOMMENDED TEST Table 4-1 (page 4-4) provides a list of the recommended test equipment
EQUIPMENT for these calibration procedures.
Contact your local Anritsu service center (Refer to Table 1-5 on page
1-18) if you need clarification of any equipment or procedural refer-
ence.
4-3 TEST RECORDS A blank copy of a sample calibration test record for each 683XXC
model is provided in Appendix A. It provides a means for maintaining
an accurate and complete record of instrument calibration. We recom-
mend that you copy these pages and use them to record (1) your cali-
bration of out-of-tolerance 683XXC circuits, or (2) your calibration of
the 683XXC following replacement of subassemblies or RF compo-
nents.
683XXC MM 4-3
CALIBRATION FOLLOWING
CALIBRATION SUBASSEMBLY REPLACEMENT
4-4 CALIBRATION Table 4-2 (page 4-6) lists the calibration that should be performed fol-
FOLLOWING lowing the replacement of 683XXC subassemblies or RF components.
SUBASSEMBLY
REPLACEMENT
4-5 CONNECTOR AND KEY The calibration procedures include many references to equipment in-
LABEL NOTATION terconnections and control settings. For all 683XXC references, spe-
cific labels are used to denote the appropriate menu key, data entry
key, data entry control, or connector (such as CW/SWEEP SELECT or
RF OUTPUT). Most references to supporting test equipment use gen-
eral labels for commonly used controls and connections (such as Span
or RF Input). In some cases, a specific label is used that is a particular
feature of the test equipment listed in Table 4-1.
4-4 683XXC MM
RECOMMENDED
CALIBRATION TEST EQUIPMENT
683XXC MM 4-5
CALIBRATION FOLLOWING
CALIBRATION SUBASSEMBLY REPLACEMENT
A13 10 MHz DDS PCB (Option 22) 4-8, 4-9, 4-10, 4-11
A14 YIG, SDM, SQM Driver PCB 4-7, 4-9, 4-10, 4-11
A17 CPU PCB 4-7 thru 4-13. None, if calibration EEPROM reused.
4-6 683XXC MM
CALIBRATION INITIAL SETUP
4-6 INITIAL SETUP The 683XXC is calibrated using an IBM compatible PC and external
test equipment. The PC must have the Windows 3.1, Windows 95, or
Windows 98 operating system installed and be equipped with a mouse.
Initial setup consists of interfacing the PC to the signal generator.
T 1 6 7 8 S e r ia l In te r fa c e
T e rm
P 1 P 2 T o
T o P C
6 8 3 X X C
P 3
C O M 1
S e r ia l o r
I/O C O M 2
6 8 3 X X C S ig n a l G e n e r a to r IB M -C o m p a tib le P C
683XXC MM 4-7
CALIBRATION INITIAL SETUP
4-8 683XXC MM
CALIBRATION INITIAL SETUP
5. Click on Communications.
683XXC MM 4-9
CALIBRATION INITIAL SETUP
4-10 683XXC MM
CALIBRATION INITIAL SETUP
683XXC MM 4-11
CALIBRATION INITIAL SETUP
4-12 683XXC MM
PRELIMINARY
CALIBRATION CALIBRATION
4-7 PRELIMINARY This procedure provides the steps necessary to initially calibrate the
CALIBRATION coarse loop, fine loop, frequency instruction, and internal DVM cir-
cuitry and the 100 MHz reference oscillator of the 683XXC.
IB M -C o m p a tib le P C 6 8 3 X X C S ig n a l G e n e r a to r F re q u e n c y R e fe re n c e
1 P P S
E S C 1 2 3
- 4 5 6
1 .5 M H z
D E L 7 8 9
1 0 M H z A B S O L U T E T IM E M O D . 0 E N T E R
M o d e l 3 0 0 F re q u e n c y R e fe re n c e
1 0 M H z
S e r ia l O u tp u t
I/O
C O M 1 1 0 M H z
o r E X T IN
C O M 2
In p u t 1
C o n n e c t A s
D ir e c te d B y
T h e P ro c e d u re F re q u e n c y C o u n te r
NOTES
If the 683XXC has option 19 installed, ver-
ify that the GPIB is configured for the Na-
tive external interface language before be-
ginning instrument calibration.
683XXC MM 4-13
PRELIMINARY
CALIBRATION CALIBRATION
4-14 683XXC MM
PRELIMINARY
CALIBRATION CALIBRATION
683XXC MM 4-15
PRELIMINARY
CALIBRATION CALIBRATION
4-16 683XXC MM
PRELIMINARY
CALIBRATION CALIBRATION
F re q u e n c y R e fe re n c e
1 P P S
E S C 1 2 3
- 4 5 6
1 .5 M H z
6 8 3 X X C S ig n a l G e n e r a to r
D E L 7 8 9
1 0 M H z A B S O L U T E T IM E M O D . 0 E N T E R
M o d e l 3 0 0 F re q u e n c y R e fe re n c e
1 0 M H z
( P a th fo r S ta n d a r d U n it) O U T P U T
1 0 M H z
R E F IN ( P a th fo r U n it
w /O p tio n 1 6 )
1 0 M H z
E X T IN
R F O U T
In p u t 1
F re q u e n c y C o u n te r
( U s e w ith O p tio n 1 6 )
Figure 4-2a. Equipment Setup for 100 MHz Reference Oscillator Calibration (Alternate Method)
683XXC MM 4-17
PRELIMINARY
CALIBRATION CALIBRATION
4-18 683XXC MM
SWITCHED FILTER
CALIBRATION SHAPER CALIBRATION
4-8 SWITCHED FILTER This procedure provides the steps necessary to adjust the Switched
SHAPER CALIBRATION Filter Shaper Amplifier gain to produce a more constant level ampli-
fier gain with power level changes.
IB M -C o m p a tib le P C 6 8 3 X X C S ig n a l G e n e r a to r 5 6 1 0 0 A N e tw o r k A n a ly z e r
G P IB S e r ia l A U X A U X D e d ic a te d
C O M 1 I/O I/O I/O G P IB
o r
C O M 2
>
>
R F
O u tp u t
A
1 0 d B R F D e te c to r
A tte n u a to r
NOTE
Before beginning this calibration proce-
dure, always let the 683XXC warm up for a
minimum of one hour.
683XXC MM 4-19
SWITCHED FILTER
CALIBRATION SHAPER CALIBRATION
NOTE
The following Limiter DAC adjustment
procedure applies only to 683XXCs with
Option 15B (High Power Output). If your
instrument does not have this option, go di-
rectly to the Shaper DAC adjustment pro-
cedure.
Limiter DAC The following steps in the procedure let you adjust
Adjustment the Switched Filter Limiter DAC which controls the
maximum gain of the Switched Filter Shaper Ampli-
fier. Each frequency band will be scanned for the
maximum unleveled power point before adjustment
of the Limiter DAC to ensure that the Shaper Am-
plifier is not driven to saturation.
4-20 683XXC MM
SWITCHED FILTER
CALIBRATION SHAPER CALIBRATION
F in a l
d. On the computer keyboard, use 8, 9, or 0 to
W a v e fo rm decrement the value of the DAC’s setting until
A fte r the top of the triangle waveform starts to be-
A d ju s tm e n t come rounded (Shaper Amplifier is no longer
being driven to saturation). Continue decre-
menting until the top of the waveform is 0.3 dB
below this point.
e. Press Q on the keyboard to go to the next fre-
Figure 4-4. Limiter DAC Adjustment quency band.
Waveforms
f. Repeat steps b thru e until the DAC has been
checked and adjusted for all frequency bands.
g. Press Q on the keyboard to exit the program.
(The $ prompt will appear on the screen.)
h. Record step completion on the Test Record.
683XXC MM 4-21
SWITCHED FILTER
CALIBRATION SHAPER CALIBRATION
NOTE
The calibration routine may take up to 20
minutes depending on the frequency range
of the 683XXC being calibrated.
4-22 683XXC MM
RF LEVEL
CALIBRATION CALIBRATION
4-9 RF LEVEL CALIBRATION RF level calibration requires the use of an automated test system. A
computer-controlled power meter measures the 683XXC power output
at many frequencies throughout the frequency range of the instru-
ment. Correction factors are then calculated and stored in non-volatile
memory (EEPROM) located on the A17 CPU PCB.
683XXC MM 4-23
ALC SLOPE
CALIBRATION CALIBRATION
4-10 ALC SLOPE This procedure provides the steps necessary to perform ALC Slope
CALIBRATION calibration. The ALC Slope is calibrated to adjust for decreasing out-
put power-vs-output frequency in full band analog sweep.
IB M -C o m p a tib le P C 6 8 3 X X C S ig n a l G e n e r a to r 5 6 1 0 0 A N e tw o r k A n a ly z e r
G P IB S e r ia l A U X A U X D e d ic a te d
C O M 1 I/O I/O I/O G P IB
o r
C O M 2
>
>
R F
O u tp u t
A
1 0 d B R F D e te c to r
A tte n u a to r
NOTE
Before beginning this calibration proce-
dure, always let the 683XXC warm up for a
minimum of one hour.
4-24 683XXC MM
ALC SLOPE
CALIBRATION CALIBRATION
ALC Slope The following procedure lets you adjust the ALC
DAC Slope over individual frequency ranges to compen-
Adjustment sate for decreasing output power-vs-frequency in
analog sweep.
683XXC MM 4-25
ALC SLOPE
CALIBRATION CALIBRATION
50. 60, or
2 GHz 8.4 GHz 20 GHz 40 GHz
65 (67) GHz
Normalized
Step Sweep
4-26 683XXC MM
ALC SLOPE
CALIBRATION CALIBRATION
683XXC MM 4-27
ALC BANDWIDTH
CALIBRATION CALIBRATION
4-11 ALC BANDWIDTH This procedure provides the steps necessary to perform ALC Band-
CALIBRATION width calibration. The ALC Bandwidth is adjusted to compensate for
gain variations of the modulator. The adjustment is performed for
each frequency band. This provides a more consistent bandwith
throughout the frequency range of the instrument.
IB M -C o m p a tib le P C 6 8 3 X X C S ig n a l G e n e r a to r
C O M 1 S e r ia l
o r I/O
C O M 2
NOTE
Before beginning this calibration proce-
dure, always let the 683XXC warm up for a
minimum of one hour.
4-28 683XXC MM
ALC BANDWIDTH
CALIBRATION CALIBRATION
683XXC MM 4-29
AM
CALIBRATION CALIBRATION
4-12 AM CALIBRATION This procedure provides the steps necessary to perform AM calibra-
tion. This consists of calibrating the AM Calibration DAC, the AM Me-
ter circuit, and the AM Function Generator. The AM Calibration DAC
is calibrated for input sensitivities of 100%/V (linear mode) and
25 dB/V (logarithmic mode) for frequencies £2 GHz and >2 GHz.
IB M -C o m p a tib le P C
6 8 3 X X C S ig n a l G e n e r a to r
S e r ia l
C O M 1 I/O
o r
C O M 2
R F
O u tp u t
A M P o w e r P o w e r M e te r
IN S e n s o r
F u n c tio n
G e n e ra to r
D M M
IN P U T
O U T P U T B N C
T e e
4-30 683XXC MM
AM
CALIBRATION CALIBRATION
NOTE
Before beginning this calibration proce-
dure, always let the 683XXC warm up for a
minimum of one hour.
NOTE
For those instruments that contain a Down
Converter, the procedure for Linear AM
and Log AM calibration must be performed
twice—once for frequencies £2 GHz and
once for frequencies >2 GHz. Upon initial
completion of each procedure, the program
will automatically return you to the start to
repeat the procedure.
683XXC MM 4-31
AM
CALIBRATION CALIBRATION
4-32 683XXC MM
AM
CALIBRATION CALIBRATION
683XXC MM 4-33
FM
CALIBRATION CALIBRATION
4-13 FM CALIBRATION This procedure provides the steps necessary to perform FM calibra-
tion. This consists of calibrating the FM Meter circuit and the FM
Variable Gain Control DAC. The FM Variable Gain Control DAC is
calibrated for input sensitivities in Locked, Locked Low-Noise, Un-
locked Narrow, and Unlocked Wide FM modes.
IB M -C o m p a tib le P C
6 8 3 X X C S ig n a l G e n e r a to r
S p e c tru m
E X T R E F A n a ly z e r
IN P U T
S e r ia l 1 0 M H z
C O M 1 I/O R E F O U T
o r
C O M 2
F M IN R F R F
(. M IN ) O u tp u t IN
F u n c tio n
G e n e ra to r
D M M
IN P U T
O U T P U T B N C
T e e
4-34 683XXC MM
FM
CALIBRATION CALIBRATION
NOTE
Before beginning this calibration proce-
dure, always let the 683XXC warm up for a
minimum of one hour.
NOTE
To ensure accurate calibration, each step of
this procedure must be performed in se-
quence.
683XXC MM 4-35
FM
CALIBRATION CALIBRATION
4-36 683XXC MM
FM
CALIBRATION CALIBRATION
683XXC MM 4-37
FM
CALIBRATION CALIBRATION
4-38 683XXC MM
FM
CALIBRATION CALIBRATION
683XXC MM 4-39
FM
CALIBRATION CALIBRATION
4-40 683XXC MM
PHASE MODULATION
CALIBRATION (FM) CALIBRATION
4-14 PHASE MODULATION This procedure provides the steps necessary to perform phase modula-
(FM) CALIBRATION tion (FM) calibration for 683XXCs with Option 6. This consists of cali-
brating the FM Variable Gain Control DAC and the FM Flatness DAC
for input sensitivities in Narrow and Wide FM modes.
IB M -C o m p a tib le P C
6 8 3 X X C S ig n a l G e n e r a to r
S p e c tru m
E X T R E F A n a ly z e r
IN P U T
S e r ia l 1 0 M H z
C O M 1 I/O R E F O U T
o r
C O M 2
F M IN R F R F
(. M IN ) O u tp u t IN
F u n c tio n
G e n e ra to r
D M M
IN P U T
O U T P U T B N C
T e e
683XXC MM 4-41
PHASE MODULATION
CALIBRATION (FM) CALIBRATION
NOTE
Before beginning this calibration proce-
dure, always let the 683XXC warm up for a
minimum of one hour.
NOTE
To ensure accurate calibration, each step of
this procedure must be performed in se-
quence.
C E N T E R F R E Q U E N C Y
1. External Wide FM Mode Sensitivity calibration is
accomplished by adjusting the FM Variable Gain
Control DAC to reduce the carrier level as low as
possible at frequencies of 5 GHz and 20 GHz. The
modulating signal input is from the external
Function Generator.
4-42 683XXC MM
PHASE MODULATION
CALIBRATION (FM) CALIBRATION
683XXC MM 4-43
PHASE MODULATION
CALIBRATION (FM) CALIBRATION
4-44 683XXC MM
PHASE MODULATION
CALIBRATION (FM) CALIBRATION
683XXC MM 4-45
PHASE MODULATION
CALIBRATION (FM) CALIBRATION
When saving calibration data, turn- a. At the $ prompt, type: calterm 787 and
ing off the instrument before the $ press <ENTER>. (The $ prompt will appear on
prompt returns to the screen can the screen when the calibration data has been
cause all stored data to be lost. stored.)
b. Record step completion on the Test Record.
4-46 683XXC MM
Chapter 5
Troubleshooting
Table of Contents
WARNING
Hazardous voltages are present inside the 683XXC whenever
ac line power is connected. Turn off the instrument and re-
move the line cord before removing any covers or panels.
Troubleshooting or repair procedures should only be per-
formed by service personnel who are fully aware of the poten-
tial hazards.
CAUTION
Many subassemblies in the signal generator contain static-
sensitive components. Improper handling of these subassem-
blies may result in damage to the components. Always
observe the static-sensitive component handling precautions
described in Chapter 1, Figure 1-2.
Chapter 5
Troubleshooting
5-1 INTRODUCTION This chapter provides information for troubleshooting signal generator
malfunctions. The troubleshooting procedures presented in this chap-
ter support fault isolation to a replaceable subassembly or RF compo-
nent. (Remove and replace procedures for the subassemblies and RF
components are found in Chapter 6.)
5-2 RECOMMENDED TEST The recommended test equipment for the troubleshooting procedures
EQUIPMENT presented in this chapter is listed in Chapter 1, Table 1-2 (page 1-12).
5-3 ERROR AND During normal operation, the 683XXC generates error messages to in-
WARNING/STATUS dicate internal malfunctions, abnormal instrument operations, or
MESSAGES invalid signal inputs or data entries. It also displays warning mes-
sages to alert the operator to conditions that could result in inaccurate
signal generator output. In addition, status messages are displayed to
remind the operator of current menu selections or settings.
683XXC MM 5-3
SELF-TEST
TROUBLESHOOTING ERROR MESSAGES
5-4 683XXC MM
SELF-TEST
TROUBLESHOOTING ERROR MESSAGES
Troubleshooting Page
Error Message
Table Number
Error 120 5-16 5-33
Delta-F Circuits Failed
Error 121 5-17 5-34
Unleveled Indicator Failed
Error 122 5-17 5-34
Level Reference Failed
Error 123 5-17 5-34
Detector Log Amp Failed
Error 124 5-18 5-36
Full Band Unlocked and
Unleveled
Error 125 5-18 5-36
8.4 – 20 GHz Unlocked and
Unleveled
Error 126 5-18 5-36
2 – 8.4 GHz Unlocked and
Unleveled
Error 127 5-17 5-34
Detector Input Circuit
Failed
Error 128 5-20 5-40
.01 – 2 GHz Unleveled
Error 129 5-20 5-43
Switched Filter or Level
Detector Failed
Error 130 5-20 5-46
2 – 3.3 GH Switched Filter
Error 131 5-20 5-46
3.3 – 5.5 GH Switched Filter
Error 132 5-20 5-46
5.5 – 8.4 GH Switched Filter
Error 133 5-20 5-46
8.4 – 13.25 GH Switched Filter
Error 134 5-20 5-46
13.25 – 20 GH Switched Filter
Error 135 5-20 5-47
Modulator or Driver Failed
Error 142 5-17 5-34
Sample and Hold Circuit
Failed
Error 143 5-17 5-35
Slope DAC Failed
683XXC MM 5-5
SELF-TEST
TROUBLESHOOTING ERROR MESSAGES
Troubleshooting Page
Error Message
Table Number
Error 144 5-25 5-52
RF was Off when Selftest
started. Some tests were
not performed.
Error 145 5-26 5-52
AM meter or associated
circuitry failed
Error 147 5-27 5-53
Internal FM circuitry failed
Error 148 5-28 5-53
Pulse 40 MHz reference
circuitry failed
5-6 683XXC MM
ERROR AND WARNING/
TROUBLESHOOTING STATUS MESSAGES
ERROR Displayed (on the frequency mode title bar) when (1) the
output frequency is not phase-locked, (2) an invalid
frequency parameter entry causes a frequency range
error, or (3) an invalid pulse parameter entry causes a
pulse modulation error.
LOCK ERROR Displayed (in the frequency parameters area) when the
output frequency is not phase-locked. The frequency
accuracy and stability of the RF output is greatly reduced.
Normally caused by an internal component failure. Run
self-test to verify malfunction.
683XXC MM 5-7
ERROR AND WARNING/
TROUBLESHOOTING STATUS MESSAGES
ERR Continued:
(2) The external FM modulating signal exceeds the input
voltage range. In addition, the message “Reduce FM
Input Level” appears at the bottom of the FM status
display.
(3) A pulse parameter setting is invalid for the current
pulse modulation state, as follows:
Single Pulse Mode:
Free Run or Gated Trigger:
Width1 > PRI
Delayed Trigger:
Delay1 + Width1 > PRI
Doublet Pulse Mode:
Free Run Trigger:
Width1 > Delay2 or
Width1 + (Delay2 – Width1) + Width2 > PRI
Delayed Trigger:
Width1 > Delay2 or
Delay1 + Width1 + (Delay2 – Width1) +Width2 > PRI
External Trigger with or without Delay:
Width1 > Delay2
Triplet Pulse Mode:
Free Run Trigger:
Width1 > Delay2 or Width2 > Delay3 or
Width1 + (Delay2 – Width1) + Width2 +
(Delay3 – Width2) + Width 3 > PRI
Delayed Trigger:
Width1 > Delay2 or Width2 > Delay3 or
Delay1 + Width1 + (Delay2 – Width1) + Width2 +
(Delay3 – Width2) + Width 3 > PRI
External Trigger with or without Delay:
Width1 > Delay2 or Width2 > Delay3
Quadruplet Pulse Mode:
Free Run Trigger:
Width1 > Delay2 or Width2 > Delay3 or
Width3 > Delay4 or
Width1 + (Delay2 – Width1) + Width2 + (Delay3 –
Width2) + Width3 + (Delay4 – Width3) + Width4
> PRI
Delayed Trigger:
Width1 > Delay2 or Width2 > Delay3 or
Width3 > Delay4 or
Delay1 + Width1 + (Delay2 – Width1) + Width2 +
(Delay3 – Width2) + Width3 + (Delay4 – Width3) +
Width4 > PRI
External Trigger with or without Delay:
Width1 > Delay2 or Width2 > Delay3 or
Width3 > Delay4
5-8 683XXC MM
ERROR AND WARNING/
TROUBLESHOOTING STATUS MESSAGES
OVN COLD This warning message indicates that the 100 MHz
Crystal oven (or the 10 MHz Crystal oven if Option 16 is
installed) has not reached operating temperature.
Normally displayed during a cold start of the signal
generator. If the message is displayed during normal
operation, it could indicate a malfunction. Run self-test
to verify.
USER 1...5 This status message indicates that a user level flatness
correction power-offset table has been applied to the
ALC.
683XXC MM 5-9
MALFUNCTIONS NOT DISPLAYING
TROUBLESHOOTING AN ERROR MESSAGE
5-4 MALFUNCTIONS NOT The 683XXC must be operating to run self-test. Therefore, malfunc-
DISPLAYING AN ERROR tions that cause the instrument to be non-operational do not produce
MESSAGE error messages. These problems generally are a failure of the 683XXC
to power up properly. Table 5-4, beginning on page 5-12, provides trou-
bleshooting procedures for these malfunctions.
5-5 TROUBLESHOOTING Tables 5-4 through 5-27, beginning on page 5-12, provide procedures
TABLES for isolating malfunctions to a replaceable subassembly or RF compo-
nent. In those cases where any of several subassemblies or RF compo-
nents could have caused the problem, subassembly/RF component re-
placement is indicated. The recommended replacement order is to
replace first the subassemblies/RF components that are most likely to
have failed.
Figure 5-1, on the following page, shows the location of the 683XXC
connectors and test points that are called out in the troubleshooting
procedures of Tables 5-4 through 5-27.
CAUTION
Never remove or replace a subassembly or RF component
with power applied. Serious damage to the instrument may
occur.
5-10 683XXC MM
CONNECTOR AND
TROUBLESHOOTING TEST POINT LOCATIONS
A21-3
BNC/AUX I/0 Rear Panel
Connector PCB
A18 Power
Supply PCB A19
A16 CPU
Interface PCB
A15 A18
Regulator PCB Switched
Filter Assy.
A14 YIG, SDM, SQM A17
Driver PCB
A16
A13 10 MHz
DDS PCB
(Option 22) Test
A15 Points Down Converter
A12 Analog
Instruction PCB
A14
A11 FM PCB
Diplexer
A13
A10 ALC PCB
A12 Directional
A9 PIN Coupler
Control PCB A11
A8 Function A10
Generator PCB
A9
A7 YIG A8
Loop PCB
A7
A6 Pulse 20-40 GHz
Generator PCB SDM
A6
A5 Fine J1 J2 J3 J4 J5 J6 J7
Loop PCB Step
Attenuator
A5 (Option 2)
A4 Coarse J1 J2 J3 J4 J5 J6 J7
Loop PCB
10 MHz Hi-Stab
A4 Crystal Oscillator
A3 Reference J1 J2 J3 J4 J5 J6 J7 (Option 16)
Loop PCB
RF Output
Connector
Figure 5-1. Top View of the 683XXC Showing Connector and Test Point Locations
683XXC MM 5-11
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Step 1. Disconnect the 683XXC from the power source, then check
the line fuse on the rear panel.
q If the line fuse is good, go to step 2.
q If the line fuse is defective, replace but do not apply
power. Go to step 2.
Step 2. Remove the 683XXC top cover and the cover over the A18
and A19 PCBs.
Step 4. Connect the negative lead of the DMM to A19TP3 and the
positive lead to A19TP2, then check for a +28 ±2 volt reading
on the DMM.
q If the voltage is correct, go to step 5.
q If the voltage is incorrect or the line fuse blows, replace
the A19 PCB.
Step 5. Connect the negative lead of the DMM to A15TP1 and the
positive lead to A15TP14, check for a +23.58 ±0.5 volts read-
ing on the DMM.
q If the voltage is correct, the Front Panel assembly or the
cable between Motherboard connector A20J22 and the
Front Panel assembly may be defective.
q If the voltage is incorrect, the +24V standby power supply
may be loaded down by (1) a shorted oven heater for the
100 MHz reference oscillator located on the A3 PCB, (2) a
shorted heater for the optional 10 MHz high stability time
base (if installed), or (3) a defective Front Panel assembly.
5-12 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Step 1. Remove the 683XXC top cover and the cover over the A18
and A19 PCBs.
Step 2. Connect the negative lead of the DMM to A18TP1 and the
positive lead to A18TP3.
683XXC MM 5-13
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Description: The signal generator does not display any error messages
during self-test; however, there is no pulse modulation of the RF out-
put.
Step 5. Using a coaxial cable with BNC connectors, connect the rear
panel PULSE SYNC OUT connector to the External Trigger
Input on an oscilloscope and select External Trigger.
Step 6. Disconnect the cable, W122, from A6J6 and the cable, W123,
from A6J7.
Step 7. Using the oscilloscope, verify the presence of (1) a pulse train
at A6J7 (pulse signal to the Switched Filter) with an output
level of +2 volts to –2 volts, a pulse period of 1 ms, and a
pulse width of 200 ms; and (2) a pulse train at A6J6 (sample
and hold signal to the A10 ALC PCB) with an output level of
0 volts to +1 volt, a pulse period of 1 ms, and a pulse width of
200 ms.
Note that on an expanded timebase, the signal at A6J6 starts
approximately 50 ns before the signal at A6J7.
5-14 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
683XXC MM 5-15
TROUBLESHOOTING
TROUBLESHOOTING TABLES
NOTE
Even if the ±10V reference voltages are correct, there could
still be a malfunction of the DVM multiplexer on the A12
PCB or the DVM circuitry on the A16 CPU Interface PCB.
5-16 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
WARNING
Voltages hazardous to life are present throughout the power
supply circuits, even when the front panel LINE switch is in
the STANDBY postion. When performing maintenance, use
utmost care to avoid electrical shock.
683XXC MM 5-17
TROUBLESHOOTING
TROUBLESHOOTING TABLES
5-18 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
This supply provides ±15 volts to the YIG, SDM, SQM Driver circuits;
the CPU I/O circuits, the YIG-tuned Oscillator, Switched Filter, and
Down Converter assemblies; the Electronic Step Attenuator (if Option
2E or 2F is installed); and the 10 MHz DDS circuits (if Option 22 is in-
stalled).
683XXC MM 5-19
TROUBLESHOOTING
TROUBLESHOOTING TABLES
This supply provides ±15 volts to the Function Generator, PIN Control,
ALC, and Analog Instruction circuits and the Electronic Step Attenua-
tor (if Option 2E or 2F is installed).
5-20 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
This supply provides ±15 volts to the Pulse Generator and the Refer-
ence, Coarse, Fine, and YIG Loop circuits.
683XXC MM 5-21
TROUBLESHOOTING
TROUBLESHOOTING TABLES
5-22 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
This supply provides –28 volts to the front panel LCD contrast circuit
and to drive the YIG-tuned oscillator main tuning coil.
683XXC MM 5-23
TROUBLESHOOTING
TROUBLESHOOTING TABLES
This supply provides +24 volts for the YIG-tuned oscillator heater,
YIG-tuned oscillator bias, the step attenuator and diplexer driver cir-
cuits on the A9 PCB, the V/GHz circuit on the A12 PCB, and the
coarse, fine, and YIG loop circuits. When the 683XXC is switched to
OPERATE, it also takes over the function of the 24VS supply and sup-
plies +24 volts to the 100 MHz reference oscillator oven heater, the
front panel LINE switch circuitry, and the optional 10 MHz high stabil-
ity time base oven heater.
5-24 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Step 1. Troubleshoot the cause of error 148 (Table 5-28, page 5-53).
In most cases, this will also be the cause of error 106.
683XXC MM 5-25
TROUBLESHOOTING
TROUBLESHOOTING TABLES
A3 Reference Loop
Description: The oven of the 100 MHz crystal oscillator or the Option
16 high-stability 10 MHz crystal oscillator has not reached operating
temperature.
Step 1. Using a coaxial cable with BNC connectors, connect the rear
panel 10 MHz REF IN connector to the rear panel 10 MHz
REF OUT connector.
5-26 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
A5 Fine Loop
Description: One or more of the oscillators within the fine loop is not
phase-locked.
683XXC MM 5-27
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Step 11. Using a spectrum analyzer, measure the frequency and am-
plitude of the signal at A5J1 for each of the CW frequencies
generated. In each case, the signal amplitude should be
+3 dBm ±3 dB with sidebands at <–65 dBc.
q If the signals are correct in both frequency and amplitude,
go to step 12.
q If the signals are incorrect, replace the A5 PCB.
Step 12. Reconnect cable W107 to A5J1 and run self-test again.
q If error 111 is not displayed, the problem is cleared.
q If error 111 is still displayed, contact your local Anritsu
service center for assistance.
5-28 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
A4 Coarse Loop
683XXC MM 5-29
TROUBLESHOOTING
TROUBLESHOOTING TABLES
A7 YIG Loop
Description: Error 113 indicates that the YIG loop is not phase-
locked. Error 115 indicates a failure of the not phased-lock indicator
circuit.
Step 1. Verify the signal output from the A4 Coarse Loop PCB by
performing steps 5 thru 7 in Table 5-11.
q If the coarse loop signals are correct in both frequency
and amplitude, go to step 2.
q If the coarse loop signals are incorrect, replace the A4
PCB.
Step 2. Verify the signal output from the A5 Fine Loop PCB by per-
forming steps 9 thru 11 in Table 5-9.
q If the fine loop signals are correct in both frequency and
amplitude, go to step 3.
q If the fine loop signals are incorrect, replace the A5 PCB.
Step 7. If the signals from the coarse loop, fine loop, and switched
filter assembly are all correct, replace the A7 YIG Loop PCB.
5-30 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Down Converter
683XXC MM 5-31
TROUBLESHOOTING
TROUBLESHOOTING TABLES
A11 FM PCB
Description: The FM loop has failed or the loop gain is out of toler-
ance.
5-32 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Table 5-16. Error Messages 107, 117, 118, 119, and 120
683XXC MM 5-33
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Table 5-17. Error Messages 121, 122, 123, 127, 142, and 143 (1 of 2)
A10 ALC
Description: Error 142 indicates a failure of the sample and hold cir-
cuitry on the A10 PCB.
Step 5. Using the oscilloscope, verify the presence of the sample and
hold signal (pulse train described in step 3) at the end of the
cable, W122.
5-34 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Table 5-17. Error Messages 121, 122, 123, 127, 142, and 143 (2 of 2)
Description: Error 143 indicates a problem with the level slope DAC
circuitry on the A10 PCB.
Step 1. Recalibrate the ALC slope. (Refer to chapter 4 for the cali-
bration procedure.)
683XXC MM 5-35
TROUBLESHOOTING
TROUBLESHOOTING TABLES
YIG-tuned Oscillator
5-36 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Step 6. Using the oscilloscope, check for a –0.2 to –3.5 volt YIG
tuning ramp at A14TP10.
q If the ramp signal is correct, go to step 7.
683XXC MM 5-37
TROUBLESHOOTING
TROUBLESHOOTING TABLES
5-38 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Step 6. Using the oscilloscope, check for a –0.2 to –3.5 volt YIG
tuning ramp at A14TP10.
q If the ramp signal is correct, go to step 7.
683XXC MM 5-39
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (1 of 8)
5-40 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (2 of 8)
Step 4. Using the oscilloscope, check at the end of cable W100 for a
>2.0 volt down converter detector output throughout the full
sweep.
q If the detector voltage is correct, replace the A10 PCB.
q If the detector voltage is incorrect, go to step 5.
NOTE Step 5. Using the oscilloscope, check for a +15 volt down converter
bias voltage at A14TP12.
When replacing the A14 PCB,
refer to Table 6-1, page 6-12, for q If the bias voltage is correct, go to step 6.
the correct part number and q If the bias voltage is not correct, replace the A14 PCB.
switch S1 setting for the re-
placement PCB. Step 6. Using the oscilloscope, check for a –2 volt PIN switch drive
voltage at A9TP19 and A9TP22. If the 683XXC has a SDM
installed, also check for a +20 volt PIN switch drive voltage
at A9TP9.
q If the PIN switch drive voltage(s) is correct, go to step 7.
q If the PIN switch drive voltage(s) is not correct, replace
the A9 PCB.
683XXC MM 5-41
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (3 of 8)
5-42 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (4 of 8)
683XXC MM 5-43
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (5 of 8)
Step 3. Using the oscilloscope, check the switched filter bias volt-
ages at A14TP5 and A14TP6. The bias voltage at A14TP5
should be +7 volts; the bias voltage at A14TP6 should be +8
volts. If the 683XXC has a SDM installed, also check for a
+20 volt PIN switch drive voltage at A9TP9.
NOTE q If the bias and the PIN switch drive voltages are correct,
When replacing the A14 PCB, go to step 4.
refer to Table 6-1, page 6-12, for q If the bias voltages are not correct, replace the A14 PCB.
the correct part number and
switch S1 setting for the re- q If the PIN switch drive voltage is not correct, replace the
placement PCB. A9 PCB.
5-44 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (6 of 8)
683XXC MM 5-45
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (7 of 8)
Step 3. Using the oscilloscope, check for the switched filter PIN
switch drive voltages at the test points shown in Table 5-21.
q If the PIN switch drive voltages are correct, replace the
switched filter assembly.
q If the PIN switch drive voltages are incorrect, replace the
A9 PCB.
Table 5-21. Switched Filter PIN Switch Drive Voltages
Active Frequency Active Inactive
Test Point
Range Voltage Voltage
A9TP18 2 to 3.3 GHz –2.35V +1.0V
A9TP10 3.3 to 5.5 GHz –2.0V +1.0V
A9TP12 5.5 to 8.4 GHz –2.0V +1.0V
A9TP16 8.4 to 13.25 GHz –2.0V +1.0V
A9TP21 13.25 to 20 GHz –2.0V +1.0V
A9TP17 2 to 8.4 GHz –2.3V +2.0V
5-46 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Table 5-20. Error Messages 128, 129, 130, 131, 132, 133, 134, and 135 (8 of 8)
Step 2. Replace the switched filter assembly and run self-test again.
q If error 135 is not displayed, the problem is cleared.
q If error 135 is still displayed, contact your local Anritsu
service center for assistance.
683XXC MM 5-47
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Step 3. Using the oscilloscope, check for a +8 volts SDM bias voltage
at A14TP7 throughout the full sweep.
q If the SDM bias voltage is correct, replace the SDM.
q If the SDM bias voltage is not correct, go to step 4.
NOTE
When replacing the A14 PCB, Step 4. Replace the A14 PCB and run self-test again.
refer to Table 6-1, page 6-12, for q If error 138 is not displayed, the problem is cleared.
the correct part number and
switch S1 setting for the re-
q If error 138 is still displayed, contact your local Anritsu
service center for assistance.
placement PCB.
5-48 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Step 3. Using the oscilloscope, check the PIN switch drive voltages
at A9TP11, A9TP15, and A9TP24 (shown in Table 5-23).
q If the PIN switch drive voltages are correct, replace the
SDM.
q If the PIN switch drive voltages are not correct, replace
the A9 PCB.
Table 5-23. SDM PIN Switch Drive Voltages
Active Frequency Active Inactive
Test Point
Range Voltage Voltage
A9TP9 0.01 to 20 GHz +20V –15V
A9TP11 20 to 25 GHz +20V –15V
A9TP15 25 to 32 GHz +20V –15V
A9TP24 32 to 40 GHz +20V –15V
683XXC MM 5-49
TROUBLESHOOTING
TROUBLESHOOTING TABLES
5-50 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
683XXC MM 5-51
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Error 144 RF was Off when Selftest started. Some tests where
not performed
Step 1. Press the OUTPUT key on the front panel to turn the RF
Output ON.
5-52 683XXC MM
TROUBLESHOOTING
TROUBLESHOOTING TABLES
683XXC MM 5-53
TROUBLESHOOTING
TROUBLESHOOTING TABLES
Step 10. Using the oscilloscope, verify the presence of a 10 MHz TTL
signal at the end of cable W105.
q If present, replace the A4 PCB.
q If not present, go to step11.
Step 12. Using the oscilloscope, verify the presence of a 10 MHz TTL
signal at A3J4.
q If present, replace the cable W105.
q If not present, replace the A3 PCB.
5-54 683XXC MM
Chapter 6
Removal and Replacement
Procedures
Table of Contents
WARNING
Hazardous voltages are present inside the 683XXC when-
ever ac line power is connected. Turn off the unit and re-
move the line cord before removing any covers or panels.
Troubleshooting and repair procedures should only be per-
formed by service personnel who are fully aware of the po-
tential hazards.
CAUTION
Many subassemblies in the signal generator contain static-
sensitive components. Improper handling of these subas-
semblies may result in damage to the components. Always
observe the static-sensitive component handling procedures
described in Chapter 1, Figure 1-2.
NOTE
Many assemblies, subassemblies, and components within
the 68XXXC family of instruments are type and model de-
pendent. Before replacing an assembly, subassembly, or
component, always verify the part number of the replace-
ment item. Part numbers can be found in Chapter 1, Tables
1-3 and 1-4.
683XXC MM 6-3
REMOVAL AND CHASSIS
REPLACEMENT PROCEDURES COVERS
6-2 REMOVING AND Troubleshooting procedures require removal of the top cover. Replace-
REPLACING THE ment of some 683XXC assemblies and parts require removal of all cov-
CHASSIS COVERS ers. The following procedure describes this process.
6-4 683XXC MM
REMOVAL AND CHASSIS
REPLACEMENT PROCEDURES COVERS
Rear Feet
(4)
(2)
Top Cover
(2)
Carrying
Handle
(2)
Side Handle
Cover
683MM29.CDR
683XXC MM 6-5
REMOVAL AND FRONT PANEL
REPLACEMENT PROCEDURES ASSEMBLY
6-3 REMOVING AND This paragraph provides instructions for removing and replacing the
REPLACING THE FRONT front panel assembly of the 683XXC. The front panel assembly con-
PANEL ASSEMBLY tains the A1 and A2 Front Panel PCBs. Refer to Figure 6-2 during this
procedure.
Preliminary Disconnect the power cord from the unit and remove
the chassis covers as described in paragraph 6-2.
6-6 683XXC MM
REMOVAL AND FRONT PANEL ASSEMBLY
REPLACEMENT PROCEDURES REMOVAL DIAGRAM
683XXC MM 6-7
REMOVAL AND A3, A4, A5,
REPLACEMENT PROCEDURES OR A6 PCB
6-4 REMOVING AND This paragraph provides instructions for removing and replacing the
REPLACING THE A3, A4, A3 Reference Loop PCB, the A4 Coarse Loop PCB, the A5 Fine Loop
A5, OR A6 PCB PCB, or the A6 Pulse Generator PCB, all of which are located in the
RF housing (see Figure 6-3).
Preliminary Disconnect the power cord from the unit and remove
the top cover as described in paragraph 6-2.
6-8 683XXC MM
REMOVAL AND PCB AND COMPONENT
REPLACEMENT PROCEDURES LOCATOR DIAGRAM
A21-3
BNC/AUX I/0 Rear Panel
Connector PCB
A18 Power
Supply PCB A19
A16 CPU
Interface PCB
A15 A18
Regulator PCB Switched
Filter Assy.
A14 YIG, SDM, SQM A17
Driver PCB
A16
A13 10 MHz
DDS PCB
(Option 22) Test
A15 Points Down Converter
A12 Analog
Instruction PCB
A14
A11 FM PCB
Diplexer
A13
A10 ALC PCB
A12 Directional
A9 PIN Coupler
Control PCB A11
A8 Function A10
Generator PCB
A9
A7 YIG A8
Loop PCB
A7
A6 Pulse 20-40 GHz
Generator PCB SDM
A6
A5 Fine J1 J2 J3 J4 J5 J6 J7
Loop PCB Step
Attenuator
A5 (Option 2)
A4 Coarse J1 J2 J3 J4 J5 J6 J7
Loop PCB
10 MHz Hi-Stab
A4 Crystal Oscillator
A3 Reference J1 J2 J3 J4 J5 J6 J7 (Option 16)
Loop PCB
RF Output
Connector
683XXC MM 6-9
REMOVAL AND
REPLACEMENT PROCEDURES A7 PCB
6-5 REMOVING AND This paragraph provides instructions for removing and replacing the
REPLACING THE A7 PCB A7 YIG Loop PCB, which is located in the main card cage (see Figure
6-3).
Preliminary Disconnect the power cord from the unit and remove
the top cover as described in paragraph 6-2.
6-6 REMOVING AND This paragraph provides instructions for removing and replacing the
REPLACING THE A8, A9, A8 Function Generator PCB, the A9 PIN Control PCB, the A10 ALC
A10, A11, OR A12 PCB PCB, the A11 FM PCB, or the A12 Analog Instruction PCB, all of
which are located in the main card cage (see Figure 6-3).
Preliminary Disconnect the power cord from the unit and remove
the top cover as described in paragraph 6-2.
Procedure Remove and replace the A8, A9, A10, A11, or A12
PCB as follows:
6-10 683XXC MM
REMOVAL AND A13 OR
REPLACEMENT PROCEDURES A15 PCB
6-7 REMOVING AND This paragraph provides instructions for removing and replacing the
REPLACING THE A13 OR A13 10 MHz DDS PCB (added by Option 22) or the A15 Regulator
A15 PCB PCB, both of which are located in the main card cage (see Figure 6-3).
Each of these PCB assemblies consists of a PCB and a PCB Heat Sink
subassembly.
Preliminary Disconnect the power cord from the unit and remove
the top cover as described in paragraph 6-2.
NOTE
If the A13 PCB is being removed,
first disconnect the coaxial cables
from the PCB by lifting up on the
cable connectors.
Step 2 Lift up on the edge tabs of the PCB and
lift it out of the card cage.
6-8 REMOVING AND This paragraph provides instructions for removing and replacing the
REPLACING THE A14 A14 YIG, SDM, SQM Driver PCB, which is located in the main card
PCB cage (see Figure 6-3). The PCB assembly consists of a PCB and PCB
Heat Sink subassembly.
Preliminary Disconnect the power cord from the unit and remove
the top cover as described in paragraph 6-2.
683XXC MM 6-11
REMOVAL AND
REPLACEMENT PROCEDURES A14 PCB
5
4 6
7
NOTE
When setting S1, be sure that
8
2
the switch is seated in the detent 1
9
for the number selected. 0
S1
6-12 683XXC MM
REMOVAL AND A16 OR
REPLACEMENT PROCEDURES A17 PCB
6-9 REMOVING AND This paragraph provides instructions for removing and replacing the
REPLACING THE A16 OR A16 CPU Interface PCB or the A17 CPU PCB, both of which are lo-
A17 PCB cated in the CPU housing assembly (see Figure 6-3).
Preliminary Disconnect the power cord from the unit and remove
the top cover as described in paragraph 6-2.
6-10 REMOVING AND This paragraph provides instructions for removing and replacing the
REPLACING THE A18 A18 Power Supply PCB or the A19 AC Line Conditioner PCB, both of
OR A19 PCB which are located in the power supply housing assembly (see Figure
6-3).
Preliminary Disconnect the power cord from the unit and remove
the top cover as described in paragraph 6-2.
WARNING
When power is removed from the instrument, always allow
five minutes for the capacitors on the A21 Line Filter/Recti-
fier PCB to discharge before removing either the A18 or A19
PCB.
683XXC MM 6-13
REMOVAL AND REAR PANEL
REPLACEMENT PROCEDURES ASSEMBLY
6-11 REMOVING AND This paragraph provides instructions for removing and replacing the
REPLACING THE REAR rear panel assembly of the 683XXC. The rear panel assembly contains
PANEL ASSEMBLY the A21 Line Filter/Rectifier PCB, the A21-1 BNC/AUX I/O Connector
PCB, the line module assembly, and the fan assembly. Refer to Figure
6-5 during this procedure.
Preliminary Disconnect the power cord from the unit and remove
the chassis covers as described in paragraph 6-2.
WARNING
When power is removed from the instrument, always allow
five minutes for the capacitors on the A21 Line Filter/Recti-
fier PCB to discharge before removing the rear panel assem-
bly.
6-14 683XXC MM
REMOVAL AND REAR PANEL
REPLACEMENT PROCEDURES ASSEMBLY
683XXC MM 6-15
REMOVAL AND REAR PANEL ASSEMBLY
REPLACEMENT PROCEDURES REMOVAL DIAGRAM
A19A2
A21-3
PCB Ribbon Cable A21
Shield
A21P2
GPIB A21
Cable PCB
J16
J14 A21-3
PCB
W130
J13
W109
W110
Fan
Assy.
W127, W128, W129
Rear
Panel
Assy.
6-16 683XXC MM
REMOVAL AND
REPLACEMENT PROCEDURES A21 PCB
6-12 REMOVING AND This paragraph provides instructions for removing and replacing the
REPLACING THE A21 Line Filter/Rectifier PCB, which is located on the rear panel as-
A21 PCB sembly (see Figure 6-5).
WARNING
When power is removed from the instrument, always allow
five minutes for the capacitors on the A21 Line Filter/Recti-
fier PCB to discharge before removing the rear panel assem-
bly.
683XXC MM 6-17
REMOVAL AND
REPLACEMENT PROCEDURES A21-3 PCB
6-13 REMOVING AND This paragraph provides instructions for removing and replacing the
REPLACING THE A21-3 BNC/AUX I/O Connector PCB, which is located on the rear
A21-3 PCB panel assembly (see Figure 6-5).
WARNING
When power is removed from the instrument, always allow
five minutes for the capacitors on the A21 Line Filter/Recti-
fier PCB to discharge before removing the A21-3 PCB.
6-18 683XXC MM
REMOVAL AND FAN
REPLACEMENT PROCEDURES ASSEMBLY
6-14 REMOVING AND This paragraph provides instructions for removing and replacing the
REPLACING THE FAN fan assembly, which is located on the rear panel assembly (see Figure
ASSEMBLY 6-5).
WARNING
When power is removed from the instrument, always allow
five minutes for the capacitors on the A21 Line Filter/Recti-
fier PCB to discharge before removing the rear panel assem-
bly.
NOTE
To ensure proper cooling of the unit,
always mount the fan assembly
with the airflow direction indicator
arrow on the fan body pointing to-
ward the interior of the instrument.
683XXC MM 6-19/6-20
Appendix A
Test Records
A-1 INTRODUCTION This appendix provides test records for recording the results of the
Performance Verification tests (Chapter 3) and the Calibration proce-
dures (Chapter 4). They jointly provide the means for maintaining an
accurate and complete record of instrument performance. Test records
are provided for all models of the Series 683XXC Synthesized High
Performance Signal Generators. Table A-1provides the location of each
test record in this appendix.
We recommend that you make a copy of these pages each time the test
procedures are performed. By dating each Test Record copy, a detailed
history of instrument performance can be accumulated.
683XXC MM A-1/A-2
Anritsu Model 68317C Date: __________________________
683XXC MM A-3
TEST MODEL
RECORD 68317C
Coarse Loop/YIG Loop Test Procedure Fine Loop Test Procedure (Standard 68317C)
Test Frequency (in GHz) Measured Value * Test Frequency (in GHz) Measured Value **
* Specification for all frequencies listed above is ±100 Hz ** Specification for all frequencies listed above is ±100 Hz
A-4 683XXC MM
TEST MODEL
RECORD 68317C
Set F1 to 10 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 20 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 30 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 40 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
683XXC MM A-5
TEST MODEL
RECORD 68317C
A-6 683XXC MM
TEST MODEL
RECORD 68317C
683XXC MM A-7
TEST MODEL
RECORD 68317C
*** Maximum variation is 4.0 dB (0.01 to 0.05 GHz); 2.0 dB (0.05 to 8.4 GHz)(typical, not a specification).
A-8 683XXC MM
TEST MODEL
RECORD 68317C
*** Maximum variation is 7.0 dB (0.01 to 0.05 GHz); 6.0 dB (0.05 to 8.4 GHz)(typical, not a specification).
683XXC MM A-9
TEST MODEL
RECORD 68317C
*** Maximum variation is 7.0 dB (0.01 to 0.05 GHz); 6.0 dB (0.05 to 8.4 GHz)(typical, not a specification).
A-10 683XXC MM
TEST MODEL
RECORD 68317C
*** Maximum variation is 4.0 dB (0.01 to 0.05 GHz); 2.0 dB (0.05 to 8.4 GHz)(typical, not a specification).
683XXC MM A-11
TEST MODEL
RECORD 68317C
*** Maximum variation is 7.0 dB (0.01 to 0.05 GHz); 6.0 dB (0.05 to 8.4 GHz)(typical, not a specification).
A-12 683XXC MM
TEST MODEL
RECORD 68317C
*** Maximum variation is 7.0 dB (0.01 to 0.05 GHz); 6.0 dB (0.05 to 8.4 GHz)(typical, not a specification).
683XXC MM A-13
TEST MODEL
RECORD 68317C
Calculate and record the actual AM input sensitivity . . . . . . . . 45% _________ % 55%
Calculate and record the actual peak-to-peak frequency deviation . 190 MHz _______ MHz 210 MHz
A-14 683XXC MM
TEST MODEL
RECORD 68317C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level
Rise Time, Fall Time, and Overshoot Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
683XXC MM A-15
TEST MODEL
RECORD 68317C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level (Continued)
Pulse Level Accuracy (5 GHz, Pulse Width = 0.5 ms) Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
Measure and record the Video Feedthrough voltage spikes . . . . –10 mV _______ mV +10 mV
A-16 683XXC MM
TEST MODEL
RECORD 68317C
683XXC MM A-17/A-18
Anritsu Model 68317C Date: __________________________
683XXC MM A-19
TEST MODEL
RECORD 68317C
This calibration is performed using an automatic test system. Contact Anritsu Customer Service for further information.
4-12 AM Calibration
A-20 683XXC MM
TEST MODEL
RECORD 68317C
4-13 FM Calibration
683XXC MM A-21/A-22
Anritsu Model 68337C Date: __________________________
683XXC MM A-23
TEST MODEL
RECORD 68337C
Coarse Loop/YIG Loop Test Procedure Fine Loop Test Procedure (Standard 68337C)
Test Frequency (in GHz) Measured Value * Test Frequency (in GHz) Measured Value **
A-24 683XXC MM
TEST MODEL
RECORD 68337C
683XXC MM A-25
TEST MODEL
RECORD 68337C
A-26 683XXC MM
TEST MODEL
RECORD 68337C
683XXC MM A-27
TEST MODEL
RECORD 68337C
+ 9 dBm _________dBm
+ 8 dBm _________dBm
+ 7 dBm _________dBm
+ 6 dBm _________dBm
+ 5 dBm _________dBm
+ 4 dBm _________dBm
+ 3 dBm _________dBm
+ 2 dBm _________dBm
+ 1 dBm _________dBm
A-28 683XXC MM
TEST MODEL
RECORD 68337C
+ 9 dBm _________dBm
+ 8 dBm _________dBm
+ 7 dBm _________dBm
+ 6 dBm _________dBm
+ 5 dBm _________dBm
+ 4 dBm _________dBm
+ 3 dBm _________dBm
+ 2 dBm _________dBm
+ 1 dBm _________dBm
+ 0 dBm _________dBm
– 1 dBm _________dBm
683XXC MM A-29
TEST MODEL
RECORD 68337C
+ 3 dBm _________dBm
+ 2 dBm _________dBm
+ 1 dBm _________dBm
+ 0 dBm _________dBm
– 1 dBm _________dBm
– 2 dBm _________dBm
– 3 dBm _________dBm
– 4 dBm _________dBm
– 5 dBm _________dBm
– 6 dBm _________dBm
– 7 dBm _________dBm
– 8 dBm _________dBm
– 9 dBm _________dBm
A-30 683XXC MM
TEST MODEL
RECORD 68337C
+ 9 dBm _________dBm
+ 8 dBm _________dBm
+ 7 dBm _________dBm
+ 6 dBm _________dBm
+ 5 dBm _________dBm
683XXC MM A-31
TEST MODEL
RECORD 68337C
+ 9 dBm _________dBm
+ 8 dBm _________dBm
+ 7 dBm _________dBm
+ 6 dBm _________dBm
+ 5 dBm _________dBm
+ 4 dBm _________dBm
+ 3 dBm _________dBm
A-32 683XXC MM
TEST MODEL
RECORD 68337C
+ 7 dBm _________dBm
+ 6 dBm _________dBm
+ 5 dBm _________dBm
+ 4 dBm _________dBm
+ 3 dBm _________dBm
+ 2 dBm _________dBm
+ 1 dBm _________dBm
+ 0 dBm _________dBm
– 1 dBm _________dBm
– 2 dBm _________dBm
– 3 dBm _________dBm
– 4 dBm _________dBm
– 5 dBm _________dBm
683XXC MM A-33
TEST MODEL
RECORD 68337C
Calculate and record the actual AM input sensitivity . . . . . . . . 45% _________ % 55%
Calculate and record the actual peak-to-peak frequency deviation . 190 MHz _______ MHz 210 MHz
A-34 683XXC MM
TEST MODEL
RECORD 68337C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level
Rise Time, Fall Time, and Overshoot Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
683XXC MM A-35
TEST MODEL
RECORD 68337C
Measure and record the Video Feedthrough voltage spikes . . . . –10 mV _______ mV +10 mV
A-36 683XXC MM
Anritsu Model 68337C Date: __________________________
683XXC MM A-37
TEST MODEL
RECORD 68337C
This calibration is performed using an automatic test system. Contact Anritsu Customer Service for further information.
4-12 AM Calibration
A-38 683XXC MM
TEST MODEL
RECORD 68337C
4-13 FM Calibration
683XXC MM A-39/A-40
Anritsu Model 68347C Date: __________________________
683XXC MM A-41
TEST MODEL
RECORD 68347C
Coarse Loop/YIG Loop Test Procedure Fine Loop Test Procedure (Standard 68347C)
Test Frequency (in GHz) Measured Value * Test Frequency (in GHz) Measured Value **
A-42 683XXC MM
TEST MODEL
RECORD 68347C
Set F1 to 10 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 20 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 30 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 40 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
683XXC MM A-43
TEST MODEL
RECORD 68347C
A-44 683XXC MM
TEST MODEL
RECORD 68347C
683XXC MM A-45
TEST MODEL
RECORD 68347C
A-46 683XXC MM
TEST MODEL
RECORD 68347C
*** Maximum variation is 4.0 dB (0.01 to 0.05 GHz); 2.0 dB (0.05 to 20 GHz)(typical, not a specification).
683XXC MM A-47
TEST MODEL
RECORD 68347C
*** Maximum variation is 7.0 dB (0.01 to 0.05 GHz); 6.0 dB (0.05 to 20 GHz)(typical, not a specification).
A-48 683XXC MM
TEST MODEL
RECORD 68347C
*** Maximum variation is 7.0 dB (0.01 to 0.05 GHz); 6.0 dB (0.05 to 20 GHz)(typical, not a specification).
683XXC MM A-49
TEST MODEL
RECORD 68347C
*** Maximum variation is 4.0 dB (0.01 to 0.05 GHz); 2.0 dB (0.05 to 20 GHz)(typical, not a specification).
A-50 683XXC MM
TEST MODEL
RECORD 68347C
*** Maximum variation is 7.0 dB (0.01 to 0.05 GHz); 6.0 dB (0.05 to 20 GHz)(typical, not a specification).
683XXC MM A-51
TEST MODEL
RECORD 68347C
*** Maximum variation is 7.0 dB (0.01 to 0.05 GHz); 6.0 dB (0.05 to 20 GHz)(typical, not a specification).
A-52 683XXC MM
TEST MODEL
RECORD 68347C
Calculate and record the actual AM input sensitivity . . . . . . . . 45% _________ % 55%
Calculate and record the actual peak-to-peak frequency deviation . 190 MHz _______ MHz 210 MHz
683XXC MM A-53
TEST MODEL
RECORD 68347C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level
Rise Time, Fall Time, and Overshoot Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
A-54 683XXC MM
TEST MODEL
RECORD 68347C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level (Continued)
Pulse Level Accuracy (5 GHz, Pulse Width = 0.5 ms) Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
Measure and record the Video Feedthrough voltage spikes . . . . –10 mV _______ mV +10 mV
683XXC MM A-55
TEST MODEL
RECORD 68347C
A-56 683XXC MM
Anritsu Model 68347C Date: __________________________
683XXC MM A-57
TEST MODEL
RECORD 68347C
This calibration is performed using an automatic test system. Contact Anritsu Customer Service for further information.
4-12 AM Calibration
A-58 683XXC MM
TEST MODEL
RECORD 68347C
4-13 FM Calibration
683XXC MM A-59/A-60
Anritsu Model 68367C Date: __________________________
683XXC MM A-61
TEST MODEL
RECORD 68367C
Coarse Loop/YIG Loop Test Procedure Fine Loop Test Procedure (Standard 68367C)
Test Frequency (in GHz) Measured Value * Test Frequency (in GHz) Measured Value **
A-62 683XXC MM
TEST MODEL
RECORD 68367C
Set F1 to 10 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 20 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 30 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 40 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
683XXC MM A-63
TEST MODEL
RECORD 68367C
A-64 683XXC MM
TEST MODEL
RECORD 68367C
683XXC MM A-65
TEST MODEL
RECORD 68367C
A-66 683XXC MM
TEST MODEL
RECORD 68367C
Set L1 to: Measured Power * Set L1 to: Measured Power * Set L1 to: Measured Power *
*** Maximum variation is 4.0 dB (0.01 to 0.05 GHz); 2.0 dB (0.05 to 20 GHz); 4.0 dB (20 to 40 GHz)(typical, not a
specification).
683XXC MM A-67
TEST MODEL
RECORD 68367C
Set L1 to: Measured Power * Set L1 to: Measured Power * Set L1 to: Measured Power *
*** Maximum variation is 7.0 dB (0.01 to 0.05 GHz); 6.0 dB (0.05 to 20 GHz); 8.2 dB (20 to 40 GHz)(typical, not a
specification).
A-68 683XXC MM
TEST MODEL
RECORD 68367C
Set L1 to: Measured Power * Set L1 to: Measured Power * Set L1 to: Measured Power *
*** Maximum variation is 4.0 dB (0.01 to 0.05 GHz); 2.0 dB (0.05 to 20 GHz); 4.0 dB (20 to 40 GHz)(typical, not a
specification).
683XXC MM A-69
TEST MODEL
RECORD 68367C
Set L1 to: Measured Power * Set L1 to: Measured Power * Set L1 to: Measured Power *
*** Maximum variation is 7.0 dB (0.01 to 0.05 GHz); 6.0 dB (0.05 to 20 GHz); 8.2 dB (20 to 40 GHz)(typical, not a
specification).
A-70 683XXC MM
TEST MODEL
RECORD 68367C
Calculate and record the actual AM input sensitivity . . . . . . . . 45% _________ % 55%
Calculate and record the actual peak-to-peak frequency deviation . 190 MHz _______ MHz 210 MHz
683XXC MM A-71
TEST MODEL
RECORD 68367C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level
Rise Time, Fall Time, and Overshoot Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
A-72 683XXC MM
TEST MODEL
RECORD 68367C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level (Continued)
Pulse Level Accuracy (5 GHz, Pulse Width = 0.5 ms) Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
Measure and record the Video Feedthrough voltage spikes . . . . –10 mV _______ mV +10 mV
683XXC MM A-73
TEST MODEL
RECORD 68367C
A-74 683XXC MM
Anritsu Model 68367C Date: __________________________
683XXC MM A-75
TEST MODEL
RECORD 68367C
This calibration is performed using an automatic test system. Contact Anritsu Customer Service for further information.
4-12 AM Calibration
A-76 683XXC MM
TEST MODEL
RECORD 68367C
4-13 FM Calibration
683XXC MM A-77/A-78
Anritsu Model 68377C Date: __________________________
683XXC MM A-79
TEST MODEL
RECORD 68377C
Coarse Loop/YIG Loop Test Procedure Fine Loop Test Procedure (Standard 68377C)
Test Frequency (in GHz) Measured Value * Test Frequency (in GHz) Measured Value **
A-80 683XXC MM
TEST MODEL
RECORD 68377C
Set F1 to 10 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 20 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 30 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 40 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
683XXC MM A-81
TEST MODEL
RECORD 68377C
A-82 683XXC MM
TEST MODEL
RECORD 68377C
683XXC MM A-83
TEST MODEL
RECORD 68377C
Set L1 to: Measured Power * Set L1 to: Measured Power * Set L1 to: Measured Power *
*** Maximum variation is 4.0 dB (0.01 to 0.05 GHz); 2.0 dB (0.05 to 20 GHz); 4.0 dB (20 to 40 GHz); 5.0 dB (40 to
50 GHz)(typical, not a specification).
A-84 683XXC MM
TEST MODEL
RECORD 68377C
Set L1 to: Measured Power * Set L1 to: Measured Power * Set L1 to: Measured Power *
*** Maximum variation is 7.0 dB (0.01 to 0.05 GHz); 6.0 dB (0.05 to 20 GHz); 8.2 dB (20 to 40 GHz); 10.2 dB (40 to
50 GHz)(typical, not a specification).
683XXC MM A-85
TEST MODEL
RECORD 68377C
Calculate and record the actual AM input sensitivity . . . . . . . . 45% _________ % 55%
Calculate and record the actual peak-to-peak frequency deviation . 190 MHz _______ MHz 210 MHz
A-86 683XXC MM
TEST MODEL
RECORD 68377C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level
Rise Time, Fall Time, and Overshoot Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
683XXC MM A-87
TEST MODEL
RECORD 68377C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level (Continued)
Pulse Level Accuracy (5 GHz, Pulse Width = 0.5 ms) Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
Measure and record the Video Feedthrough voltage spikes . . . . –10 mV _______ mV +10 mV
A-88 683XXC MM
TEST MODEL
RECORD 68377C
683XXC MM A-89/A-90
Anritsu Model 68377C Date: __________________________
683XXC MM A-91
TEST MODEL
RECORD 68377C
This calibration is performed using an automatic test system. Contact Anritsu Customer Service for further information.
4-12 AM Calibration
A-92 683XXC MM
TEST MODEL
RECORD 68377C
4-13 FM Calibration
683XXC MM A-93/A-94
Anritsu Model 68387C Date: __________________________
683XXC MM A-95
TEST MODEL
RECORD 68387C
Coarse Loop/YIG Loop Test Procedure Fine Loop Test Procedure (Standard 68387C)
Test Frequency (in GHz) Measured Value * Test Frequency (in GHz) Measured Value **
A-96 683XXC MM
TEST MODEL
RECORD 68387C
Set F1 to 10 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 20 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 30 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 40 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
683XXC MM A-97
TEST MODEL
RECORD 68387C
A-98 683XXC MM
TEST MODEL
RECORD 68387C
683XXC MM A-99
TEST MODEL
RECORD 68387C
Set L1 to: Measured Power * Set L1 to: Measured Power * Set L1 to: Measured Power *
*** Maximum variation is 4.0 dB (0.01 to 0.05 GHz); 2.0 dB (0.05 to 20 GHz); 4.0 dB (20 to 40 GHz); 5.0 dB (40 to
60 GHz)(typical, not a specification).
A-100 683XXC MM
TEST MODEL
RECORD 68387C
Set L1 to: Measured Power * Set L1 to: Measured Power * Set L1 to: Measured Power *
*** Maximum variation is 7.0 dB (0.01 to 0.05 GHz); 6.0 dB (0.05 to 20 GHz); 8.2 dB (20 to 40 GHz); 10.2 dB (40 to
60 GHz)(typical, not a specification).
683XXC MM A-101
TEST MODEL
RECORD 68387C
Calculate and record the actual AM input sensitivity . . . . . . . . 45% _________ % 55%
Calculate and record the actual peak-to-peak frequency deviation . 190 MHz _______ MHz 210 MHz
A-102 683XXC MM
TEST MODEL
RECORD 68387C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level
Rise Time, Fall Time, and Overshoot Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
683XXC MM A-103
TEST MODEL
RECORD 68387C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level (Continued)
Pulse Level Accuracy (5 GHz, Pulse Width = 0.5 ms) Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
Measure and record the Video Feedthrough voltage spikes . . . . –10 mV _______ mV +10 mV
A-104 683XXC MM
TEST MODEL
RECORD 68387C
683XXC MM A-105/A-106
Anritsu Model 68387C Date: __________________________
683XXC MM A-107
TEST MODEL
RECORD 68387C
This calibration is performed using an automatic test system. Contact Anritsu Customer Service for further information.
4-12 AM Calibration
A-108 683XXC MM
TEST MODEL
RECORD 68387C
4-13 FM Calibration
683XXC MM A-109/A-110
Anritsu Model 68397C Date: __________________________
683XXC MM A-111
TEST MODEL
RECORD 68397C
Coarse Loop/YIG Loop Test Procedure Fine Loop Test Procedure (Standard 68397C)
Test Frequency (in GHz) Measured Value * Test Frequency (in GHz) Measured Value **
A-112 683XXC MM
TEST MODEL
RECORD 68397C
Set F1 to 10 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 20 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 30 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Set F1 to 40 MHz
Record the presence of the worst case harmonic . . . . . . . . . . _______________dBc –30 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
Record the presence of the worst case non-harmonic . . . . . . . _______________dBc –40 dBc
683XXC MM A-113
TEST MODEL
RECORD 68397C
A-114 683XXC MM
TEST MODEL
RECORD 68397C
683XXC MM A-115
TEST MODEL
RECORD 68397C
Set L1 to: Measured Power * Set L1 to: Measured Power * Set L1 to: Measured Power *
*** Maximum variation is 4.0 dB (0.01 to 0.05 GHz); 2.0 dB (0.05 to 20 GHz); 4.0 dB (20 to 40 GHz); 5.0 dB (40 to
65 GHz)(typical, not a specification).
A-116 683XXC MM
TEST MODEL
RECORD 68397C
Calculate and record the actual AM input sensitivity . . . . . . . . 45% _________ % 55%
Calculate and record the actual peak-to-peak frequency deviation . 190 MHz _______ MHz 210 MHz
683XXC MM A-117
TEST MODEL
RECORD 68397C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level
Rise Time, Fall Time, and Overshoot Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
A-118 683XXC MM
TEST MODEL
RECORD 68397C
3-14 Pulse Modulation Tests: Rise Time, Fall Time, Overshoot, and Level (Continued)
Pulse Level Accuracy (5 GHz, Pulse Width = 0.5 ms) Lower Limit Measured Value Upper Limit
Calculate and record the pulse level error. . . . . . . . . . . . . . –1.0 dB _______ dB +1.0 dB
Calculate and record the pulse level error. . . . . . . . . . . . . . –0.5 dB _______ dB +0.5 dB
Measure and record the Video Feedthrough voltage spikes . . . . –10 mV _______ mV +10 mV
683XXC MM A-119
TEST MODEL
RECORD 68397C
A-120 683XXC MM
Anritsu Model 68397C Date: __________________________
683XXC MM A-121
TEST MODEL
RECORD 68397C
This calibration is performed using an automatic test system. Contact Anritsu Customer Service for further information.
4-12 AM Calibration
A-122 683XXC MM
TEST MODEL
RECORD 68397C
4-13 FM Calibration
683XXC MM A-123/A-124
Subject Index
0-9 E
683XXC Electrostatic Discharge Precautions, 1-8
Assembly and Component Locator Diagram, 6-9 Error Messages
General Description, 1-3 Operation Related, 5-7
Major Subsystems Functional Description, 2-3 Self-Test, 5-3 - 5-6
Manuals, Related, 1-5 Exchange Assembly Program
Models, List of, 1-4 Program Description, 1-14
Options, List of, 1-6
Startup Configurations, 1-11 F
System Block Diagram, 2-6 - 2-7
Fan Assembly
Remove/Replace Procedures, 6-19
A Frequency Synthesis Subsystem
ALC/AM/Pulse Modulation Subsystem Block Diagram, 2-11
Block Diagram, 2-17 Functional Description, 2-9
Functional Description, 2-15 Front Panel Assembly
Anritsu Service Centers, 1-18 Remove/Replace Procedures, 6-6
Functional Description
C ALC/AM/Pulse Modulation Subsystem, 2-15
Frequency Synthesis Subsystem, 2-9
Calibration
Major Subsystems, 2-3
ALC Bandwidth Calibration, 4-28
RF Deck Assemblies, 2-19
ALC Slope Calibration, 4-24
System Block Diagram, 2-6 - 2-7
AM Calibration, 4-30
FM Calibration, 4-34
Following Subassembly Replacement, 4-4
G
Initial Setup, 4-7 General Description, 1-3
Phase Modulation Calibration, 4-41
Preliminary Calibration, 4-13 I
RF Level Calibration, 4-23
Identification Number, 1-5
Switched Filter Shaper Calibration, 4-19
Test Equipment, 4-3
Test Record, 68317C, A-19 - A-21
M
Test Record, 68337C, A-37 - A-39 Maintenance, Level of , 1-8
Test Record, 68347C, A-57 - A-59 Manual, Electronic, 1-5
Test Record, 68367C, A-75 - A-77 Manual, GPIB Programming, 1-5
Test Record, 68377C, A-91 - A-93 Manual, Operation, 1-5
Test Record, 68387C, A-107 - A-109 Manual, SCPI Programming, 1-5
Test Record, 68397C, A-121 - A-123 Models, List of, 1-4
Chassis Covers
Remove/Replace Procedures, 6-4 N
Normal Operation Error/Warning Messages, 5-7
683XXC MM Index 1
SUBJECT
INDEX O- T
O T
Options, List of, 1-6 Test Equipment, Recommended, 1-12
Testing, Performance Verification
P Amplitude Modulation Test, 3-27
Frequency Modulation Tests, 3-30
Parts and Subassemblies, Replaceable, 1-14
Frequency Synthesis Tests, 3-10
Parts Ordering Information, 1-14
Harmonic Test: RF Output 2 to 20 GHz, 3-15
Anritsu Service Centers, 1-14
Internal Time Base Aging Rate Test, 3-7
Performance Verification Tests, 3-3
Maximum Leveled Power Listing, 3-6
Preventive Maintenance
Phase Modulation Tests, 3-45
Fan Filter Cleaning, 1-10
Power Level Accuracy and Flatness Tests, 3-23
Pulse Modulation Test: Overshoot, 3-36
R Pulse Modulation Test: Pulse Level
Rear Panel Assembly Accuracy, 3-36
Remove/Replace Procedures, 6-14 Pulse Modulation Test: RF On/RF Off
Recommended Test Equipment, 1-12 Ratio, 3-42
Removal and Replacement Procedures Pulse Modulation Test: Rise/Fall Time, 3-36
A13 or A15 PCB, 6-11 Pulse Modulation Test: Video
A14 PCB, 6-11 Feedthrough, 3-40
A16 or A17 PCB, 6-13 Single Sideband Phase Noise Test, 3-19
A18 or A19 PCB, 6-13 Spurious Signals Test: RF Output <2 GHz, 3-12
A21 PCB, 6-17 Test Equipment, 3-3
A21-3 PCB, 6-18 Test Record, 68317C, A-3 - A-17
A3, A4, A5, or A6 PCBs, 6-8 Test Record, 68337C, A-23 - A-36
A7 PCB, 6-10 Test Record, 68347C, A-41 - A-56
A8, A9, A10, A11, or A12 PCB, 6-10 Test Record, 68367C, A-61 - A-74
Assembly and Component Locator Diagram, 6-9 Test Record, 68377C, A-79 - A-89
Chassis Covers, 6-4 Test Record, 68387C, A-95 - A-105
Fan Assembly, 6-19 Test Record, 68397C, A-111 - A-120
Front Panel Assembly, 6-6 Troubleshooting
Rear Panel Assembly, 6-14 Connector/Test Points Locator Diagram, 5-11
Replaceable Subassemblies and Parts, 1-14 Malfunctions Not Displaying an Error
RF Deck Assemblies Message, 5-10
Block Diagram, 2-21 - 2-24 Normal Operation Error/Warning
Functional Description, 2-19 Messages, 5-7
Self-Test Error Messages, 5-3
S Troubleshooting Tables, 5-10, 5-12 - 5-54
Scope of Manual, 1-3
Self-Test Error Messages, 5-3
Startup Configurations, 1-11
Static-Sensitive Component Precautions, 1-8
Index 2 683XXC MM