Register Number:
INTERNAL TEST I Date/Session 19.10.2024/FN Marks 50
Course code CS3351 Course Title Digital Principles and Computer Orgonization
Regulation 2021 Duration 1:30 Hours Academic Year 2024-2025
CSE, AI&DS,
Year II Semester III Department
CSE(CS), IT
COURSE OUTCOMES
CO1: To analyze and design combinational circuits.
CO2: To analyze and design sequential circuits
CO3: To understand the basic structure and operation of a digital computer.
CO4: To study the design of data path unit, control unit for processor and to familiarize with the
hazards.
CO5: To understand the concept of various memories and I/O interfacing.
Q.No. Question CO BTS
PART A
(Answer all the Questions 10 x 2 = 20 Marks)
1 Define Register. CO2 R
2 What is mean by counter? CO2 U
3 Mention the different types of shift registers. CO2 R
4 What is meant by universal shift register? CO2 R
5 Give the comparison between synchronous and asynchronous counters. CO2 U
6 What are the main functional units of a computer? CO3 R
7 Define program. CO3 U
8 Write the function of register. CO3 U
9 Define program counter. CO3 U
10 List the operations of instruction. CO3 U
PART B
(Answer all the Questions 2 x 15 = 30 Marks)
11a Design a mod-6 synchronous up counter. CO2 A
OR
11b Explain in detail about Von-neumann architecture with a neat diagram. CO3 U
12a Write a detailed note on Addressing modes. CO3 E
OR
12b Describe the Instruction set architecture. CO3 E
Course Faculty HoD Principal
(P.MAHESHWARI) (S.PRABAKARAN) (Dr. M. VIJAYAKUMAR)
Register Number:
INTERNAL TEST I Date/Session 19.10.2024/FN Marks 50
Course code CS3351 Course Title Digital Principles and Computer Orgonization
Regulation 2021 Duration 1:30 Hours Academic Year 2024-2025
CSE, AI&DS,
Year II Semester III Department
CSE(CS), IT
COURSE OUTCOMES
CO1: To analyze and design combinational circuits.
CO2: To analyze and design sequential circuits
CO3: To understand the basic structure and operation of a digital computer.
CO4: To study the design of data path unit, control unit for processor and to familiarize with the
hazards.
CO5: To understand the concept of various memories and I/O interfacing.
Q.No. Question CO BTS
PART A
(Answer all the Questions 10 x 2 = 20 Marks)
1 What is meant by Ripple counter? CO2 R
2 Draw the diagram for 3-bit ripple counter. CO2 A
3 What is RISC? CO3 R
4 What is instruction fetch phase? CO3 R
5 What is ISA? CO3 U
6 Define Operand. CO3 R
7 Define cache memory. CO3 U
8 List the operations of an instruction. CO3 U
9 Write the main functional units of a computer. CO3 U
10 What do you mean by RAM? CO3 U
PART B
(Answer all the Questions 2 x 15 = 30 Marks)
11a With suitable example , explain about state reduction and state assignment. CO2 A
OR
11b Design a mod-6 asynchronous counter using JK flip-flop. CO2 A
12a Explain in detail about addressing modes. CO3 U
OR
12b Differentiate the RISC and CISC architecture. CO3 U
Course Faculty HoD Principal
(P.MAHESHWARI) (S.PRABAKARAN) (Dr. M. VIJAYAKUMAR)
