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Cortex-M0 Vs Cortex-M3 - Blog Space

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21 views2 pages

Cortex-M0 Vs Cortex-M3 - Blog Space

Uploaded by

krish
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Cortex-M0 vs Cortex-M3

Pandi June 27, 2013 2 min read

Here are some hints, difference between Cortex-M0 and Cortex-M3 . These are particularly aimed at someone trying to pick a ARM microcontroller to use
for the first time at least partially as a learning experience, rather than someone who wants to accomplish a particular task.

Cortex-M0 Cortex-M3

The ARM Cortex-M0+ processor is the most energy efficient The ARM Cortex-M3 processor is the industry-leading 32-bit processor for highly
ARM processor available. It builds on the very successful deterministic real-time applications, delivering robust computational performance,
Cortex-M0 processor, retaining full instruction set and tool exceptional system response to events while meeting the challenges of low dynamic and
compatibility, while further reducing energy consumption static power constraints. It is highly configurable enabling a wide range of
and increasing performance. Along with the Cortex-M0 implementations from those requiring memory protection and powerful trace technology
processor, the exceptionally small silicon area, low power to cost sensitive devices requiring minimal area. A broad range of devices include
and minimal code footprint of these processors enable microcontrollers, automotive body systems, industrial control systems and wireless
developers to achieve 32-bit performance at an 8-bit price networking and sensors.
point, bypassing the step to 16-bit devices. The Cortex-M0+
processor comes’ with a wide selection of options to provide
flexible development.

ARM Cortex-M0+ Features ARM Cortex-M3+ Features

ISA Support Thumb® / Thumb-2 subset ISA Support Thumb® / Thumb-2

Pipeline 2 stage Pipeline 3-stage

Performance 2.15 CoreMarks/MHz* – 0.93 to Performance


3.32 CoreMark/MHz* – 1.25 to 1.50 DMIPS/MHz**
Efficiency 1.08 DMIPS/MHz** Efficiency

Memory Optional 8 region MPU with sub Optional 8 region MPU with sub regions and background
Memory Protection
Protection regions and background region region

Non-maskable Interrupt (NMI) + 1 Non-maskable Interrupt (NMI) + 1 to 240 physical


Interrupts Interrupts
to 32 physical interrupts interrupts

Integrated WFI and WFE Interrupt Priority


8 to 256 priority levels
Instructions and Sleep On Exit Levels
Sleep Modes
capability
Sleep & Deep Sleep Signals
Wake-up Interrupt
Up to 240 Wake-up Interrupts
Controller
Bit
Bit banding
Manipulation
Integrated WFI and WFE Instructions and Sleep On Exit
capability.
Enhanced Hardware single-cycle (32×32) Sleep Modes Sleep & Deep Sleep Signals.
Instructions multiply option Optional Retention Mode with ARM Power Management
Kit

Optional JTAG & Serial-Wire Debug


Debug Ports Up to 4 Breakpoints and 2 Bit Manipulation Integrated Instructions & Bit Banding
Watchpoints

Enhanced Hardware Divide (2-12 Cycles), Single-Cycle (32×32)


Trace Optional Micro Trace Buffer Instructions Multiply, Saturated Math Support.

Optional JTAG & Serial-Wire Debug Ports. Up to 8


Debug
Breakpoints and 4 Watchpoints.

Optional Instruction Trace (ETM), Data Trace (DWT),


Trace
and Instrumentation Trace (ITM)
Using Cortex-M0+ processor-based microcontrollers Using Cortex-M3+ processor-based microcontrollers

http://www.tenettech.com/product/1411/lpc1114-lpcxpresso- http://www.tenettech.com/product/1542/lpc1347-lpcxpresso-board
board
http://www.tenettech.com/product/1548/lpc1769-lpcxpresso-board
http://www.tenettech.com/product/1408/lpc11c24-
http://www.tenettech.com/product/2321/blueboard-lpc1768-combo
lpcxpresso-board

http://www.tenettech.com/product/1409/lpc11u14-
lpcxpresso-board

http://www.tenettech.com/product/1517/lpc1227-lpcxpresso-
board

Tags: ARM cortex ARM cortex M3 arm microcontroller Arm Processor Code Footprint Computational Performance Cortex Deep Sleep Flexible Development gpio
with lpc114 LPC lpc gpio LPC1769 LPCXpresso M0 Memory Protection Minimal Area Minimal Code Nmi Performance Efficiency Power Constraints Reducing
Energy Consumption Sensitive Devices Silicon Area Stage Performance Static Power Thumb Thumb Time Applications

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