Scribd
Upload
33 views2 pages

QB Module 2and 3-IA2

Uploaded by

ojusanjan375
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
33 views2 pages

QB Module 2and 3-IA2

Uploaded by

ojusanjan375
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

U S N

Sub: Digital Design and Computer Organization


Sub code: BCS302
Sem:III
MODULE 2 (FROM Carry Look Ahead Adder)
SI Questions CO
No
1 Design Carry Look Ahead Adder with relevant Circuit diagrams 2

2 Implement 4 bit Binary Subtractor using Full Adder 2

3 Define Overflow. Demonstrate with an example 2


4 Define Decoders. Design Three to Eight Line Decoder 2

5 Implement Two to Four Line Decoder with an Enable Input 2


6 Implement 4X16 Decoder using two 3X8 Decoder 2

7 Implement Full Adder using 3X8 Decoder 2

8 Implement the following Boolean functions with a decoder: F1(A,B,C) = ∑m(1, 3,4,7), 2
F2(A,B,C) = ∑m(0,2,3,6) and F3(A,B,C) = ∑m(2,3,6,7)

9 Define Encoder. Design a Four-input Priority Encoder. 2

10 Design 4:1 MUX 2


11 Implement the Boolean Function ∑F(A,B,C)= ∑(3,5,6,7) using 4:1 MUX 2

12 Implement the Boolean function F(A,B,C,D) = ∑m(1,3,4,11,12,13,14,15) with a 8:1 MUX 2

13 Write a Verilog Code for 2X4 Decoder in all three models. 2

14 Write a Data Flow Verilog Code for Full Adder and Full Subtractor 2

15 Write a Verilog code to implement 8:1 MUX 2


16 Explain with relevant diagram SR Latch with and without Enable input with Function Table 2

17 Explain with diagram Functionality of D Latch with Function Table 2

18 Analyze the Working of Master Slave D Flip Flop with Function Table 2
19 Explain JK and T Flip Flop with diagram and Function Table 2
20 Implement Quadruple 2:1MUX 2
MODULE 3

SI Questions CO
No
1 With a neat diagram, describe the functional units of a computer. 3

2 Explain in detail Connection and flow of data between Processor and Memory 3

3 Explain Bus Structure with a neat diagram. Explain different peripherals connected to Bus 3
4 Explain the Performance of a computer System and explain each factor on which the performance 3
depends
5 Analyze the basic operational concepts of a computer. 3
6 Explain in detail Word Alignment of a system/machine. What is the consecutive addresses of aligned 3
words for 16,32 and 64 bit word length of the machine. Show with diagram the consecutive addresses
for the above
7 Explain Memory Operations with example 3

8 Briefly Explain Register Transfer Notation (RTN) and Assembly Language Program (ALP) with an 3
example.
9 Explain the Data Transfer Instructions with an example 3

10 Explain with example Instruction Execution and Straight Line Sequencing 3

11 Explain with example Straight Line Sequencing along with Branching 3


12 Explain the Functionality of Condition Code Bits 3

13 Explain with Example Register, Direct and Immediate Addressing Modes 3

14 Example Indirect Addressing mode. Write a ALP to add n numbers using Indirect addressing mode 3
15 Illustrate an Indexed Addressing mode with an Assembly Language Program (ALP) to find the sum 3
of Test1, Test2 and Test3 scores of N number of students.

You might also like