EE 321 Analog Electronics, Fall 2013

Homework #10 solution

4.7. Consider an n-channel MOSFET with tox = 20 nm, µn = 650 cm2 /V · s,
Vt = 0.8 V, and W/L = 10. Find the drain current in the followinng cases:
(a) vGS = 5 V and vDS = 1 V.
(b) vGS = 2 V and vDS = 1.2 V.
(c) vGS = 5 V and vDS = 0.2 V.
(d) VGS = vDS = 5 V.
First find

W ǫox W
kn′ =µn
L tox L

2 3.45 × 10−11
=650 × 10−2 × 10
20 × 10−9
=1.12 mA/V2
(a) The circuit is operating in triode mode,

v2
 
W
iD =kn′ (vGS − Vt ) vDS − DS
L 2
 
1
=1.12 × (5 − 0.8) × 1 −
2
=4.14 mA

(b) The circuit is operating in triode mode,

2
 
W vDS
iD =kn′ (vGS − Vt ) vDS −
L 2
1.22
 
=1.12 × (2 − 0.8) × 1.2 −
2
=0.81 mA

(c) The circuit is operating in triode mode,

2
 
W vDS
iD =kn′ (vGS − Vt ) vDS −
L 2
0.22
 
=1.12 × (5 − 0.2) × 0.2 −
2
=1.05 mA

1
 (d) The circuit is operating in saturation mode,

kn′ W
iD = (vGS − Vt )2
2 L
1.12
= (5 − 0.8)2
2
=9.9 mA

4.17. An NMOS transistor, fabricated with W = 100 µm and L = 5 µm in a

technology for which kn′ = 50 µA/V2 and Vt = 1 V, is to be operated at very
low values of vDS as a linear resistor. For vGS varying from 1.1 V to 11 V, what
range of resistor values can be obtained? What is the available range if

(a) the device width is halved?

(b) the device length is halved?

(c) both the width and the length are halved?

Since we will be lookinng at very small values of vDS we ignore the second term in the triode
mode expression and are left with
W
iD = kn′ (vGS − Vt ) vDS
L
The resistance is then
1
R=
kn′ W
L
(vGS − Vt )
(larger values of vGS result in smaller resistances). For vGS = 1.1 V we get
1
Rmax = 100 = 10 kΩ
50 × 10−6 × 5
× (1.1 − 1)
For vGS = 11 V we get
1
Rmin = 100 = 100 Ω
50 × 10−6 × 5
× (11 − 1)
4.36. The PMOS transistor in the circuit of Fig. P4.36 has Vt = −0.7 V, µp Cox =
60 µA/V2 , L = 0.8 µm, and λ = 0. Find the values required for W and R in
order to estabilish a drain current of 115 µA and a voltage VD = 3.5 V.

2
To find the value of R we use

VD = RID

VD 3.5
R= = = 30.4 kΩ
ID 115 × 10−6
To find W we use, for saturation mode,
µn Cox W
iD = (vSG + Vt )
2 L

2iD L
W =
µc Cox (vSG + Vt )
2 × 115 × 10−6 × 0.8 × 10−6
=
60 × 10−6 (1.5 − 0.7)
=3.8 µm

4.37. The NMOS transistors in the circuit of Fig. P4.37 have Vt = 1 V, µn Cox =
120µA/V2 , λ = 0, and L1 = L2 = 1 µm. Find the required values of gate width
for each of Q1 and Q2 , and the value of R to obtain the voltage and current
values indicated.

3
The two MOSFETS are operating in saturation mode and we know VDS . The value of R is
found from

VDD − VD2 = ID R

VDD − VD2 5 − 3.5

R= = = 12.5 kΩ
ID 120 × 10−6
For Q2 we have VGS2 = VD2 − VD1 = 2 V, and
µn Cox W2
iD = (VGS2 − Vt )2
2 L2

2L2 iD
W2 =
µn Cox (VGS2 − Vt )2
2 × 1 × 10−6 × 120 × 10−6
=
120 × 10−6 (2 − 1)2
=2 µm

For Q1 we have VGS1 = VD1 = 1.5 V, and

2L1 iD
W1 =
µn Cox (VGS1 − Vt )2
2 × 1 × 10−6 × 120 × 10−6
=
120 × 10−6 (1.5 − 1)2
=8 µm