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Paper / Subject Code: 51123 / Digital Electronics

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Duration: 3hrs [Max Marks:80]

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N.B. : (1) Question No 1 is Compulsory.

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(2) Attempt any three questions out of the remaining five.

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(3) All questions carry equal marks.

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(4) Assume suitable data, if required and state it clearly.

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1 Attempt any FOUR

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a Convert (324)10 into octal, hexadecimal and BCD number systems. [5]

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b Design and explain 4-bit Adder/Subtractor using full adder blocks and suitable gates . [5]

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c What is a Latch? How is it different from a FlipFlop?
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[5]

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d Distinguish between CMOS and TTL Logic Families. [5]

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e Write a code in Verilog HDL to implement D Flipflop.

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[5]

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Two functions are defined as F1(A, B, C)= ∑m (1,2,3,7) and F2= 𝜋𝑀(2,3,6,7)

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2 a C [10]

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Implement using Decoder IC 74138 and suitable gates.
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b With a neat block diagram, explain the working of 7483 IC. Design an 8-bit binary [10]
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adder using the same ICs.

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a With a neat diagram and truth table, explain the working of J-K Flipflop. Explain Race-
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3 [10]

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Around condition and how is it eliminated from J-K flipflop?

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b Explain the working of Bi-Directional Shift Register with a neat diagram and truth table. [10]
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4 a Explain the working of IC7490 as a Decade Counter. Design it as a Mod-6 counter. [10]
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b Design a Non-Overlapping Mealy Sequence Detector for sequence 1101 [10]

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5 a I) Distinguish between PAL and PLA devices. [5]

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II) Implement the following functions using PAL [5]

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X = A.B + A.C’
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Y= AB’ + BC’
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b I) Write a short note on CPLD Devices. [5]

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II) Distinguish between FPGA and CPLD devices. [5]

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6 a Write a code in Verilog HDL to implement 4:16 Decoder. Include appropriate comments. [10]
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b Implement AND, OR and EXOR Gates using only NAND gates. [10]
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********************
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