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Lecture 12 Circuits Family - Part 1

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0% found this document useful (0 votes)
33 views9 pages

Lecture 12 Circuits Family - Part 1

Uploaded by

sabrinahema110
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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EEE 411/ECE411/CSE460

– VLSI DESIGN
Dr. Touhidur Rahman
Professor,
Dept. of EEE, Brac University
[email protected]
Introduction

■ What makes a circuit fast?


– I = C dV/dt -> tpd ∝ (C/I) ∆V
– low capacitance
B 4
– high current
A 4
– small swing Y
1 1
■ pMOS are the enemy!
– High capacitance for a given current
■ Can we take the pMOS capacitance off the input?
■ Various circuit families try to do this…

Article 9.2.4 – CMOS VLSI Design, 4th Edition


Pseudo-nMOS

■ In the old days, nMOS processes had no pMOS


– Instead, use pull-up transistor that is always ON
■ In CMOS, use a pMOS that is always ON
– Ratio issue
– Make pMOS about ¼ effective strength of pulldown network
1.8
load
P/2 1.5

Ids 1.2
P = 24
Vout Vout 0.9

16/2 0.6
Vin P = 14
0.3
P=4

0
0 0.3 0.6 0.9 1.2 1.5 1.8
Vin
Pseudo-nMOS Power

■ Pseudo-nMOS draws power whenever Y = 0


– Called static power P = IDDVDD
– A few mA / gate * 1M gates would be a problem
– Explains why nMOS went extinct
■ Use pseudo-nMOS sparingly for wide NORs
■ Turn off pMOS when not in use

en
Y
A B C
Dynamic Logic
■ Dynamic gates uses a clocked pMOS pullup
■ Two modes: precharge and evaluate

2 2/3  1
A Y Y Y
1 A 4/3 A 1

Static Pseudo-nMOS Dynamic

 Precharge Evaluate Precharge

Y
The Foot

■ What if pulldown network is ON during precharge?


■ Use series evaluation transistor to prevent fight.

 
precharge transistor Y Y

Y inputs inputs
f f
A
foot
footed unfooted
Monotonicity

■ Dynamic gates require monotonically rising inputs during evaluation


– 0 -> 0
– 0 -> 1

– 1 -> 1
– But not 1 -> 0 A

violates monotonicity
during evaluation
A

 Precharge Evaluate Precharge

Output should rise but does not


Monotonicity Woes
■ But dynamic gates produce monotonically
falling outputs during evaluation
■ Illegal for one dynamic gate to drive
another!

A=1

  Precharge Evaluate Precharge


Y
X
A
X
X monotonically falls during evaluation
Y
Y should rise but cannot
THANK YOU

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