LAB MANUAL EE-273L MICROPROCESSOR SYSTEMS

NAME
REG #:

EXPERIMENT NO 9
Assembly Language Instructions

Objective:
To understand TIVA-C-TM4C123GXL Microcontroller’s working and performing different tasks using
TM4C123GXL Launchpad kit on Keil Software. Main objectives of lab are as follow:-
• Using Data Processing Instructions
• Using Logical Instructions
• Using Data Movement Instructions
• Using Bitfield Instructions

Apparatus:
• TM4C123GXL microcontroller board.
• Kiel µVision software.

Introduction:
An assembly language is a low-level programming language designed for a specific type of processor. It may
be produced by compiling source code from a high-level programming language (such as C/C++) but can also be
written from scratch. Assembly code can be converted to machine code using an assembler.
Since most compilers convert source code directly to machine code, software developers often create
programs without using assembly language. However, in some cases, assembly code can be used to fine-tune a
program. For example, a programmer may write a specific process in assembly language to make sure it functions
as efficiently as possible.
While assembly languages differ between processor architectures, they often include similar instructions and
operators.
Data Processing Instructions:
We start the assembly programming introduction using ADD (addition) and MOV (move) instructions,
which belong to the group of data processing instructions. ADD and ADDS are called instruction mnemonics and
represent the opcode field. The registers R1 - R6 and immediate value #0x123 are the operands. The # symbol is
used to specify an immediate value or number. The integer value following the # symbol can be specified in
different formats. For instance, we can use hexadecimal, decimal, or ASCII character format. The comments
provide useful description of the instructions. The ADD instruction only performs addition of operands and the
result is stored in the destination operand. However, the optional suffix S in ADDS instruction is responsible for
updating the condition code flags in the application program status register in addition to performing addition.
The second assembly instruction is MOV instruction, which is used for simple data transfers within the processor.
The use of MOV assembly instruction to perform data exchanges, involving an immediate data transfer to a
register and data transfer between two registers. The ASCII value can be used as an immediate data operand and
transferred to a register. The MOV instruction cannot be used for data transfers between processor registers and
memory.
Logical Instructions:
The logical instructions support bitwise AND, exclusive OR (EOR), simple OR (ORR), OR negative (ORN), and
bit clear (BIC) operations. The general syntax for ORR instruction is given below and is the same for other logical
instructions.
 LAB MANUAL EE-273L MICROPROCESSOR SYSTEMS

The AND, ORR, and EOR instructions perform bitwise AND, OR, and Exclusive OR operations between
instruction parameters Rn and Operand2. The ORN instruction performs an OR operation of the contents of Rn
with the bit wise complement of the value of Operand2. The BIC instruction performs an AND operation on the
bits in Rn with the bit wise complement of the value in Operand2. The bit wise complement of Operand2 in ORN
and BIC instructions is effectively 1’s complement of the value specified by Operand2. The result of these
operations is stored in optionally specified register Rd, which can be the same as Rn. In addition, when Rd is
omitted the result of these operations is stored in the register Rn.
Data Movement Instructions:
Data movement inside the processor can be performed using move (MOV and MOVW), move negative (MVN),
and move top (MOVT) instructions. Table provides details about instruction size(s) and the flags updated by the
corresponding instructions.

The instruction syntax for different move operations is provided below. It should be noted that the move
instructions with Operand2 can update the flags, while the others having #imm16 as operand cannot update any of
the flags. When the optional field {S} is specified the instruction can update the ‘Z’ and ‘N’ flags but does not
affect the ‘V’ flag. Additionally these instructions do not update the ‘C’ flag. However, there is a possibility of
getting the ‘C’ flag updated as a consequence of evaluation of Operand2 and should not be considered as a flag
update due to move operation.

The MOV instruction copies the value from Operand2 to the register Rd. When Operand2 in a MOV instruction
is a register with an optional shift and the shift operation is other than LSL #0, then it preferred that the MOV
instruction should be replaced with the corresponding shift instruction. For instance, the instruction

should be replaced by the corresponding shift instruction, which is

and is the preferred syntax for this operation. The MOVW instruction provides the same functionality as that of
MOV instruction, but is restricted to using the #imm16 as its second operand. The MVN instruction takes the
value of Operand2, performs a bitwise logical NOT operation on the value, and places the result in the destination
register Rd. MOVT writes a 16-bit value, #imm16, to the top halfword of the destination register, i.e., Rd[31:16].
The move operation in MOVT instruction does not affect the lower halfword, i.e., Rd[15:0].
Bitfield Instructions:
The bitfield instructions operate on the adjacent group of bits in the operand registers. The provisioning of these
operations make Cortex-M architecture attractive for many control and signal processing applications. We have
categorized the bitfield instructions further into the following subgroups.
• Bit and byte reversal instructions
• Bitfield clear and insert instructions
• Bitfield extract instructions
• Miscellaneous bitfield instructions
 LAB MANUAL EE-273L MICROPROCESSOR SYSTEMS

Table provides the information related to possible instruction encoding formats (16- bit and 32-bit) for different
bitfield instructions. It should be observed that the bitfield instructions do not affect any program status flags.

Bit and Byte Reversal Instructions:

The bit and byte reversal instructions are used, respectively, to reverse the bit order in a word and the byte order
in a word or a halfword data. The general syntax for bit and byte reversal instructions is given below.

REV instruction performs byte reversals in a word size data. This instruction can be used to convert a word data
from big-endian format to little-endian format or little-endian format to big-endian format. Figure illustrates the
functionality of REV instruction.

REV16 instruction reverses byte order in each halfword independently. It can be used to convert 16-bit big-endian
data into little-endian data or little-endian data into big-endian format. REVSH reverses the byte order in the
bottom halfword and then performs sign extension to make it 32-bit word data. This instruction can be used to
convert 16-bit signed big-endian data into 32-bit signed little-endian data or 16-bit signed little-endian
data into 32-bit signed big-endian data. A pictorial illustration of these instructions is given in Figure.

RBIT instruction reverses the bit order in a 32-bit word. Bit reversal is performed by swapping bit 0 with bit 31,
bit 1 with bit 30, and so on. It is different from REV instruction where byte order is reversed by swapping byte 0
with byte 3 and byte 1 with byte 2.
Bitfield Clear and Insert Instructions:
Bitfield clear (BFC) and bitfield insert (BFI) instructions are used to modify the set of bits in a register. It should
be noted that the bits modified by these instructions are always contiguous. The syntax for these instructions is
given below.
 LAB MANUAL EE-273L MICROPROCESSOR SYSTEMS

BFC clears the specified bitfield in a register. It clears width number of bits, starting at the bit position lsb, in the
destination register Rd, while the other bits of register Rd remain unchanged. The BFI instruction performs
bitfield copying operation from source register to the destination register. It replaces a set of bits in Rd equal to
the size specified by the width field and starting at the bit position specified by lsb. The number specified by the
field lsb marks the least significant bit position of the bitfield to be replaced in destination register Rd. The
register Rn is the bitfield source with the number of bit specified by the field width. However, the starting location
of the bitfield is bit[0] for register Rn. Similar to the BFC instruction, the other bits in Rd remain unchanged in
case of BFI as well. Figure shows one such illustration where BFI instruction is used to combine bitfields from
two different sources.

Bit manipulations are an essential operation for efficient packet processing in different networking applications.
For instance, bitfield modification operations are capable of providing selective access to packed data structures,
such as those encountered in network packet headers. The bit-manipulation instructions in the Cortex-M3
processor like BFI and BFC reduce data-bus activity as well as the need to unpack data structures, resulting in
faster network processing operations.
Lab Exercises:
Task 1: Using Processing Instructions (AND, ORR, BIC, SHIFTING)
THUMB ; Marks the THUMB mode of operation
StackSize EQU 0x00000100 ; Define stack size to be 256 bytes

; Allocate space for the stack.

AREA STACK, NOINIT, READWRITE, ALIGN=3
MyStackMem SPACE StackSize

; Initialize the two entries of vector table.

AREA RESET, READONLY
EXPORT __Vectors
__Vectors
DCD MyStackMem + StackSize ; stack pointer value when stack is empty
DCD Reset_Handler ; reset vector

; The user code (program) is placed in CODE AREA

AREA |.text|, CODE, READONLY
ENTRY
EXPORT Reset_Handler
 LAB MANUAL EE-273L MICROPROCESSOR SYSTEMS

Reset_Handler

MOV R0, #0x12

MOV R1, #0x18F
MOV R5, #0x03C
AND R2, R1, #0xFF00 ; R2 =R1 & 0xFF00
ORR R3, R1, R5 ; R3 = R1 | R5
BIC R5, R1 ; R5 = R5 & (~R1)
LSR R4, R0, #3 ; R4 = R0 << 3
ASR R6, R0, #3 ; R6 = R0 << 3
LSL R7, R0, #3 ; R7 = R0 >> 3
END
Implementation:

Result:

Task 2: Solve y = 64x + c (Processing Instruction)

THUMB ; Marks the THUMB mode of operation
StackSize EQU 0x00000100 ; Define stack size to be 256 bytes

; Allocate space for the stack.

AREA STACK, NOINIT, READWRITE, ALIGN=3
MyStackMem SPACE StackSize
 LAB MANUAL EE-273L MICROPROCESSOR SYSTEMS

; Initialize the two entries of vector table.

AREA RESET, READONLY
EXPORT __Vectors
__Vectors
DCD MyStackMem + StackSize ; stack pointer value when stack is empty
DCD Reset_Handler ; reset vector

; The user code (program) is placed in CODE AREA

AREA |.text|, CODE, READONLY
ENTRY
EXPORT Reset_Handler
Reset_Handler

; Solve y = 64x + c
; Where R3 = y, R2 = x & R1 = c
MOV R1, #0x00000111
MOV R2, #0x000000FF
LSL R2, R2, #6 ; Multiplying R2 with 64
; Now perform the addition operation
ADD R3, R2, R1
END
Implementation:

Result:
 LAB MANUAL EE-273L MICROPROCESSOR SYSTEMS

Task 3: Using Data Movement, Bit and Byte Reversal Instructions

; Using Data Movement, Bit and Byte Reversal Instructions
THUMB ; Marks the THUMB mode of operation
StackSize EQU 0x00000100 ; Define stack size to be 256 bytes

; Allocate space for the stack.

AREA STACK, NOINIT, READWRITE, ALIGN=3
MyStackMem SPACE StackSize

; Initialize the two entries of vector table.

AREA RESET, READONLY
EXPORT __Vectors
__Vectors
DCD MyStackMem + StackSize ; stack pointer value when stack is
empty
DCD Reset_Handler ; reset vector

; The user code (program) is placed in CODE AREA

AREA |.text|, CODE, READONLY
ENTRY
EXPORT Reset_Handler
Reset_Handler

MOVW R0 , #0x1235
MOVT R0 , #1000
MVN R4 , #540
RBIT R1 , R0
REV R2 , R0
REV16 R3 , R0
REVSH R5 , R4
END
Implementation:
 LAB MANUAL EE-273L MICROPROCESSOR SYSTEMS

Result:

Task 4: Using Bitfield Clear and Insert Instructions

; Assembly Program Using Bitfield Clear and Insert Instructions
THUMB ; Marks the THUMB mode of operation
StackSize EQU 0x00000100 ; Define stack size to be 256 bytes

; Allocate space for the stack.

AREA STACK, NOINIT, READWRITE, ALIGN=3
MyStackMem SPACE StackSize

; Initialize the two entries of vector table.

AREA RESET, READONLY
EXPORT __Vectors
__Vectors
DCD MyStackMem + StackSize ; stack pointer value when stack is
empty
DCD Reset_Handler ; reset vector

; The user code (program) is placed in CODE AREA

AREA |.text|, CODE, READONLY
ENTRY
EXPORT Reset_Handler
Reset_Handler

MOVW R0 , #0x1235
MOVT R0 , #1000
MVN R1 , #540
BFI R0 , R1 , #1 , #3
BFC R1 , #4 , #16
END
 LAB MANUAL EE-273L MICROPROCESSOR SYSTEMS

Implementation:

Result:

Conclusion: