Module 2 - Addressing Modes &

Instructions
101003/CS500D
Microprocessors and Microcontrollers
Syllabus

● Addressing Modes of 8086.

● Instruction set – data copy /transfer instructions, arithmetic instructions, logical

instructions, string manipulation instructions, branch instructions,
unconditional and conditional branch instruction, flag manipulation
instructions. Assembler Directives.

● Assembly Language Programming with 8086.

Course Outcomes

● CO1: Illustrate the architecture, modes of operation and addressing modes of

microprocessors.
● CO2: Develop 8086 assembly language programs.
● CO3: Demonstrate interrupts, its handling and programming in 8086.
● CO4: Illustrate how different peripherals (8255,8254,8257) and memory are
interfaced with microprocessors.
● CO5: Outline features of microcontrollers and develop low level programs.
 ● Indicates a way of locating
data or operands

8086 ● Describes the type of the

Addressing Modes operands and the way they
are accessed for executing an
instruction.
8086 Addressing Modes

● According to the flow of instruction execution, the instructions may be

categorized as:

● Sequential control flow instructions

● Control transfer instructions

 ● These instructions after

Sequential Control execution transfer control to

next instruction appearing

Flow Instructions after it (in sequence) in the

program

● Eg: Arithmetic, logical, data

transfer and processor
control instructions
Immediate Addressing Mode

● Immediate data is a part of the instruction

● Example:
● MOV AX, 0005H

● 0005H is the immediate data which is getting moved to AX register

Direct Addressing Mode

● 16-bit memory address (offset) is directly specified in the instruction as a part of it

● Example:
● MOV AX, [5000H]

● Data is in memory location in DS

● Offset address: 5000H

● Effective address: 10H*DS + 5000H

Register Addressing Mode

● Data is stored in a register and it is referred using the particular register.

● All registers except IP may be used in this mode

● Example:
● MOV BX, AX
● ADD AX, BX → Result in AX
Register Indirect Addressing Mode

● Address of memory location which contains data or operand determined in an

indirect way using offset registers

● Offset address of data: Either in BX, SI or DI

● Default segment: DS or ES

● Example:
● MOV AX, [BX]
● MOV AX, [DI]
● Effective address: 10H*DS + [BX]
● Effective address: 10H*ES + [DI]
Indexed Addressing Mode

● Offset of the operand is stored in one of the index registers.

● DS and ES are the default segment registers for SI and DI respectively

● Special case of Register Indirect Addressing Mode

● Example:
● MOV AX, [SI]
● MOV AX, [DI]

● Effective address: 10H*DS + [SI]

● Effective address: 10H*ES + [DI]
Register Relative Addressing Mode

● Data is available at an effective address formed by adding 8-bit or 16-bit

displacement with the content of any one of the registers: BX, BP, SI and DI

● Default segment registers: DS and ES

● Example:
● MOV AX, 50H [BX]

● Effective address: 10H*DS + 50H+[BX]

Base Indexed Addressing Mode

● Data is available at an effective address formed by adding content of a base

register (BX or BP) to the content of any one of the index registers: SI or DI

● Default segment registers: DS and ES

● Example:
● MOV AX, [BX] [SI]

● Effective address: 10H*DS +[BX] + [SI]

Relative Base Indexed Addressing Mode

● Data is available at an effective address formed by adding an 8-bit or 16-bit

displacement with the sum of the content of any one of the base register (BX or

BP) and any one of the index registers: SI or DI

● Default segment registers: DS and ES

● Example:
● MOV AX, 50H [BX] [SI]

● Effective address: 10H*DS +[BX] + [SI] + 50H

 ● Transfer control to some
Control Transfer predefined address or the
address specified in the
Instructions instruction, after their
execution.

● Eg: INT, CALL, RET and JUMP

instructions
● In control transfer instructions, the addressing mode depend upon whether the

destination location is within the same segment or different one.

● Also depends on passing the destination address to the processor.

● Basically 2 types of addressing modes for control transfer instructions:

○ Intersegment addressing mode

○ Intrasegment addressing mode

● Intersegment addressing mode

○ Location to which control is transferred lies in a different segment other than the
current one.

● Intrasegment addressing mode

○ If the destination location lies in the same segment.

Intersegment Direct
Intersegment
Intersegment Indirect
Modes for control
transfer instructions
Intrasegment Direct
Intrasegment
Intrasegment Indirect
Intrasegment Direct Mode
● Address to which control is transferred lies within the same segment in which the
control transfer instruction lies and appears directly in the instruction as an
immediate displacement value.

● The displacement is computed relative to the content of the instruction pointer

IP

● Effective address: Sum of 8 or16 bit displacement + Current content of IP

● 8 bit displacement → Short Jump ( -128 < d < +128)

● 16 bit displacement → Long Jump ( - 32768 < d < +32768)

● Example: JMP SHORT LABEL

Intrasegment Indirect Mode

● Address to which control is transferred lies within the same segment in which the
control transfer instruction lies and the displacement is passed to the instruction
indirectly.

● The branch address is found as the content of a register or memory location.

● This addressing mode maybe used in unconditional branch instructions.

● Example: CALL [BX]

● CS = 1000H
● BX = 0050H
● Effective address → 10H*CS + [BX] = 10050H
Intersegment Direct Mode

● Address to which control is transferred lies in a different segment

● This addressing mode provides a means of branching from one code segment to
another code segment.

● Here the CS and IP of the destination address are specified directly in the
instruction.

● Example: CALL 2000H:0050H

Intersegment Indirect Mode
● Address to which control is transferred lies in a different segment and is passed
to the instruction indirectly.

● Ie. As the contents of a memory block containing four bytes, i.e. IP(LSB), IP(MSB),
CS(LSB) and CS(MSB) sequentially.

● The starting address of the memory block may be referred using any of the
addressing modes, except immediate mode.

● Example: JMP [2000H].

● IP (LSB) → 2000H
● IP (MSB) → 2001H
● CS (LSB) → 2002H
● CS (MSB) → 2003H
 ● Data Copy/Transfer Instructions

● Arithmetic Instructions

8086
● Logical Instructions

● String Instructions

Instructions ● Branch Instructions

● Flag Manipulation Instructions

● Machine Control Instructions

 ● MOV
● PUSH ● LEA

● POP ● LDS/LES
Data Copy/Transfer ● XCHG ● LAHF

Instructions ● XLAT
● IN
● SAHF
● PUSHF

● OUT ● POPF
MOV: Move
● Copies data from a specified source to a specified destination.

● MOV Destination, Source

○ Destination → register/memory location.

○ Source → register, a memory location or an immediate number.

● The source and destination cannot both be memory locations.

● Examples:
MOV AX, 5000H
MOV AX, BX
MOV AX, [SI]
MOV AX, [2000H]
PUSH: Push to Stack POP: Pop from Stack
● Pushes the contents of the specified ● Copies from the stack location pointed
register/memory location in the to by the stack pointer to a destination
instruction on to the stack. specified in the instruction.

● Decrements the stack pointer by 2 ● Increments the stack pointer by 2

● PUSH Source ● POP Destination

● Source → general purpose register, a ● Destination → general purpose register,

memory location or an immediate a segment register or a memory
number. location.

● Examples: ● Examples:
PUSH BX POP BX
PUSH DS POP DS
PUSH [5000H] POP [5000H]
XCHG: Exchange XLAT: Translate
● Exchanges the content of a register with ● Used for finding out the codes in case of
the content of another register or with code conversion problems, using look
the content of memory location(s). up table technique.

● XCHG Destination, Source ● Translate a byte from one code to

another code.
● Cannot directly exchange the content of
two memory locations. ● Byte to be translated → AL, Lookup
table → BX
● Examples:
XCHG AX, BX ● Translation → BX +AL and stores in AL
XCHG [5000H], AX

● Example:
MOV AX, SEG TABLE
MOV DS, AX
MOV AL, CODE
MOV BX, OFFSET TABLE
XLAT
IN: Input the port OUT: Output to the port
● Used for reading an input port. ● Used for writing to an output port.

● Input port address may be specified ● Output port address may be specified
directly or indirectly directly or implicitly in DX

● IN Accumulator, Port ● OUT Port, Accumulator

● AL and AX → Destinations for 8 bit and ● AL and AX → Sources for 8 bit and 16 bit
16 bit operations respectively. operations respectively.

● DX → Only register (implicit) allowed to ● DX → Only register (implicit) allowed to

carry the port address carry the port address

● Examples: ● Examples:
IN AL, 0300H OUT 0300H, AL
IN AX OUT AX
LEA: Load Effective Address LDS/LES: Load Pointer to
● Loads the offset of an operand in the DS/ES
specified register.
● Loads the DS or ES register and the
● LEA Register, Source specified destination register in the
instruction with the content of memory
● Example: location specified as source in the
LEA BX, ADR instruction.

● LDS Register, Source / LES Register,

Source

● Examples:
LDS BX, 5000H
LES BX, 5000H
LAHF: Load AH from lower SAHF: Store AH to lower
byte of flag byte of flag register
● Loads the AH register with the lower ● Sets or resets the condition code flags in
byte of the flag register. the lower byte of the flag register with a
byte from the AH register.

PUSHF: Push Flags to Stack POPF: Pop Flags from Stack

● Pushes the flag register on to the stack. ● Loads the flag register (both bytes) from
contents of memory location currently
● First upper byte and then lower byte. addressed by SP and SS.

● SP decremented by 2 for each push ● SP incremented by 2 for each pop

operation operation
 ● ADD
● ADC ● DAA
● INC ● DAS

Arithmetic ● DEC
● SUB
● MUL
● CBW
Instructions ● SBB ● CWD
● CMP ● DIV
● NEG ● IDIV
ADD: Add
● Adds data from source to data in destination and store the result in the destination.

● ADD Destination, Source

○ Destination → register/memory location.

○ Source → register, a memory location or an immediate number.

● The source and destination cannot both be memory locations.

● Examples:
ADD AX, 0100H
ADD AX, BX
ADD AX, [SI]
ADD AX, [5000H]
ADD [5000H], 0100H
ADD 0100H
ADC: Add with Carry CMP: Compare
● Same operation as ADD instruction, but ● Compares the source operand with a
adds the carry bit flag to the result. destination operand.

● All condition code flags are affected by ● CMP Destination, Source

this instruction.
○ Destination → register/memory location.
● ADC Destination, Source
○ Source → register, a memory location or an
immediate number.
● Examples:
ADC 0100H
ADC AX, BX
● Subtracts source from destination and
ADC AX, [SI] sets flag accordingly
ADC AX, [5000H]
ADC [5000H], 0100H ● Examples:
CMP BX, 0100H
CMP 0100
CMP BX, CX
INC: Increment DEC: Decrement
● Increments the contents of the specified ● Subtracts 1 from the contents of the
register or memory location by 1. specified register or memory location.

● All condition code flags except carry flag ● All condition code flags except carry flag
are affected by this instruction. are affected by this instruction.

● INC Destination ● DEC Destination

● Add 1 to the contents of the operand ● Examples:

DEC AX
● Examples: DEC [BX]
INC AX DEC [5000H]
INC [BX]
INC [5000H]
SUB: Subtract SBB: Subtract with Borrow
● Subtract source from destination and ● Subtract source and borrow flag (CF)
store the result in the destination. from destination and store the result in
the destination.
● SUB Destination, Source
● SBB Destination, Source
○ Destination → register/memory location.
○ Destination → register/memory location.
○ Source → register, a memory location or an
immediate number. ○ Source → register, a memory location or an
immediate number.
● The source and destination cannot both
be memory locations. ● The source and destination cannot both
be memory locations.
● Examples:
SUB 0100H ● Examples:
SUB AX, BX SBB 0100H
SUB AX, [5000H] SBB AX, BX
SUB [5000H], 0100H SBB AX, [5000H]
SBB [5000H], 0100H
MUL: Unsigned IMUL: Signed Multiplication
Multiplication Byte or Word
● Multiplies a signed byte or word by the
● Multiplies an unsigned byte or word by contents of AL or AX.
the contents of AL or AX.
● IMUL Source
● MUL Source
○ Source → register, a memory location

○ Source → register, a memory location

○ Result → MSW in DX, LSW in AX

○ Result → MSW in DX, LSW in AX

● No immediate operand allowed.
● No immediate operand allowed.
● Examples:
IMUL BH
● Examples:
IMUL CX
MUL BH
MUL CX
DIV: Unsigned Division
● Divides an unsigned word or double word by a 8 bit or 16 bit operand.

● DIV Source

● 16 bit operation Dividend → AX, Divisor → specified using any addressing mode except immediate, Quotient → AL,
Remainder → AH

● 32 bit operation Dividend → HSW in DX, LSW in AX, Divisor → specified using any addressing mode except
immediate, Quotient → AX, Remainder → DX

● Does not affect any flag

● Examples:
DIV BL
DIV CX
IDIV: Signed Division
● Same as DIV with signed operands

● IDIV Source

● 16 bit operation Dividend → AX, Divisor → specified using any addressing mode except immediate, Quotient → AL,
Remainder → AH

● 32 bit operation Dividend → HSW in DX, LSW in AX, Divisor → specified using any addressing mode except
immediate, Quotient → AX, Remainder → DX

● Result will be signed number; all flags undefined

● Examples:
IDIV BL
IDIV CX
CBW: Convert Signed Byte to NEG: Negate
Word
● Converts a signed byte to a signed word.
● Replaces the number in a destination
● Copies the sign bit of the byte in AL to with its 2’s complement.
all the bits in AH.
● Destination → register or a memory
● Result in AX location.

● NEG Destination
CWD: Convert Signed Word
● Affects all condition code flags.
to Double Word
● Examples:
● Copies the sign bit of a word in AX to all NEG AL
the bits in DX. NEG BX

● Done before signed division

DAA: Decimal Adjust AL after Addition
● Allows addition of numbers represented in 8-bit packed BCD code.

● Used immediately after normal addition instruction operating on BCD codes.

● Assumes the AL register as the source and the destination, and hence it requires no operand.

● DAA

● Examples: Consider 2 BCD numbers 27 and 35

MOV AL, 27H
ADD AL, 35H (Now the result is 5CH)
DAA (Now the result becomes 62H)
DAS: Decimal Adjust AL after Subtraction
● Allows subtraction of numbers represented in 8-bit packed BCD code.

● Used immediately after normal subtraction instruction operating on BCD codes.

● Assumes the AL register as the source and the destination, and hence it requires no operand.

● DAS

● Examples: Consider 2 BCD numbers 86 and 57

MOV AL, 86H
SUB AL, 57H (Now the result is 2FH)
DAS (Now the result becomes 29H)
 ● AND
● OR ● SHR
● NOT ● SAR
● XOR ● ROR
Logical Instructions ● TEST ● ROL
● SHL ● RCR
● SAL ● RCL
AND: Logical AND
● ANDs each bit in the source with the same numbered bit in the destination, and stores the
result in the destination

● The content of the specified source is not changed

● AND Destination, Source

○ Source → register, a memory location or immediate number

○ Destination → register or a memory location cannot be an immediate number

○ Both cannot be memory locations

● Examples:
AND AX, 0008H
AND AX, BX
AND AX, [5000H]
AND [5000H], DX
AND: Logical AND
● AX → 3F0FH

● AND AX, 0008H

0011 1111 0000 1111 = 3F0FH [AX]

AND
0000 0000 0000 1000 = 0008H

0000 0000 0000 1000 = 0008H [AX]

● Result 0008H will be stored in AX

OR: Logical OR
● ORs each bit in the source with the same numbered bit in the destination, and stores the
result in the destination

● The content of the specified source is not changed

● OR Destination, Source

○ Source → register, a memory location or immediate number

○ Destination → register or a memory location cannot be an immediate number

○ Both cannot be memory locations

● Examples:
OR AX, 0098H
OR AX, BX
OR AX, [5000H]
OR [5000H], 0008H
OR: Logical OR
● AX → 3F0FH

● OR AX, 0098H

0011 1111 0000 1111 = 3F0FH [AX]

OR
0000 0000 1001 1000 = 0098H

0011 1111 1001 1111 = 3F9FH [AX]

● Result 3F9FH will be stored in AX

NOT: Logical Invert
● Inverts each bit (forms the 1’s complement) of the specified

● NOT Destination

○ Destination → register or a memory location

● Examples:
NOT AX
NOT [5000H]

● AX → 200FH

● NOT AX

0010 0000 0000 1111 = 200FH [AX]

1101 1111 1111 0000 = DFF0H [AX]

● Result DFF0H will be stored in AX

XOR: Logical Exclusive OR
● XORs each bit in the source with the same numbered bit in the destination, and stores the
result in the destination

● The content of the specified source is not changed

● XOR Destination, Source

○ Source → register, a memory location or immediate number

○ Destination → register or a memory location cannot be an immediate number

○ Both cannot be memory locations

● Examples:
XOR AX, 0098H
XOR AX, BX
XOR AX, [5000H]
XOR: Logical Exclusive OR
● AX → 3F0FH

● XOR AX, 0098H

0011 1111 0000 1111 = 3F0FH [AX]

XOR
0000 0000 1001 1000 = 0098H

0011 1111 1001 0111 = 3F97H [AX]

● Result 3F97H will be stored in AX

TEST: Logical Compare
● Performs a bit by bit logical AND operation of 2 operands

● Each bit of result is set to 1 if both operand bits are 1, else reset to 0

● Flags affected: CF, SF, PF, SF and ZF

● TEST Destination, Source

○ Source → register, a memory location or immediate number

○ Destination → register or a memory location

○ Both cannot be memory locations

● Examples:
TEST AX, BX
TEST [0500], 06H
TEST [BX] [DI], CX
 SHL/SAL: Shift Logical / Arithmetic Left
● Shift the operand word or byte bit by bit to the left and insert zeros in the newly introduced
LSBs.

● Count is either 1 or specified in CL

● SAL Destination, Count / SHL Destination, Count

○ Destination → register or a memory location

● Examples:
SHL BX, CL

Bit CF 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Positions

Operand
1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1
SHL Result
1st 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1 0
SHL Result
2nd 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1 0 0
 SHR: Shift Logical Right
● Shift the operand word or byte bit by bit to the right and insert zeros in the newly introduced
MSBs.

● Count is either 1 or specified in CL

● SHR Destination, Count

○ Destination → register or a memory location

● Examples:
SHR BX, CL

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CF
Positions

Operand
1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1
Count =1
0 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1
Count = 2
0 0 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0
 SAR: Shift Arithmetic Right
● Shift the operand word or byte bit by bit to the right and insert MSB of the operand in the
newly introduced MSBs.

● Count is either 1 or specified in CL

● SAR Destination, Count

○ Destination → register or a memory location

● Examples:
SAR BX, CL

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CF
Positions

Operand
1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1
Count =1
1 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0 1
Count = 2
1 1 1 0 1 0 1 1 0 0 1 0 1 0 0 1 0
 ROR: Rotate Right without Carry
● Rotates the contents of the destination operand to right (bit-wise). LSB is pushed to CF and
simultaneously to MSB at each operation.

● Count is either 1 or specified in CL

● ROR Destination, Count

○ Destination → register or a memory location

● Examples:
ROR BX, CL

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CF
Positions

Operand
1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1
Count =1
1 1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1
Count = 2
0 1 1 0 1 0 1 1 1 1 0 1 0 1 1 1 0
 ROL: Rotate Left without Carry
● Rotates the contents of the destination operand to left (bit-wise). MSB is pushed to CF and
simultaneously to LSB at each operation.

● Count is either 1 or specified in CL

● ROL Destination, Count

○ Destination → register or a memory location

● Examples:
ROL BX, CL

Bit CF 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Positions

Operand
1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1
Count =1
1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1 1
Count = 2
0 1 0 1 1 1 1 0 1 0 1 1 1 0 1 1 0
 RCR: Rotate Right through Carry
● Rotates the contents of the destination operand to right (bit-wise). CF is pushed to MSB is
pushed and LSB is pushed to CF at each operation.

● Count is either 1 or specified in CL

● RCR Destination, Count

○ Destination → register or a memory location

● Examples:
RCR BX, CL

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CF
Positions

Operand
1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1 0
Count =1
0 1 0 1 0 1 1 1 1 0 1 0 1 1 1 0 1
Count = 2
1 0 1 0 1 0 1 1 1 1 0 1 0 1 1 1 0
 RCL: Rotate Left through Carry
● Rotates the contents of the destination operand to left (bit-wise). CF is pushed to LSB is
pushed and MSB is pushed to CF at each operation.

● Count is either 1 or specified in CL

● RCL Destination, Count

○ Destination → register or a memory location

● Examples:
RCL BX, CL

Bit CF 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Positions

Operand
0 1 0 0 1 1 1 0 1 1 0 1 1 0 1 0 1
Count =1
1 0 0 1 1 1 0 1 1 0 1 1 0 1 0 1 0
Count = 2
0 0 1 1 1 0 1 1 0 1 1 0 1 0 1 0 1
 ● REP
● MOVSB/MOVSW

String Manipulation ● CMPS

● SCAS
Instructions ● LODS
● STOS
MOVSB/MOVSW: Move String Byte to String Word
● Copies a byte or a word from location in the data segment to a location in the extra segment.

● Source → Data segment, Source offset → SI register.

● Destination → Extra segment, Destination offset → DI register.

● Counter → CX Register for multiple-byte or multiple-word moves

● After the byte or a word is moved, SI and DI are automatically adjusted to point to the next
source element and the next destination element.

● If DF is 0, then SI and DI will incremented by 1 after a byte move and by 2 after a word move.

● If DF is 1, then SI and DI will be decremented by 1 after a byte move and by 2 after a word
move.
MOVSB/MOVSW: Move String Byte to String Word
● REP instruction prefix is used with MOVS instruction to repeat if by a value given in CX.

● No flags are affected

● Example:

MOV AX, 5000H

MOV DS, AX
MOV AX, 6000H
MOV ES, AX
MOV CX, 0FFH
MOV SI, 1000H
MOV DI, 2000H
CLD
REP MOVSB
CMPS: Compare String Byte or String Word
● Compares 2 strings of bytes or words.

● Source → Data segment, Source offset → SI register.

● Destination → Extra segment, Destination offset → DI register.

● Length of string → CX Register

● If both byte or word strings are equal the ZF is set

● REP is used to repeat the operation till CX is zero or condition in REP prefix is false.

● After each comparison SI and DI are updated based on DF and counter is decremented.

● In case of mismatch the CF and ZF are modified and execution proceeds further.
● Example:

MOV AX, SEG1

MOV DS, AX
MOV AX, SEG2
MOV ES, AX
MOV SI, OFFSET STRING1
MOV DI, OFFSET STRING2
MOV CX, 010H
CLD
REPE CMPSW

● If both strings are completely equal, CX becomes 0 and ZF is set

● Otherwise ZF is reset
SCAS: Scan String Byte or String Word
● Scans a string of bytes or words for an operand byte or word specified in AL or AX.

● String → Extra segment, Destination offset → DI register.

● Length of string → CX Register

● Direction → DF

● When match is found in the string with the operand, execution stops and ZF is set.

● If no match, ZF is reset

● REPNE prefix is used with this instruction

● Example:

MOV AX, SEG

MOV ES, AX
MOV DI, OFFSET
MOV CX, 010H
MOV AX, WORD
CLD
REPNE SCAS

● If WORD is found in word string, ZF is set

● Otherwise ZF is reset
LODS: Load String Byte or String Word
● Loads AL or AX by contents of a string.

● String → Data segment, Offset → SI register.

● Direction → DF

● For byte transfer (LODSB) SI modified by 1

● For word transfer (LODSW) SI modified by 2

● No other flags affected

● Example:
CLD
MOV SI, OFFSET SOURCE
LODSB
STOS: Store String Byte or String Word
● Stores the AL or AX contents to a string.

● String → Extra segment, Offset → DI register.

● Direction → DF

● For byte store (STOSB) DI modified by 1

● For word store (STOSW) DI modified by 2

● No other flags affected

● Example:
CLD
MOV DI, OFFSET TARGET
STOSB
 ● CALL
● RET
● INT N
Unconditional ● INTO

Branch Instructions ● JMP

● IRET
● LOOP
CALL: Unconditional Call
● Used to call a subroutine/procedure from a main program

● 2 basic types:

● Near Call

○ Call to a procedure, which is in the same code segment as the CALL instruction.

○ Decrements the stack pointer by 2

○ Copies the offset of the next instruction after the CALL into the stack → return address

○ Also loads the IP with the offset of the first instruction in the procedure.

○ A RET instruction at the end of the procedure will return execution to the offset saved on the stack
which is copied back to IP.
● Far Call

○ Call to a procedure, which is in different code segment as the CALL instruction.

○ Decrements the stack pointer by 2 and copies the content of the CS register to the stack.

○ Decrements the stack pointer by 2 again and copies the offset of the instruction after the CALL
instruction to the stack → return address

○ Loads CS with the segment base of the segment that contains the procedure

○ Also loads the IP with the offset of the first instruction in the procedure.

○ A RET instruction at the end of the procedure will return execution to the offset saved on the stack
which is copied back to IP.

● Example:
○ CALL MULT
○ CALL BX
RET: Return from the Procedure
● Return execution from a procedure to the next instruction after the CALL instruction which
was used to call the procedure.

● Near Procedure:

○ Return will be done by replacing the IP with a word from the top of the stack (offset of the next
instruction after the CALL or return address).

○ SP will be incremented by 2

● Far Procedure:

○ Return will be done by replacing the IP with a word from the top of the stack (offset of the next
instruction after the CALL or return address). SP will be incremented by 2

○ The CS register is then replaced with a word from the new top of the stack (segment base part of the
return address). SP will be again incremented by 2
INT N: Interrupt Type N
● 256 interrupts are defined corresponding to the types from 00H to FFH

● INT instruction will:

○ Decrement the stack pointer by 2 and push the flags on to the stack.
○ Decrement the stack pointer by 2 and push the content of CS onto the stack.
○ Decrement the stack pointer by 2 and push the offset of the next instruction after the INT number
instruction on the stack.
○ Get a new value for IP from an absolute memory address of 4 times the type specified in the
instruction.
○ Get a new value for CS from an absolute memory address of 4 times the type specified in the
instruction plus 2
○ Reset both IF and TF. Other flags are not affected
○ Example:
INT 8 new IP →from address 00020H and new CS → from address 00022H.
INT 35 new IP →from address 0008CH and new CS → from address 0008EH.
INTO: Interrupt on Overflow IRET: Return from ISR
● Executed when overflow flag OF is set. ● When an ISR is being executed the IP
and CS and flags are stored onto the
● New contents of IP and CS are taken
stack.
from the address 00010 and 00012
● The IRET instruction is used at the end
● Equivalent to Type 4 interrupt
of the interrupt service procedure to
instruction
return execution to the interrupted
program.

● To do this return, the 8086 copies the

saved value of IP, CS and flags from
stack.

● Execution continues normally

JMP: Unconditional Jump
● Will fetch the next instruction from the location specified in the instruction rather than from
the next location after the JMP instruction.

● Destination → same code segment as the JMP instruction

○ Only IP will be changed to get the destination location → near jump.

● Destination → different from the segment containing the JMP instruction

○ Both the IP and the CS register content will be changed to get the destination location → far jump.

● The JMP instruction does not affect any flag.

● Examples:
JMP CONTINUE
JMP BX
LOOP: Loop Unconditionally
● Repeats a series of instructions some number of times → loaded into CX.

● Each time the instruction executes, CX is automatically decremented by 1.

○ If CX is not 0, execution will jump to a destination specified by a label in the instruction.

○ If CX = 0 after the auto decrement, execution will simply go on to the next instruction after LOOP.

● Examples:
MOV CX,0005
MOV BX,0FF7H
Label: MOV AX, CODE1
OR BX, AX
AND DX, AX
Loop Label
 ● JZ/JE ● JB/JNAE/JC
● JNZ/JNE ● JNB/JAE/JNC
● JS ● JBE/JNA

Conditional Branch ● JNS

● JO
● JNBE/JA
● JL/JNGE

Instructions ● JNO ● JNL/JGE

● JP/JPE ● JLE/JNG
● JNP ● JNLE/JG
 Mnemonic Displacement Operation
1 JZ/JE JUMP IF EQUAL / JUMP IF ZERO Label Transfer execution control to address ‘Label’, if ZF = 1

2 JNZ/JNE JUMP NOT EQUAL / JUMP IF NOT ZERO Label Transfer execution control to address ‘Label’, if ZF = 0

3 JS JUMP IF SIGNED / JUMP IF NEGATIVE Label Transfer execution control to address ‘Label’, if SF = 1

4 JNS JUMP IF NOT SIGNED / JUMP IF POSITIVE Label Transfer execution control to address ‘Label’, if SF = 0

5 JO JUMP IF OVERFLOW Label Transfer execution control to address ‘Label’, if OF = 1

6 JNO JUMP IF NO OVERFLOW Label Transfer execution control to address ‘Label’, if OF = 0

7 JP/JPE JUMP IF PARITY / JUMP IF PARITY EVEN Label Transfer execution control to address ‘Label’, if PF = 1

8 JNP JUMP IF NO PARITY / JUMP IF PARITY Label Transfer execution control to address ‘Label’, if PF = 0
ODD
9 JB/JNAE/JC JUMP IF BELOW / JUMP IF NOT ABOVE Label Transfer execution control to address ‘Label’, if CF = 1
OR EQUAL / JUMP IF CARRY
10 JNB/JAE/JNC JUMP IF NOT BELOW / JUMP IF ABOVE Label Transfer execution control to address ‘Label’, if CF = 0
OR EQUAL / JUMP IF NO CARRY
 Mnemonic Displacement Operation
11 JBE/JNA JUMP IF BELOW OR EQUAL / JUMP IF Label Transfer execution control to address ‘Label’, if CF = 1
NOT ABOVE or ZF = 1
12 JNBE/JA JUMP IF NOT BELOW OR EQUAL / JUMP Label Transfer execution control to address ‘Label’, if CF = 0
IF ABOVE or ZF = 0
13 JL/JNGE JUMP IF LESS THAN / JUMP IF NOT Label Transfer execution control to address ‘Label’, if neither
GREATER THAN OR EQUAL SF = 1 nor OF = 1
14 JNL/JGE JUMP IF NOT LESS THAN / JUMP IF Label Transfer execution control to address ‘Label’, if neither
GREATER THAN OR EQUAL SF = 0 nor OF = 0
15 JLE/JNG JUMP IF LESS THAN OR EQUAL / JUMP IF Label Transfer execution control to address ‘Label’, if ZF = 1 or
NOT GREATER neither SF nor OF is 1
16 JNLE/JG JUMP IF NOT LESS THAN OR EQUAL / Label Transfer execution control to address ‘Label’, if ZF = 0 or
JUMP IF GREATER at least any one of SF and OF is 1 (Both SF & OF are
not 0)
17 JCXZ JUMP IF THE CX REGISTER IS ZERO Label Transfer execution control to address ‘Label’, if CX = 0

18 LOOPZ/LOOP LOOP WHILE CX = 0 AND ZF = 1 Label Loop through a sequence of instructions from ‘Label’,
E while ZF =1 and CX = 0
19 LOOPNZ/LO LOOP WHILE CX = 0 AND ZF = 0 Label Loop through a sequence of instructions from ‘Label’,
OPNE while ZF =0 and CX = 0
 ● CLC → Clear CF
● CMC → Complement CF
● STC → Set CF

Flag Manipulation ● CLD → Clear DF

● STD → Set DF
Instructions ● CLI → Clear IF
● STI → Set IF
Assembly Language Programming

● Write an 8086 program to add numbers consecutively 10 times starting from 01H.
MOV AX, 01H
MOV BX, 02H
MOV CX, 01H
LBL1: ADD AX, BX
INC BX
INC CX
CMP CX, 0AH
JNZ LBL1
MOV DX, AX
Assembly Language Programming
● Add the contents of memory location 2000H:0500H to contents of 3000H:0600H
and store the result in 5000H:0700H
Assembly Language Programming
● Find out the largest number from an unordered array of sixteen 8-bit numbers
stored sequentially in the memory locations starting at offset 0500H in the segment
2000H.
Assembly Language Programming
● Write an assembly language program for calculating the factorial of a number using
8086 microprocessor. Number is in memory location 2000:0500. Store the result in
the location 2000:0600 onwards.
MOV CX, 2000H : Initialize DS at 2000h
MOV DS, CX
MOV CX, [0500] : loads 0500 Memory location content to CX Register
MOV AX, 0001 : loads AX register with 0001
MOV DX, 0000 : loads DX register with 0000
LABEL1: MUL CX : multiply AX with CX and store result in DX:AX pair
LOOP LABEL1 : runs loop till CX not equal to Zero
MOV [0600], AX : store AX register content to memory location 0600
MOV [0601], DX : store DX register content to memory location 0601
HLT : stops the execution of program
Assembly Language Programming
● Write an assembly language program in 8086 microprocessor to divide a 16 bit
number by an 8 bit number. Divisor is in memory location 4000:0500 and dividend
in 4000:0501. Store the quotient in the location 4000:0600.
MOV CX, 4000 :initialize DS
MOV DS, CX
MOV SI, 500 :assigns 500 to SI
MOV DI, 600 :assigns 600 to DI
MOV BL, [SI] :value of divisor will be stored in BL
INC SI :increment the content of SI by 1
MOV AX, [SI] :value of dividend will be stored in AX
DIV BL :divide the content of AX by BL, after execution of this instruction the quotient get stored
in AL and remainder in AH
MOV [DI], AX :moves the content of AX to [DI]
HLT :stops executing the program and halts any further execution