IET Computers & Digital Techniques

Research Article

Network-on-chip heuristic mapping algorithm ISSN 1751-8601

Received on 19th August 2019

based on isomorphism elimination for NoC

Revised 8th June 2020
Accepted on 17th June 2020
E-First on 29th September 2020
optimisation doi: 10.1049/iet-cdt.2019.0212
www.ietdl.org

Weng Xiaodong1 , Liu Yi1, Yang Yintang1

1School of Microelectronics, Xidian University, Xi'an 710071, People's Republic of China
E-mail: [email protected]

Abstract: With the development of network-on-chip (NoC) theory, lots of mapping algorithm have been proposed to solve the
application mapping problem which is an NP-hard (non-polynomial hard) problem. Most algorithms are based on a heuristic
algorithm. They are trapped by iterations limited, not by the distance between iterations, because of the isomorphism of
mapping sequence. In this study, the authors define and analyse the isomorphism with the genetic algorithm (GA) which is a
heuristic algorithm. Then, they proposed an approach called density direction transform algorithm to eliminate the isomorphism
of mapping sequence and accelerate the convergence of population. To verify this approach, they developed a density-
direction-based genetic mapping algorithm (DDGMAP) and make a comparison with genetic mapping algorithm (GMA). The
experiment demonstrates that compared to the random algorithm, their algorithm (DDGMAP) can achieve on an average
23.48% delay reduction and 7.15% power reduction. And DDGMAP gets better performance than GA in searching the optimal
solution.

1 Introduction nodes (k ≤ n), the possible core arrangements (N_ag) on the NoC
network is given by:
In the past few decades, the power consumption of integrated
circuits kept on increasing until the beginning of the past decade n!
when fundamental thermal limits were finally reached by some ICs Nag = . (1)
n−k !
[1]. This limitation pushes the architecture of the microprocessors
to change from single-core to multi-cores so that the Therefore, it is a combinatorial optimisation problem that requires
microprocessor can do the same job in the few GHz. The design of efficient heuristic algorithms to get solutions. Different heuristic
the microprocessor begins to seek more cores to achieve larger algorithms have been proposed in the literature which try to get the
throughput, instead of pursuing the performance improvement of best answer in the limited computing resources, such as BMAP
single-core. Multi-core, even many-core designs have become the (batch Markovian arrival process), SMAP (smart mobile access
mainstream architecture of the processor [2]. Network-on-chip point), NMAP (near-optimal mapping), SA (simulated annealing
(NoC) has emerged as a promising solution for multi-core system- algorithm), PSO (particle swarm optimisation), GA (genetic
on-chip (SoC) communication design [3, 4]. NoC is packet-based, algorithm), ACO (ant colony optimisation), GHA (genetic-based
on-chip communication switching network designed for hyper-heuristic algorithm), [7–15]. GA is a very efficient algorithm
communication among the intellectual property (IP) cores of the which is often used in NoC mapping solutions, [14, 16–18]. The
SoC systems [5]. NoCs use packets to exchange data between authors of [16, 17] proposed to change the coding style of the
processing elements (PEs) via network fabric that consists of chromosome. The authors of [14, 18] proposed to change the way
resource network interfaces, routers and interconnecting links as of crossover. All of them are aimed to solve the genetic inheritance
shown in Fig. 1 [6] of the mapping solutions which are based on GA. However, the
In NoC designs, application mapping optimisation is the most network topology has isomorphism, which means that whether
important part in the design phase because it determines the rotating or flipping the network will not change the information of
topological placement of the IPs onto NoC platform and greatly the network. The isomorphism of the network causes different
affects the certain metrics of performance, e.g. energy, latency, mapping sequences that may have the same network information.
throughput, and power. Application mapping is an NP-hard (non- When the mapping solutions, based on GA, calculate two mapping
polynomial hard) problem [7], because the search space increases sequences having the same network information, and generate the
pictorially with cores increasing. To map k IP cores on n network new chromosome without mutations, the new chromosome may
lose the inheritance characteristic. It means that the good
chromosome may lose during the iterations with the roulette wheel
selection method. On the other side, due to the isomorphism, these
mapping solutions, based on GA, cannot calculate out a population
with the same chromosome. It means that the population is not
convergent. A divergent population means that the algorithm
cannot get the local optimal value, while the GA aims to get the
local optimal value [25].
In this research work, we give the definition of isomorphism
and analyse the application mapping isomorphism based on ‘Mesh’
NoC. Based on the analysis, we propose a density direction
transform algorithm (DDTA). With DDTA, we can eliminate the
isomorphism. Then, based on DDTA, we develop a density-
Fig. 1 4 × 4 mesh network-on-chip [6] direction-based genetic mapping algorithm (DDGMAP) and make
a comparison with the GA to validate this approach.

IET Comput. Digit. Tech., 2020, Vol. 14 Iss. 6, pp. 272-280 272
© The Institution of Engineering and Technology 2020
Fig. 2 Graphs of NoC definitions
(a) APCG,
(b) ARCG,
(c) CHCG

The rest of this paper is organised as follows: Section 2 briefly between nodes lij∈L represents physical links between routers. The
describes the problem formulation and mathematical models for bandwidth of the link between router ri and rj which is the weight
the NoC performance parameters. Section 3 presents some of the edge lij can be denoted as Bwij.
definitions, analyses the isomorphism and detail the DDTA and the
DDGMAP. Section 4 analyses the simulation results. In Section 5, Definition 3: The channel communication graph (CHCG): The
we present concluding remarks and future work. NoC architecture is modelled as a directed graph G(R, L), in which
nodes of the graph represent routers ri∈R and the edges between
2 Problem formulation nodes Lij∈L represent the channel load of the link after application
2.1 Background mapping between router ri and rj which is the result calculated with
the application mapping result and routing algorithm and
In this paper, NoC mapping is to complete an NoC assignment that constrained by the physical links lij and the bandwidth Bwij.
minimises energy consumption and the latency of communication.
Our work is based on the two-dimensional (2D) mesh regular NoC (Fig. 2)
platform. The algorithm is based on XY routing and packets
exchange through the wormhole. To formulate the problem, we 2.2 Energy model
refer to [20] and define the following terminologies. The energy of NoC consists of static energy and dynamic energy.
The static energy is mainly influenced by process technology,
Definition 1: The application characteristic graph (APCG): The temperature and supply voltage. For different mapping patterns on
application is modelled as a directed graph G (C, A), where each a specific chip, only supply voltage and temperature tend to vary
vertex ci∈C represents an IP core, each edge aij∈A represents the within a small range while the process technology is exactly the
communication between ci and cj, and the weight of each edge Vij same. The dynamic energy consists of computation energy and
indicates the communication volume on edge aij. communication energy. The computation energy is consumed by
PEs for computing the tasks in the applications. It remains
Definition 2: The architecture characterisation graph (ARCG): unchanged as the overall tasks are the same for different mapping
The NoC architecture is modelled as a directed graph G (R, L), in patterns. Therefore, energy is referred to communication energy in
which nodes of the graph represents routers ri∈R and the edges this paper.

IET Comput. Digit. Tech., 2020, Vol. 14 Iss. 6, pp. 272-280 273
© The Institution of Engineering and Technology 2020
 To estimate the communication energy of NoC, the concept of 2.4 Optimisation model
bit energy [20] is introduced. Eij represents the energy consumption
In this paper, optimisation of performance includes both energy
of transporting one-bit data from router ri to rj and is calculated by:
and delay. However, the importance of energy and delay is
different when mapping applications onto different systems. On
Ei j = hops − 1 × Elbit + hops × ERbit (2) account of this, a weight parameter α∈[0, 1] is introduced and the
overall cost of a mapping pattern can be expressed as
Elbit and ERbit represent the energy consumed by transmitting a bit
of data through a link and a router, respectively. And the energy of 1
routers constitutes both buffer and switch energy. Where hops are Cost =
αNEc + 1 − α NT l (10)
the Manhattan distance from the source node (xi, yi) to the
destination node (xj, yj) of the NoC architecture and is given by: where NEC and NTl are the normalised energy and delay,
respectively.
hops = xi − x j + yi − y j . (3)
3 Algorithm in detail
Base on (2), the communication energy EC is calculated by:
GA is a general search technique based on the genetic process of
biological organisms. It aims at optimising some objective
Ec = ∑ bi j × Ei j (4) function, referred to as fitness function [23]. There are many
mapping algorithms based on the GA proposed to optimise NoC
where bij is the number of bits to be transferred from router ri to rj. design. However, from the literature, we do not see any discussion
To calculate the energy consumption, we refer to [15] and the bit about the inheritance. Due to the isomorphism of mapping result,
energy values for link, switch, read and write buffer as 0.449, population calculated by most genetic mapping algorithms cannot
0.284, 1.056, and 2.831 pJ, respectively. converge and the optimal process leaks’ inheritance. It means that
most genetic mapping algorithms are a wholly randomised process.
2.3 Delay model However, the GA is a constrained randomised process essentially.
This section will discuss the followings to detail our algorithm:
In this paper, a wormhole is used as the switching technology for
the network. To estimate the communication latency of NoC, the i. Giving the definition and analysis of network isomorphism.
average network delay (Tav) [19] is introduced ii. Proposing an application mapping density definition and a
direction definition.
Tl + Tr iii. Analysing the isomorphism with GA based on ‘Mesh’ NoC.
T av = (5)
iv. Proposing an algorithm to eliminate the isomorphism (density
n n
∑i = 1 ∑ j = 1 λi, j
direction transform algorithm, DDTA).
where Tl is the delay from the links and Tr is the delay from the v. Proposing a new genetic mapping algorithm (density-direction-
routers. λi,j represents the number of flits being transmitted from ci based genetic mapping algorithm, DDGMAP).
to cj and n means the number of PE.
At the system level, the time consumed in the global links of 3.1 Definition of network isomorphism
network topology can be measured by If all cores and all links are the same and the network topology is
the one of ‘Mesh’, ‘Torus’, ‘Ring’ etc. the network topology has
m n
isomorphism. Isomorphism is a characteristic of the network. A
Tl = ∑ ∑ λi jCi jut, , (6) network topology has isomorphism, which means that whether
i j
rotating or flipping the network will not change the network
where i and j are the destination and source node indexes, information. For example, Fig. 3 is the video objective plane
respectively. Ci,j is the minimum number of links needed to decoder (VOPD) APCG. [1, 5, 10, 11, 4, 6, 9, 12, 2, 3, 7, 8, 16, 15,
14, 13] is one of its mapping sequences. [16, 15, 14, 13, 2, 3, 7, 8,
transmit these packets from their source to destination when
4, 6, 9, 12, 1, 5, 10, 11] is an isomorphic sequence which can be
implemented in a certain topology, and ut represents a unit time.
transformed through the network flipping up and down.
The architecture of an m-ports output queuing router has been The sequence mapping graph, the corresponding CHCG and the
modelled in [21] as follows: transform process are shown in Fig. 4. From Figs. 4c and d, we can
see that both mapping sequences have the same network
7 + T aq information and performance. We call this characteristic as
T router = ut (7)
2 isomorphism.
Actually, each mapping sequence for a 4 × 4 mesh network has
where Taq is the average number of time steps a flits spends inside 8 isomorphic mapping sequences which have the same network
the queue, which is given by [21] information. The isomorphic mapping sequence can be known by
means like rotation, symmetry or rotation and symmetry with the
Bav mapping graph.
T aq = (8)
No
3.2 Density definition and direction definition
where Bav is the average queue size, and No is the throughput
To eliminate the isomorphism and transform all isomorphic
(packet/time step) and they can be calculated according to [20, 22].
samples into the same form, this section proposes a density
From (5) and (6), the total delay consumed in the routers can be
definition and a corresponding direction definition to help solve
calculated as:
this problem. The density definition is proposed to characteristic
m n hops the isomorphic samples. The density direction definition is
Tr = ∑∑ λi j ∑ T router(ports) . (9) proposed to give the basis of the transformation.
i=1 j=1 x=1 Density definition:
We define four densities to describe the mapping graph's
characteristics, north density (DN), south density (DS), west
density (DW) and east density (DE).

274 IET Comput. Digit. Tech., 2020, Vol. 14 Iss. 6, pp. 272-280
© The Institution of Engineering and Technology 2020
 m represents the number of columns, and n represents the We define the direction by the size relation of four densities
number of rows. defined above. To easily describe this definition, we have four
Here is the density calculation formula: names D1, D2, D3, D4 based on the size of these densities (D1 <
D2 < D3 < D4). Then we define the directions as (DN, DW, DS,
m, n are odd: m is odd, n is even: DE). For example, if DN < DS < DE < DW, the mapping graph's
direction can be described as (D1, D4, D2, D3) or (1, 4, 2, 3) as
DN = Σnj = 1Σ(im= −1 1)/2Li j DN = Σnj = 1Σ(im= −1 1)/2Li j
shown in Fig. 5.
DS = Σnj = 1Σmj = (m + 1)/2Li j DS = Σnj = 1Σmj = (m + 1)/2Li j With the way of rotating and flipping one mapping graph, all
isomorphic schemes can be obtained. We use the direction graph to
DW = Σim= 1Σ(jn=−11)/2Li j DW = Σim= 1Σnj /2= 1Li j describe all isomorphic schemes, as shown in Fig. 6.
DE = Σim= 1Σnj = (n + 1)/2Li j DE = Σim= 1Σnj = n /2Li j
3.3 Analysis of the isomorphism with GA
m is even, n is odd: m, n are even:
NoC mapping is a very special NP-hard problem. In most
DN = Σnj = 1Σim=/21Li j DN = Σni = 1Σm /2
i = 1Li j
situations, crossover used in NoC mapping brings less inheritance
DS = Σnj = 1Σmj = m /2Li j DS = Σnj = 1Σmj = m /2Li j and more mutations. If we do not get an inheritance from the
crossover, the GA would only have mutations and the GA is
DW = Σim= 1Σ(jn=−11)/2Li j DW = Σm n /2
i = 1Σ j = 1Li j equivalent to a randomised algorithm. Our work wants to analyse
DE = Σm n
i = 1Σ j = (n + 1)/2Li j DE = Σm n
i = 1Σ j = n /2Li j
the isomorphism to enhance the inheritance.
Here are two mapping sequences. One is [1, 5, 10, 11, 4, 6, 9,
Density direction definition: 12, 2, 3, 7, 8, 16, 15, 14, 13] and the other is [16, 15, 14, 13, 2, 3, 7,
8, 4, 6, 9, 12, 1, 5, 10, 11]. From Fig. 5, we can know that both

Fig. 3 APCG of VOPD

Fig. 4 The transform process of two mapping sequences

(a) Is the mapping graph of sequence, [1, 5, 10, 11, 4, 6, 9, 12, 2, 3, 7, 8, 16, 15, 14, 13],
(b) Is the mapping graph of sequence, [16, 15, 14, 13, 2, 3, 7, 8, 4, 6, 9, 12, 1, 5, 10, 11],
(c) Is the transform process in the mapping graph and CHCG of sequences

Fig. 5 Direction

IET Comput. Digit. Tech., 2020, Vol. 14 Iss. 6, pp. 272-280 275
© The Institution of Engineering and Technology 2020
Fig. 6 Isomorphism mapping approach

Fig. 7 Example of parents and children

(a) Is the sequence without concerning isomorphism,
(b) Is the sequence concerning isomorphism

mapping sequences are isomorphic. Make an assumption that [1, 5, 3.4 Density direction transform algorithm
10, 11, 4, 6, 9, 12, 2, 3, 7, 8, 16, 15, 14, 13] is the local best
sequence. And from Section 3.1, we know that [16, 15, 14, 13, 2, 3, To eliminate the isomorphism, we define the density direction
7, 8, 4, 6, 9, 12, 1, 5, 10, 11] is also the local best sequence. If we allowed – (1, 2, 3, 4), (1, 2, 4, 3), (1, 3, 2, 4). If we transform all
only crossover sequences without mutations, the next generation the schemes to the direction allowed, the population will not have
still cannot have all local good characteristics of the previous different and isomorphic sequences.
generation and cannot be a good sequence as its parents. The child To transform the density direction to the direction allowed, this
cannot strengthen the local best, as shown in Fig. 7. It means that paper proposes a transformed algorithm. The pseudo-code of the
the local best sequence may lose in the population iterations due to proposed algorithm is shown as follows:
the isomorphism and roulette wheel selection method. So, the
population with isomorphism converges slowly and may not
converge to one mapping sequence. The crossover way is referred Input: The channel communication graph (CHCG)
to [14]. Output: CHCG without isomorphism
Make an assumption that one sequence has many excellent 01: Calculate the application mapping density
characteristics and the other does not. Both sequences have 02: Calculate the direction
different density directions. We hope that one of their ‘children’ 03: Find the place d1, rotate or flip D1 to DN
could get excellent characteristics during the crossover, so we set a 04: Judge the values of DE and DW, and decide whether to do left–
large crossover rate to ensure one of the children could have right symmetry operation or not.
excellent characteristics. However, in the NoC mapping problem,
characteristics have a close relationship with the global layout. So, Due to no multiplication times in the calculation, there is no
the characteristics in the sequence have the direction as well. Next- additional complexity.
generation with different directions could have a little possibility to
get the excellent characteristic during the crossover, as shown in 3.5 Density-direction-based genetic mapping algorithm
Fig. 7. If we change the sequence with density direction, the child
could get the characteristics. To validate the algorithm which can be used in genetic mapping
The proposed approach, in the next section, is based on density algorithm, we add it to the GA proposed from the literature and
direction. It is used to eliminate the isomorphism and help compare the result with a GA without concerning isomorphism.
accelerate the convergence of the population. A convergent Here is pseudo-code of the algorithm, DDGMAP.
population means that the calculation gets the local minimum
fitness and GA aims to get the local optimal value. From the other
side, if we know a population is nearly convergent, we can increase Input: APCG, ARCG and routing algorithm (XY)
the mutation rate to break away from the local optimum so that we Output: Position of mapped IPs and estimation of delay, energy
can obtain better local optimum. and different cost
01: Initial population
02: Transform population
03: For I iteration

276 IET Comput. Digit. Tech., 2020, Vol. 14 Iss. 6, pp. 272-280
© The Institution of Engineering and Technology 2020
………… the test. The routing algorithm is ‘XY’. The evaluation of energy
Calculate the next generation and delay is based on the models mentioned in Section 3. To verify
Calculate the channel load the validity of the mapping algorithm we proposed, GA and our
Calculate the fitness proposed DDGMAP are tested with specific applications,
Transform the sample. respectively. The testing process is completed in MATLAB.
RAND3 × 3, RAND4 × 4, RAND5 × 5, RAND6 × 6 is generated by
Update the population
Task Graphs for Free, as shown in Figs. 8a–c. VOPD, as shown in
………… Fig. 8d, is an application-specific communication, which is often
End used to test the efficiency of NoC design [24]. GAs are referred to
[14, 18].
4 Experiment result To verify the effectiveness of the algorithm, two experiments
are carried out. Experiment results, including delay and energy, are
In this section we present the experimentations and results of
normalised. The first is to apply both algorithms in different scales
DDGMAP to verify DDTA. The topology of NoC is 2D mesh
mapping problem and compare the different cost with a fixed rand
topology, and the size of NOC is set as 3 × 3 4 × 4, 5 × 5, 6 × 6 for

Fig. 8 APCG for applications

(a) RAND5 × 5,
(b) RAND4 × 4,
(c) RAND3 × 3,
(d) VOPD

IET Comput. Digit. Tech., 2020, Vol. 14 Iss. 6, pp. 272-280 277
© The Institution of Engineering and Technology 2020
Fig. 9 Mapping for RAND3 × 3
(a) Delay comparison in RAND3 × 3 application mapping concerning density and RAND3 × 3 application mapping not concerning density,
(b) Energy comparison in RAND3 × 3 application mapping concerning density and RAND3 × 3 application mapping not concerning density,
(c) Cost (Cost = 1/ 0.5NEc + 1 − 0.5 NT l ) comparison in RAND3 × 3 application mapping concerning density and RAND3 × 3 application mapping not concerning density

Fig. 10 Mapping for RAND4 × 4

(a) Delay comparison in RAND4 × 4 application mapping concerning density and RAND4 × 4 application mapping not concerning density,
(b) Energy comparison in RAND4 × 4 application mapping concerning density and RAND4 × 4 application mapping not concerning density,
(c) Cost (Cost = 1/ 0.5NEc + 1 − 0.5 NT l ) comparison in RAND4 × 4 application mapping concerning density and RAND4 × 4 application mapping not concerning density

seed. The second is to apply both algorithms in VOPD mapping different application scales, as shown in Figs. 9–12. From the
problem with different rand seeds and compare different costs second experiment, in most rand seeds, DDGMAP can have a
statistically. The rand seed is set from 1 to 10. Since both are based better performance than GA in VOPD mapping problem, as shown
on random, the results have a contingency. We use different rand in Fig. 13.
seeds to compare the performance.
From the first experiment, DDGMAP can have a better
performance than GA in different NoC mapping problems with

278 IET Comput. Digit. Tech., 2020, Vol. 14 Iss. 6, pp. 272-280
© The Institution of Engineering and Technology 2020
Fig. 11 Mapping for RAND5 × 5
(a) Delay comparison in RAND5 × 5 application mapping concerning density and RAND5 × 5 application mapping not concerning density,
(b) Energy comparison in RAND5 × 5 application mapping concerning density and RAND5 × 5 application mapping not concerning density,
(c) Cost (Cost = 1/ 0.5NEc + 1 − 0.5 NT l ) comparison in RAND5 × 5 application mapping concerning density and RAND5 × 5 application mapping not concerning density

Fig. 12 Mapping for RAND6 × 6

(a) Delay comparison in RAND6 × 6 application mapping concerning density and RAND6 × 6 application mapping not concerning density,
(b) Energy comparison in RAND6 × 6 application mapping concerning density and RAND6 × 6 application mapping not concerning density,
(c) Cost (Cost = 1/ 0.5NEc + 1 − 0.5 NT l ) comparison in RAND6 × 6 application mapping concerning density and RAND6 × 6 application mapping not concerning density

5 Conclusion convergence of the population and get better mapping performance

in the different fitness function.
In this paper, we define and analyse the isomorphism of NoC As future work, to develop our algorithm, we will study more
mapping. Based on the analysis, we propose a transform algorithm topologies like ‘torus’, ‘butterfly’ etc. and develop our DDTA with
called DDTA which is used to eliminate the isomorphism of other heuristic algorithms.
mapping sequence. To validate this approach, we propose a GA
called DDGMAP, which is based on DDTA. We test our algorithm
from different views. The experiment results show that compared 6 Acknowledgment
to a GA, in most situations, our algorithm can accelerate the This work was supported by the National Natural Science
Foundation of China (grant no. 61172030)
IET Comput. Digit. Tech., 2020, Vol. 14 Iss. 6, pp. 272-280 279
© The Institution of Engineering and Technology 2020
Fig. 13 Mapping for VOPD with different rand seeds
(a) Delay comparison with different rand seeds in VOPD application mapping concerning density and VOPD application mapping not concerning density,
(b) Energy comparison with different rand seeds in VOPD application mapping concerning density and VOPD application mapping not concerning density,
(c) Cost (Cost = 1/ 0.5NEc + 1 − 0.5 NT l ) comparison with different rand seeds in VOPD application mapping concerning density and VOPD application mapping not concerning
density

7 References [14] Xu, C., Liu, Y., Li, P., et al.: ‘Unified multi-objective mapping for network-
on-chip using genetic-based hyper-heuristic algorithms’, IET Comput. Digit.
[1] International Roadmap for Devices and Systems, System and Architectures Tech., 2018, 12, pp. 158–166
(IRDS™) 2017 Edition. Available at https://irds.ieee.org/editions/2017 [15] Bhardwaj, K., Mane, P.S.: ‘C3map and ARPSO based mapping algorithms for
[2] Patterson, D.A.: ‘Computer organization and design MIPS edition: the energy-efficient regular 3-D NoC architectures’. 2014 Int. Symp. on VLSI
hardware/software interface’ (Morgan Kaufmann: CD Included, USA., 2013, Design, Automation and Test (VLSI-DAT), Hsinchu, China, 2014, pp. 1–4
5th edn.) [16] Morgan, A.A., Elmiligi, H., El-Kharashi, M.W., et al.: ‘Multi-objective
[3] Dally, W.J., Towles, B.: ‘Route packets, not wires: on-chip interconnection optimization for networks-on-chip architectures using genetic algorithms’.
networks’. Proc. of the 38th Design Automation Conf. (IEEE Cat. Proc. of 2010 IEEE Int. Symp. on Circuits and Systems, Paris, France, 2010,
No.01CH37232), Las Vegas, NV, USA., 2001, pp. 684–689 pp. 3725–3728
[4] Benini, L., Micheli, G.D.: ‘Networks on chips: a new SoC paradigm’, [17] Ying, H., Heid, K., Hollstein, T., et al.: ‘A genetic algorithm based
Computer, 2002, 35, pp. 70–78 optimization method for low vertical link density 3-dimensional networks-on-
[5] Tsai, W.-C., Lan, Y.-C., Hu, Y.-H., et al.: ‘Networks on chips: structure and chip many core systems’. NORCHIP 2012, Copenhagen, Denmark, 2012, pp.
design methodologies’, J. Electr. Comput. Eng., 2012, 2012, pp. 2–2 1–4
[6] Khan, S., Anjum, S., Gulzari, U.A., et al.: ‘Bandwidth-constrained multi- [18] Kullu, P., Tosun, S.: ‘MARM-GA: mapping applications to reconfigurable
objective segmented brute-force algorithm for efficient mapping of embedded mesh using genetic algorithm’. 2019 22nd Euromicro Conf. on Digital System
applications on NoC architecture’, IEEE Access, 2018, 6, pp. 11242–11254 Design (DSD), Kallithea, Greece, 2019, pp. 13–18
[7] Zhong, L., Sheng, J., Jing, M., et al.: ‘An optimized mapping algorithm based [19] Gebali, F.: ‘Computer communication networks analysis and design’
on simulated annealing for regular NoC architecture’. 2011 9th IEEE Int. (Northstar Digital Design Inc, Canada, 2002)
Conf. on ASIC, Xiamen, China, 2011, pp. 389–392 [20] Ye, T.T., Benini, L., Micheli, G.D.: ‘Analysis of power consumption on
[8] Shen, W., Chao, C., Lien, Y., et al.: ‘A new binomial mapping and switch fabrics in network routers’. Proc. 2002 Design Automation Conf.
optimization algorithm for reduced-complexity mesh-based on-chip network’. (IEEE Cat. No.02CH37324), New Orleans, LA, USA., 2002, pp. 524–529
First Int. Symp. on Networks-on-Chip (NOCS'07), Princeton, NJ, USA., [21] Wu, C., Deng, C., Liu, L., et al.: ‘An efficient application mapping approach
2007, pp. 317–322 for the co-optimization of reliability, energy, and performance in
[9] Majd, A., Sahebi, G., Daneshtalab, M., et al.: ‘Hierarchal placement of smart reconfigurable NoC architectures’, IEEE Trans. Comput.-Aided Des. Integr.
mobile access points in wireless sensor networks using fog computing’. 2017 Circuits Syst., 2015, 34, pp. 1264–1277
25th Euromicro Int. Conf. on Parallel, St. Petersburg, Russia, 2017 [22] Elmiligi, H., Morgan, A.A., El-Kharashi, M.W., et al.: ‘A delay-aware
[10] Murali, S., Micheli, G.D.: ‘Bandwidth-constrained mapping of cores onto topology-based design for networks-on-chip applications’. 2009 4th Int.
NoC architectures’. Proc. Design, Automation and Test in Europe Conf. and Design and Test Workshop (IDT), Riyadh, Saudi Arabia, 2009, pp. 1–5
Exhibition, Paris, France, 2004, vol. 2, pp. 896–901 [23] Yan, J., Wu, X.: ‘A genetic based hyper-heuristic algorithm for the job shop
[11] Tang, L., Kumar, S.: ‘A two-step genetic algorithm for mapping task graphs scheduling problem’. 2015 7th Int. Conf. on Intelligent Human-Machine
to a network on chip architecture’. Euromicro Symp. on Digital System Systems and Cybernetics, Hangzhou, China, 2015, pp. 161–164
Design, 2003. Proc., Belek-Antalya, Turkey, 2003, pp. 180–187 [24] Qingqi, Z., Yanling, Q., Yue, L., et al.: ‘Multi-objective mapping for network-
[12] Upadhyay, M., Shah, M., Bhanu, P.V., et al.: ‘Multi-application based on-chip based on bio-inspired optimization algorithms’. 2014 Prognostics and
network-on-chip design for mesh-of-tree topology using global mapping and System Health Management Conf. (PHM-2014 Hunan), Zhangiiaijie, China,
reconfigurable architecture’. 2019 32nd Int. Conf. on VLSI Design and 2019 2014, pp. 387–390
18th Int. Conf. on Embedded Systems (VLSID), Delhi, NCR, India, 2019, pp. [25] Forrest: ‘Genetic algorithms: principles of natural selection applied to
527–528 computation’, Science, 1993, 261, pp. 872–878
[13] Hsin, H., Chang, E., Su, K., et al.: ‘Ant colony optimization-based adaptive
network-on-chip routing framework using network information region’, IEEE
Trans. Comput., 2015, 64, pp. 2119–2131

280 IET Comput. Digit. Tech., 2020, Vol. 14 Iss. 6, pp. 272-280
© The Institution of Engineering and Technology 2020