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MIC 4 Marks

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0% found this document useful (0 votes)
28 views7 pages

MIC 4 Marks

Uploaded by

rms744746
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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CHAPTER 1 Advantages of pipelining:

Draw functional block diagram of 8086 microprocessor 1) The execution unit always reads the
3) It allows memory addressing
capability to be 1 MB. 1
next instruction byte from the queue 4) It gives separate space for Data,
in BIU. This is faster than sending out Code, Stack and Additional Data
an address to the memory and segment as Extra segment size.
waiting for the next instruction byte 5) The addresses of the segment may
to come. be assigned as 0000H to F000H
2) More efficient use of processor. respectively.
3) Quicker time of execution of large 6) The offset values are from 00000H
number of instruction. to FFFFFH
4) In short pipelining eliminates the 7) Segmentation is used to increase
waiting time of EU and speeds up the execution speed of computer
the processing. -The 8086 BIU will system so that processor can able to
not initiate a fetch unless and until fetch and execute the data from
there are two empty bytes in its memory easily and fast.
queue. 8086 BIU normally obtains
two instruction bytes per fetch.
Explain memory segmentation in 8086
and list its advantages.
Memory Segmentation:
1) In 8086 available memory space is
1MByte.
Explain the concept of pipelining in 8086. State the 2) This memory is divided into
advantages of pipelining. different logical segments and each
OR segment has its own base address
What is pipelining? How it improves the processing and size of 64 KB.
speed 3) It can be addressed by one of the
Pipelining: segment registers.
1) The process of fetching the next instruction when 4) There are four segments
the present instruction is being executed is called Advantages of Segmentation:
as pipelining. 1) The size of address bus of 8086 is 20
2) Pipelining has become possible due to the use of and is able to address 1 Mbytes () of
queue. physical memory.
3) BJU (Bus Interfacing Unit) fills in the queue until 2) The complete 1 Mbytes memory can
4) BIU restarts filling in the queue when at least two be divided into 16 segments, each of
locations of queue are vacant. 64 Kbytes size.
Draw flag register of 8086 and
explain any four flags
Conditional/Status Flags-
1) C-Carry Flag: It is set when
Describe mechanism for generation of physical address in
8086 with suitable example. 2
carry/borrow is generated out of MSB As all registers in 8086 are of 16 bit and the physical address
of result. (Le D7 bit for 8-bit operation, will be in 20 bits. For this reason the above mechanism is
D15 bit for a 16 bit operation). helpful.
2) P-Parity Flag This flag is set to 1 if the Logical Address is specified as segment: offset
lower byte of the result contains even Physical address is obtained I by shifting the segment
number of 1's otherwise it is reset. address adding the offset address. 4 bits to the left and
3) AC-Auxiliary Carty Flag This is set if a Thus the physical address of the logical address A4FB:4872
carry is generated out of the lower is :
nibble, (Le. From D3 to D4 bit) to the A4FB0
+
higher nibble 4872
4) Z-Zero Flag This flag is set if the result A9822
is zero after performing ALU Draw flag register of 8086 and explain any four flags
operations. Otherwise it is reset.
Memory Segmentation: The memory in 8086 based system is
5) S-Sign Flag This flag is set if the MSB of
organized as segmented memory. 8086 can access 1Mbyte
the result is equal to 1 after
memory which is divided into number of logical segments.
performing ALU operation, otherwise
Each segment is 64KB in size and addressed by one of the
it is reset.
segment register. The 4 segment register in BIU hold the 16-
6) 0-Overflow Flag This flag is set if an
bit starting address of 4 segments. CS holds program
overflow occurs, ie. if the result of a
instruction code. Stack segment stores interrupt &
signed operation is large enough to be
subroutine address. Data segment stores data for program.
accommodated in destination register.
Extra segment is used for string data.
Control Flags T-
The number of address lines in 8086 is 20, 8086 BIU will send
1) Trap Flag If this flag is set, the
20bit address, so as to access one of the 1MB
processor enters the single step
memory locations.
execution mode
• The four segment registers actually contain the upper 16
2) 1-Interrupt Flag it is used to
bits of the starting addresses of the four memory
mask(disable) or unmask(enable) the
segments of 64 KB each with which the 8086 is working at
INTR interrupt. When this flag is
that instant of time
set,8086 recognizes interrupt INTR.
• A segment is a logical unit of memory that may be up to
When it is reset INTR is masked.
64 kilobytes. Starting address will always be changing. It
3) -Direction Flag It selects either
will not be fixed.
increment or decrement mode for Di
Note that the 8086 does not work the whole 1MB memory
&/or Sl register during string
at any given time. However, it works only with four 64KB
instructions
segments within the whole 1MB memory
CHAPTER 2 Explain any two assembler directives of
Describe the directives used 8086.
CHAPTER 3
Write classification of instruction set of 8086. Explain any one
3
to define the procedure with OR type out of them.
suitable example. Describe any four assembler directives
with suitable example. Classification of instruction set of 8086:
Directives used for 1) Data Transfer Instructions
procedure: PROC directive: 1) DB-The DB directive is used to 2) Arithmetic Instructions
The PROC directive is used to declare a BYTE-2-BYTE variable - A 3) Bit Manipulation Instructions
identify the start of a BYTE is made up of 8 bits. 4) String Instructions
procedure. The PROC Declaration examples: 5) Program Execution Transfer Instructions (Branch & Loop
directive follows a name Byte1 DB 10h structions)
given to the procedure. After Byte2 DB 255; 0FFh, the max. possible 6) Processor Control Instructions
that the term FAR and NEAR for a BYTE CRLF DB 0Dh, 0Ah, 24h; 7) Iteration Control Instructions
is used to specify the type of Carriage Return, terminator BYTE 8) Interrupt Instructions
the procedure. ENDP 2) DW-The DW directive is used to 1. Arithmetic Instructions:
Directive: This directive is declare a WORD type variable - A These instructions are used to multiplication, division, etc.
used along with the name of WORD occupies 16 bits or (2 BYTE). perform arithmetic operations slike addition, subtraction,
the procedure to indicate Declaration examples: Word DW 1234h ADD:
the end of a procedure to Word2 DW 65535; 0FFFFh, (the max. The add instruction adds the contents of the source operand to
the assembler. The PROC possible for a WORD) the destination operand.
and ENDP directive are used 3) DD-The DD directive is used to Eg. ADD AX, 0100H
in procedure. declare a DWORD-A DWORD double ADD AX, BX
Example: word is made up of 32 bits =2 ADD AX, [SI]
Word's or 4 BYTE. ADD AX, [5000H]
Declaration examples: ADD [5000H), 0100H
Dword1 DW 12345678h ADD 0100H
Dword2 DW 4294967295;0FFFFFFFFh ADC: Add with Carry
4) SEGMENT: It is used to indicate the This instruction performs the same operation as ADD instruction,
start of a logical segment. It is the but adds the carry flag to the result
name given to the segment. Eg. ADC 0100H
Example: the code segment is used ADC AX, BX
to indicate to the assembler the ADC AX, [SI]
start of logical segment ADC AX, [5000]
ADC [5000], 0100H
SUB: Subtract
INC: Increment This instruction
Explain logical instructions of 8086.
Logical instructions:
4) XOR-Logical Exclusive OR
Syntax: XOR destination, source 4
increases the contents of the 1) AND- Logical AND Operation: Destination XOR source
specified Register or memory Syntax: AND destination, source Flags Affected:CF=0,OF=0,PF,SF,ZF
location by 1. Immediate data Operation: This instruction exclusive, OR's each bit in a source byte or word
cannot be operand of this Destination AND source with the same number bit in a destination byte or word..
instruction. Flags Affected: CF=0,OF=0,PF,SF,2F Describe DAS instruction with suitable example.
Eg. SUB AX, 0100H This instruction AND's each bit in a
SUB AX, BX DAS: Decimal Adjust after Subtraction: - This instruction
source byte or word with the same converts the result of the subtraction operation of 2 packed BCD
SUB AX, [5000H) number bit in a destination byte or
SUB [5000H), 0100H numbers to a valid BCD number. The subtraction operation has
word. The result is put in destination. to be only in the AL. If the lower nibble of AL is higher than the
SBB: Subtract with Borrow Example: AND AX, BX
The subtract with borrow value 9, this instruction will subtract 06 from the lower nibble of
2) OR-Logical OR the AL. If the output of the subtraction operation sets the carry
instruction subtracts the source Syntax: OR destination, source
operand and the borrow flag flag or if the upper nibble is higher than value 9, it subtracts 60H
Operation: from the AL. This instruction modifies the CF, AF, PF, SF, and ZF
(CF) which may reflect the Destination OR source
result of the previous flags. The OF is not defined after DAS instruction. The instance is
Flags Affected: CF=0,OF=0,PF,SF,ZF following:
calculations, from the This instruction OR's each bit in a
destination operand source byte or word with the
Eg. SBB AX, 0100H corresponding destination byte
SBB AX, BX responding bit in a or word. The result
SBB AX, [5000H] is put in a specified destination.
SBB [5000H], 0100H Example:
INC: Increment This instruction 3) NOT-Logical Invert
increases the contents of the Syntax: NOT destination
specified Register or memory Operation: Destination NOT
location by 1. Immediate data destination
cannot be operand of this Flags Affected: None
instruction. The NOT instruction inverts each bit of
Eg. INC AX the byte or words at the specified
INC [BX] destination.
INC [5000H] Example:
CHAPTER 4
NOT BL ONLY PROGRAM IN PROGRAM PART
BL = 0000 0011
NOT BL gives 1111 1100
CHAPTER 5
Compare Procedure and Macros.
It is also called It is also called
Far procedure Near
Reentrant Procedure:
A reentrant procedure is one in which a single copy of the 5
program code can be shared by multiple users during the same
call procedure call. period of time. Re-entrance has two key aspects: The program
Procedures are Procedures are
used for large used for small A far A near code cannot modify itself and the local data for each user must
group of group of procedure procedure be stored separately
instructions to instructions to refers to a refers to a
be repeated be repeated procedure procedure
which is in the which is in the
Object code is Object code is
different code same code
generated only generated
segment from segment from
once in every time the
that of the call that of the call
memory. macro is
instruction instruction
called.
This procedure This procedure
CALL & RET Macro can be Recursive procedures:
call replaces call replaces
instructions called just by An active procedure that is invoked from within itself or from
the old CS:IP the old IP with
are used to writing its within another active procedure is a recursive procedure. Such an
pairs with new new IP
call procedure name. invocation is called recursion. A procedure that is invoked
CS:IP pairs
and return recursively must have the RECURSIVE attribute specified in the
from More stack Less stack PROCEDURE statement.
procedure. locations are r locations are r
equired equired
Length of the Object file
object file is becomes With neat sketches demonstrate
less lengthy. the use of re-entrant and recursive
procedure.
Directives MACRO and
Or
PROC & ENDP ENDM are
Describe re-entrant and recursive
are used for used
procedure with schematic
defining proce for defining M
diagram.
dure ACRO

Give the difference between


intersegment and
intersegment CALL.
Write ALP using procedure to solve Write an ALP for addition of series of
equation such as Z= (A+B)*(C+D). 8-bit numbers using procedure
Write an ALP to
subtract two BCD
Write ALP using macro to perform
multiplication of two 8 Bit Unsigned 6
: Procedure For Addition number using numbers.
DATA SEGMENT
SUM PROC NEAR procedure. Macro For Multiplication
NUM1 DB 10H,20H,30H, 40H,50H
ADD AL,BL RESULT DB OH .model small PRODUCT MACRO FIRST, SECOND
RET CARRY DB OH . Data MOV AL FIRST
SUM ENDP DATA ENDS num1 db 13h MOV BL SECOND
DATA SEGMENT CODE SEGMENT num2 db 12h MUL BL
NUM1 DB 10H ASSUME CS:CODE, DS:DATA Ends PRODUCT ENDM
NUM2 DB 20H START: .code DATA SEGMENT
NUM3 DB 30H MOV DX,DATA start: NOI DB 05H
NUM4 DB 40H MOV DS, DX mov ax,@data NO2 DB 04H
RESULT DB? MOV CL,05H mov ds,ax MULTIPLE DW?
DATA ENDS MOV SI, OFFSET NUM1 call sub1 DATA ENDS
CODE SEGMENT UP: CALL SUM sub1 proc near CODE SEGMENT
ASSUME CS: CODE,DS:DATA INC SI mov al,num1 ASSUME CS: CODE,DS:DATA
START:MOV AX,DATA LOOP UP mov bl,num2 START:MOV AX, DATA
MOV DS,AX MOV AH,4CH sub al,bl MOV DS,AX
MOV AL,NUM1 INT 21H Das PRODUCT NO1,NO2
MOV BL,NUM2 SUM PROC Procedure to add two 8 bit sub1 endp MOV MULTIPLE, AX
CALL SUM numbers mov ah,4ch MOV AH,4CH
MOV CLAL int 21h INT 21H
MOV AL, NUM3 MOV AL, [SI] Ends CODE ENDS
MOV BL,NUM4 ADD RESULT, AL end start END
CALL SUM JNC NEXT end
MUL CL INC CARRY
MOV RESULT, AX NEXT: RET
MOV AH,4CH SUM ENDP
INT 21H CODE ENDS
CODE ENDS END START
END
Write an assembly language
program to solve p= x²+y² using
Write a MACRO to perform 32 bit by
16 bit division of unsigned numbers. 7
Macro (x and yare 8 bit numbers).
model small
MODEL SMALL Div1 macro no1,no2
PROG MACRO a,b mov ax,no1
MOV al,a MUL al div no2
MOV bl,al Endm
MOV al,b Data
MUL al num1 dw 12346666h
ADD al,bl num2 dw222h
ENDM .code
DATA mov ax,@data
x DB 02H mov ds,ax
y DB 03H div1 num1, num2
p DB DUPO Ends
CODE end
START:
MOV ax,data
MOV ds,ax
PROG x, y
MOV p,al
MOV ah,4Ch
Int 21H
END

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