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Assignment 04

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9 views

Assignment 04

Uploaded by

Yeabisra
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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ECEG 1551 INDIVIDUAL ASSIGNMENT 4

1. Design a logic circuit that has three inputs and whose output is high whenever
two or more of the three inputs are low.
a. Construct a 3-input truth table that meets the criteria given.

b. Use the Karnaugh Map technique to find the reduced sum-of-


product (SOP) expression.

c. Draw the logic circuit for the reduced SOP expression.

2. Determine the output expression for the circuit shown in Figure 1 and with the
aid of DeMorgan's theorem, simplify the expression.

Figure: 1

3. Propose how the following logic function can be implemented by using only
NOR gates. Repeat the implementation of the logic function by using only
NAND gates.
X = ABC

4. Given, F = ABC’D + AC + BC’D’ + B’C + A’C’D’ + A’B’C’D, Simplify the


function above using a Karnaugh Map and Construct the logic circuit.

5. An assembly line has THREE (3) failsafe sensors (S1, S2 and S3) and ONE
(1) emergency shutdown switch, Q. The line should keep moving unless any
of the following conditions arise, and an alarm should be triggered:

✓ lf Q is pressed.
ECEG 1551 1
✓ lf S1 and S2 are activated at the same time.

✓ lf S2 and S3 are activated at the same time.

✓ lf all three sensors, S1, S2, S3, are activated at the same time.

(Assume: sensor activated = logic 1, Line shutdown with Q = logic 1)

a. Derive the truth table for this system.

b. Design a minimum network for this system using Karnaugh Map


techniques.

c. Implement the circuit using only NAND and NOR gates.

ECEG 1551 2

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