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Vlsi and Chip Design 2marks

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43 views2 pages

Vlsi and Chip Design 2marks

Uploaded by

Dinesh A
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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VLSI AND CHIP DESIGN

Two Marks

Unit-1
1. How does MOSFET act as a switch?
2. Realize the 2:1 multiplexer using transmission gates.
3. What is threshold voltage of MOS transistor?
4. Show how nMOSFET acts as a switch?
5. Draw the stick diagram of a 3-input NAND gate.
6. Sketch the RC equivalent circuit of a CMOS inverter.
7. Sketch a complementary CMOS gate computing W=(XY+YZ)'
8. Write the expression for parasitic delay & logical effort of an N-input NAND gate.
9. Draw a 2-input CMOS NOR gate.
10. By what factor Ros should be scaled, if constant electric field scaling is employed?

Unit-2
1. Draw the stick diagram for 2-input NAND gate.
2. What are the disadvantages of pass transistor logic?
3. What is stick diagram? Draw the stick diagram for two input NAND gate.
4. Realize the two input NAND gate using pass transistor logic.
5. Obtain the logical efforts of footed and unfooted domino buffers.
6. What are the sources for gate leakage current in CMOS circuits?
7. What is the use of transmission gates?
8. List the sources of power dissipation in CMOS circuits.
9. Using transmission gate draw a 4:1 MUX.
10. What is charge sharing in dynamic CMOS logic?

Unit-3
1. Differentiate latches and registers.
2. What are the timing classification of digital system?
3. What is clock skew? How to overcome clock skew?
4. State the applications of sense amplifier circuits.
5. Compare the data path for computation of log(a+b) in pipelined and non- pipelined
design.
6. What is meant by bistability?
7. Define clock-skew and clock-jitter.
8. State the use of Schmitt Trigger.
9. Draw a MUX based negative level sensitive D-latch.
Unit-4
1. List the various interconnect parameters analyzed in VLSI chip design.
2. What is the significance of FPGA?
3. Find the propagation delay of n-bit carry select adder
4. Write the logic equation for the 3-bit magnitude comparator.
5. Draw the circuit schematic of a mirror adder circuit and mention its significance.
6. Sketch the block diagram of a 4 x 4 multiplier and highlight one possible critical path.
7. Draw the circuit diagram of 1-bit binary shifter using MOS transistor.
8. State the need of sense amplifier in a memory cell.
9. Compare SRAM and DRAM.
10. Draw a 1-transistor DRAM cell.

Unit-5
1. Differentiate FPGA design and ASIC design flow.
2. Write the test bench in Verilog HDL to test the D-flip flop.
3. List the issues in testing microchip design process.
4. What are the different types of ASICs?
5. How is IDDQ testing performed?
6. List the building blocks of FPGA.
7. What is the significance of field programmable gate arrays?
8. What are limitations of IDDQ testing?
9. Define controllability and observability.
10. Mention the advantages of BIST.

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