Selector and descriptor

tables

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Selector and Descriptor tables

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• There are two major categories of descriptor table in a 80386 system:-
1.Global
2.Local
• The GDT is a general purpose table of descriptors, can be used by all programs to reference
segments of memory. Whereas a LDT are set up in the system for individual task or closely related
group of tasks.
• Table Indicator (TI) bit in the selector decides which descriptor table should be referred by the
selector. When TI bit is 0, the index portion of the selector refers to a descriptor in the GDT. When
TI bit is 1, it refers to descriptor in the current LDT.
• The above figure shows that the first entry in the GDT is reserved by the processor and should be
all zeroes. This is known as NULL descriptor.
• The processor does not cause an exception when a segment register(other than CS and SS ) is
loaded with a null selector. However, it will cause an exception when the segment register is used
to access memory. This feature is useful for initializing unused segment registers so as to trap
accidental references.

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 Segment Descriptor
• In protected mode, Memory management Unit (MMU) uses the
segment selector to access a descriptor for the desired segment in a
table of descriptors in memory.
• Segment descriptor is a special structure which describes the
segment. Exactly one segment descriptor must be defined for each
segment of the memory.
• Descriptors are 8 type quantities which contain attributes about a
given region of linear address space(i.e a segment). These attributes
include the 32 bit base linear address of the segment, the 20 bit
length and granularity of the segment, the protection level read, write
or execute privileges, the default size of the operands(16 or 32 bit),
and the type of segment.
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 General format of Descriptor
• The following figure shows the general format of a descriptor and also
it defines the various fields of the segment descriptor.

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• Base:- It contains the 32 bit base address for a segment. Thus defines
the location of the segment within the 4 gigabyte linear address
space. The 80386 concatenates the three fragments of the base
address to form a single 32 bit address.
• Limit:- it defines the size of the segment. The 80386 concatenates the
two fragments of the limit field to form a 20 bit value. The 80386
interprets this 20 bit value in two ways, depending on the setting of
the granularity bit(G):
If G bit 0:- In units of one byte, to define a limit of up to 1 M byte (220)
If G bit 1:- In units of 4 kilobytes, to define a limit of up to 4 gigabytes.

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• 0 (Reserved by Intel):- It neither can be defined nor can be used by user. This bit must be zero for
compatibility with future processors.
• AVL/U (User Bit):- This bit is completely undefined, and 80386 ignores it. This is available field/bit
for user or operating system. Access Rights Byte:
• P (Present Bit):- The present P bit is 1 if the segment is loaded in the physical memory, if P = 0
then any attempt to access this segment causes a not present exception (exception 11).
• DPL (Descriptor Privilege Level):- It is a 2-bit field defines the level of privilege associated with
the memory space that the descriptor defines- DPL0 is the most privileged whereas DPL3 is the
least privileged.
• S (System Bit):- The segment S bit in the segment descriptor determines if a given segment is a
system segment or a code or a data segment. If the S bit is I then the segment is either a code or
data segment, if it is 0 then the segment is system segment.
• Type:- This specifies the specific descriptors among various kinds of descriptors. (Detail
explanation is given in the following sections).
• A (Accessed Bit):- The 80386 automatically sets this bit when a selector for the descriptor is
loaded into a segment register. This means that 80386 sets accessed bit whenever a memory
reference is made by accessing the segment.

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Descriptor Tables- GDT, IDT and LDT
• As mentioned earlier, segment descriptors are grouped and placed
one after the other in contiguous memory locations. This group
arrangement is known as a descriptor table.
• The maximum limit for the length of descriptor table is 64 kbytes and.
we know that each descriptor takes 8 bytes to store the information
of a particular segment.
• So descriptor table can have as many as 8192 descriptors. The upper
13 bits of a selector are used as an index into the descriptor table.

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• There are three types of descriptor tables:-
1. The Global Descriptor Table (GDT):- It is a general purpose table of
descriptors, can be used by all programs to reference segments of
memory. The GDT can have any type of segment descriptor except
for descriptor which are used for serving interrupts.
2. The Interrupt Descriptor Table (IDT):- It holds the segment
descriptors that define interrupt or exception handling routines.
The IDT is a direct replacement for the interrupt vector table used
in 8086 system.
3. A Local Descriptor Table (LDT):- They are set up in the system for
individual task or closely related group of tasks.

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• The following figure shows how tasks use its individual memory area defined by the descriptors
from the corresponding local descriptors table and how it shares the memory area defined by the
descriptors from the GDT.
• As we know, the descriptors are stored in the descriptor tables. But it is important to know that
where these tables are stored? It is possible to place descriptor tables anywhere in the
processor’s address space and it is not necessary to keep them together.

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Descriptor Registers:- GDTR, LDTR and IDTR
• Each of the tables has a register associated with it the GDTR, the LDTR
and the IDTR.
• Each of these register contains the 32 bit linear address of the base of
its descriptor table and the table’s limit. The base address of a
descriptor table is the linear address of the first byte of the first
descriptor in the table. The limit specifies how long the table is and
therefore how many descriptors it has.

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 Global Descriptor Table Register(GDTR).
• The following figure shows how the contents of the global descriptor
table register are used to define a GDT in the 80386DX physical
memory address space. GDTR is a 48 bit register located inside the
80386DX.

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• The lower two bytes of this register specifies the LIMIT, (in bytes) for
the GDT. The value of limit is one less than the actual size of the table.
• For example, if LIMIT is 03FFH then the table is 1024(1023 + 1) bytes
in length (03FFH = 102310). Since the LIMIT field is 16 bit long, the
GDT can grow up to 65,536 bytes long.
• The upper four bytes of GDTR specifies the 32 bit linear address of
the base of the GDT.

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Interrupt Descriptor Table Register (IDTR)
• Like the GDTR, the IDTR holds the 16 bit limit and 32 bit linear address of the
base of the IDT.
• The following figure shows how the contents of the interrupt descriptor table
register are used to define a IDT in the 80386DX physical memory address space.

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• Like GDTR, the IDTR is also 48 bit in length, with lower two bytes
defines Limits and upper 4 bytes defines the base address.
• Since limit field is two bytes, the IDT can also be up to 65,536 bytes
long. But the 80386DX only supports upto 256 interrupts or
exceptions; therefore, the size of the IDT should not be set to support
more than 256 interrupts.

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Local Descriptor Table Register (LDTR)
• Unlike GDTR and IDTR, the LDTR is a 16 bit register. It does not specify any limit or
base address for the segment but it specifies the address of the LDT descriptor
stored in the GDT.
• The following figure shows LDTR, GDT, LDT.
• It shows how contents of LDTR are used indirectly to define a Local Descriptor
Table. LDTR holds a selector that points to an LDT descriptor in the GDT.
Whenever a selector is loaded into the LDTR, the corresponding descriptor is
located in the global descriptor table.
• The contents of this descriptor defines the local descriptor table. The 32 bit base
value defines starting point of the table in the 80386DX physical memory address
space and 16 bit limit specifies the size of the table.

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PCCoE, Department of Computer Engineering
• The GDT can contain many LDT descriptors. To put particular LDT in
service, it is necessary to load the LDTR with corresponding selector.
• For loading the values in GDTR, IDTR and LDTR registers, 80386DX
provides LGDT,LLDT and LIDT instructions. It also provides SGDT, SLDT,
SIDT instructions. These 48 bits instructions copy the contents of the
descriptor table registers into the six bytes of memory pointed by the
destination operand.
• These tables are manipulated by the operating system. Thus, the
instructions used for loading the descriptor tables are privileged
instructions.

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