Pimpri Chinchwad Education Trust’s

Pimpri Chinchwad College of Engineering

An Autonomous Institute
(Permanently affiliated to Savitribai Phule Pune University)

Microprocessor Architecture Question Bank

Department: Computer Engineering AY: 2024-25 Semester: III

Class : SY B Tech
Course Name & Code: Microprocessor Architecture (BCE23PC03)

Unit-1
1. Write features of 80386.
2. Explain memory organization in 80386.
3. With the help of a block diagram, explain the basic architecture of the 80386
processor and explain each block in detail.
4. What is the necessity of prefetch queue
5. How does CS, SS, DS, ES differ from real mode functionally?
6. Explain the flags of 80386 processors and also describe the significance of each bit.
7. What is the use of the interrupt flag?
8. Explain the different operating modes of 80386.
9. Write a short note on virtual 8086 mode.
10. Comparison of real mode or virtual mode of 80386 and actual 8086.
11. Write difference between real and protected mode of 80386 with respect to memory
segmentation.
12. Explain the various data types supported by 80386.
13. With examples explain the different addressing modes of the 80386 processor.
14. Explain register addressing mode with an example.
15. Explain the addressing mode of 80386 showing physical address generation with
example: Direct.
16. Explain the addressing mode of 80386 showing physical address generation with
example: Scaled indexed with displacement.
17. Explain the addressing mode of 80386 showing physical address generation with
example: Register indirect.
18. What is BIU in 80386 processor
19. Explain the addressing mode of 80386 showing physical address generation with
example: Based indexed.
20. Obtain effective address for different addressing modes with the contents of registers
as given below: offset =1000, [AH]=5000H, [BX]= 2000H, [SI]=3000H,
[DS]=7000H, [BP]=5000H, [DI]=4000H, [BP]=6000H.
Unit-2
1. How is the instruction set of 80386 classified?
2. List different types of data movement instructions.
3. List and explain general purpose data transfer instruction. Give one example of each.
4. List and explain stack manipulation instructions.
5. List and explain type conversion instructions.
6. What is the use of following instructions in 80386? Mention which flag gets affected
with each instruction: ADC and DAA
7. List and explain Boolean instructions with suitable examples.
8. Enlist bit tests and modify instructions. Explain in detail with suitable examples.
9. Write a short note on String and character transfer instructions.
10. Explain rotate instructions in detail.
11. List and explain iteration control instructions of 80386DX microprocessor.
12. Compare procedure and macro in assembly language programming.
13. What is the difference between DIV and IDIV instruction.
14. Explain the SHL instruction with an example.
15. Explain carry and direction flag control instructions.
16. Explain binary arithmetic instructions of the 80386 processor.
17. Explain decimal arithmetic instructions of the 80386 processor.
18. Explain the logical instructions of 80386.
19. Explain the control transfer instructions unconditional / conditional of 80386.
20. Explain the flag control and transfer instructions.
Unit-3
1. List memory management registers.
2. Explain all control registers (CR0 to CR3) of 80386DX.
3. Explain the test registers of 80386 processors with their formats.
4. Enlist system instructions.
5. Draw and explain the debug register of the 80386 processor.
6. Give the significance of EM and MP.
7. Explain the process by which 80386 translates a logical address into a physical
address into protected mode.
8. Draw and explain the format of the selector.
9. Explain the concept of GDT,LDT,IDT along with diagram
10. Describe the segment descriptor along with its format. When are they accessed by
80386? What is its use?
11. What is the basic difference between segmentation and paging?
12. Explain any four debugging features of 80386.
13. Give the significance of ET bit.
14. Explain the logical address, physical address and linear address of 80386
microprocessors.
15. Explain paging mechanism.
16. Explain segmentation along with diagram.
17. Explain the concept of GDTR,LDTR,IDTR,TR,MSW along with diagram
18. Explain system instructions along with examples.
19. Explain the concept of combining segment and page translation.
20. Explain the system flags in detail.
Unit -4
1. Describe the purpose of cache memory in a computer system?
2. Explain the concept of cache mapping methods.
3. Compare and contrast direct-mapped cache and fully associative cache.
4. What are the advantages and disadvantages of using a set-associative cache?
5. How do replacement algorithms affect cache performance?
6. Discuss the role of the Least Recently Used (LRU) replacement algorithm in cache
management.
7. What is the importance of fetch and write mechanisms in cache memory?
8. How does write-through cache differ from write-back cache in terms of data
consistency?
9. What factors influence the organization of a cache memory unit in a microprocessor?
10. How does the concept of cache coherence impact the design of a multiprocessor
system?
11. What are the key architectural features of the original Pentium processor?
12. Define multicore processors and explain how they differ from single-core processors.
13. What are the advantages of using multicore processors over traditional single-core
processors?
14. What are the challenges faced by multicore processors in terms of power
consumption?
15. Explain the various replacement algorithms in detail with examples of each.
16. Consider a fully associative cache with 8 lines implementing FIFO and LIFO cache
replacement policy for following block requests. Also calculate hit and miss ratio.
(2,3,4,5,8,9,1,0,3,4,6,1,7,9,1,0,3,4,6,7,8,9)
17. Explain all the cache replacement algorithms.
a. FIFO
b. LRU
c. MRU
d. LFU
e. Random
f. LIFO
g. Optimal
18. Consider a fully associative cache with 8 cache blocks and following memory block
requests.
(4,3,25,8,19,6,34,5,16,2,1,9,0,45,30,22,37,11,10,8,3,7,16,25)