Chapter 2

Instructions: Language of the Computer

Review
Instruction Set
• Add
Computer 1 ISA1
• Multiply
• Divide Instruction Set
• Load Data
Computer 2 ISA2
A manual to instruct he
computer.
Review
The ARMv8 Instruction Set
• A subset, called LEGv8, used as the example throughout the book
• Commercialized by ARM Holdings (www.arm.com)
• Large share of embedded core market
– Applications in consumer electronics, network/storage equipment, cameras,
printers, …
• Typical of many modern ISAs
– See ARM Reference Data tear-out card
Review
Operations of Computer Hardware
1. Has multiple registers, and logic gates to
perform operations. E.g. add
Register (a) 2. Registers contain/store data.
3. Operators (like Add), can only access data in
the registers.
Add
Register (b) … 1. To instruct computer to
1. Add (operation)
2. Values in register b and c (Source Variables)
3. Store the result in a (Destination Variable)
Register (c)
LEGv8 Instruction:
… Computer
Review
Operations of Computer Hardware
1. To instruct computer to
1. Add (operation)
2. Values in register b and c (Source Variables)
Register (a)
Add 3. Store the result in a (Destination Variable)

LEGv8 Instruction:
Register (b) Sub

One operation Has three variables

Register (c) Mul Design Principle 1: Simplicity favors regularity
…
All LEGv8 Arithmetic Instructions perform only
… Computer one operation and always has exactly three
variables

𝑆𝑈𝐵 𝑎, 𝑏, 𝑐 // subtract instrcution (𝑎 = 𝑏 − 𝑐)

𝑀𝑈𝐿 𝑎, 𝑏, 𝑐 // multiply instruction (𝑎 = 𝑏 ∗ 𝑐)
Review
Example - 1

//
//
// e

3 instruction to sum 4 variables

Review
Example - 3

//
//
//

t0, t1: temporary variables created by

the compiler
Review
Example - 3

//
//
//

Variables t0, t1, f, g, h, i, j

Stored in registers
Review
Bits, Bytes, Words, and Double Words
For our course!!!

0 ➔ 1 bit of data
1 ➔ 1 bit of data
Overtime this became a basic unit of data.
10011101 (8 bits) ➔ 1 byte of data Older system represented letters using bytes
As a results most memory hardware

10011101 10010001 10010101 10010101 ➔ 4 bytes is a word

1 byte 2 byte 3 byte 4 byte (32 bits)

10011101 10010001 10010101 … 10010101 ➔ 8 bytes is a Doubleword

1 byte 2 byte 3 byte 7 byte (64 bits)
Review
Operands of the Computer Hardware
• LEGv8 Register size – 64 Bits Data In
1
– Double words 2
3 . 64 bit
.
64 Register
Write enable
Review
Operands of the Computer Hardware
• LEGv8 Register size – 64 Bits 64-Bit
Register (1) Add
• Total of 32 registers (64-bit)
Why only 32??
64-Bit
Register (2) Sub
Design Principle 2: Smaller is faster

1. Having more registers may increase the clock …

cycle time (longer for electronic signals to Mul
travel) 64-Bit
2. Size of instructions (number of bits) is
predefined and same for all instructions. Register (32) Computer
More register requires more bits to specify
registers.
1. 32 registers – require 5 bits max
2. 64 registers may require 6 bits.
Review
Operands of the Computer Hardware
• LEGv8 Register size – 64 Bits 64-Bit
• Total of 32 registers (64-bit) Register (X0) Add
• Register name convention use
X as prefix. 64-Bit
Register (X1) Sub
• Registers are names
– X0 …
– X1 Mul
– … 64-Bit
– X30 Register (X30) Computer
…
– XZR(X31) (Exception, more on
this later…!)
Review
Example – 3 (Again)

X21 //
X23 //
//
Review
Review: Half-Adder with manual input
RAM – Random
access memory
Stored in memory
HDD Data In
1
2
3 . 64 bit Add
.
64 Register
Write enable
Review
Load Operation

Addr_n

Load operation:
Give bits from
Addr_x
Computer
…

Addr_3
Addr_2
Addr_1
Review
Store Operation

Addr_n

Store operation:
Store bits at
Addr_x
Computer
…

Addr_3
Addr_2
Addr_1
Review
Memory Operand, LOAD
Addr_n 𝑎 =𝑏+𝑐
64-Bit
Register (X19)

64-Bit
…

Register (X20) Add

Addr_3 c
Addr_2 b 64-Bit
Register (X21) Computer
Addr_1

RAM
Review
Memory Operand , LOAD
Addr_n 𝑎 =𝑏+𝑐
64-Bit
Register (X19) Load Addr_3 (c) to register X19
Load Addr_2 (b) to register X20
ADD X21, X19, X20
64-Bit
…

Register (X20) For Load:

Add Need to specify the ram memory
Addr_3 c address, and the register to load
Addr_2 b 64-Bit the value into.
Register (X21) Computer
Addr_1 memory address-> also in bits,
and needs to be stored in
RAM another register.
Review
Memory Operand , LOAD
Addr_n 𝑎 =𝑏+𝑐
64-Bit
Register (X19) Load Addr_3 (c) to register X19
Load Addr_2 (b) to register X20
ADD X21, X19, X20
64-Bit
…

Register (X20) Lets assume memory address is

Add stored in X22
Addr_3 c
Addr_2 b 64-Bit
Register (X21) Computer
Addr_1

RAM
Review
Memory Operand , LOAD
Addr_n 𝑎 =𝑏+𝑐
64-Bit
Register (X19) Load Addr_3 (c) to register X19
Load Addr_2 (b) to register X20
ADD X21, X19, X20
64-Bit
…

Register (X20) Lets assume memory address is

Add stored in X22
Addr_3 c
Addr_2 b 64-Bit The LEGv8 instruction to:
Computer Load Addr_2 (a) to register X19
Addr_1 Register (X21)
𝐿𝐷𝑈𝑅 𝑋19, [𝑋22, #𝑐𝑜𝑛𝑠𝑡]
RAM

Destination Ram
register address
Review
Memory Operand , LOAD
Addr_n 𝑎 =𝑏+𝑐
64-Bit
Register (X19) Assuming Addr_3 is store in X22
and Addr_2 is store in X23
Assembly code (LEGv8
64-Bit instruction)
…

Register (X20) Add 𝐿𝐷𝑈𝑅 𝑋19, [𝑋22, #𝟎]

𝐿𝐷𝑈𝑅 𝑋20, 𝑋23, #𝟎
Addr_3 c 𝐴𝐷𝐷 𝑋21, 𝑋19, 𝑋20
Addr_2 b 64-Bit
Register (X21) Computer
Addr_1

RAM
Review
Arrays in RAM
To load , we would have to
Addr_n
1. Arrays are stored in specify where starts in the
contiguous memory memory, the offset (which is 1)
…

Let start from Addr_2 and the destination register

Addr_5 8 (d_register) to load it to.
Addr_4 7
a[0] ➔Addr_2
Addr_3 6 Instruction
Addr_2 5
a[1] ➔ Addr_3
Load d_register, [addr_2, offset(1)]
Addr_1
a[2] ➔Addr_4
a[3] ➔Addr_5
RAM A constant is needed to specify the offset
to load arrays in the LDUR instruction
Review
Bits, Bytes, Words, and Double Words
For our course!!!

0 ➔ 1 bit of data
1 ➔ 1 bit of data
Overtime this became a basic unit of data.
10011101 (8 bits) ➔ 1 byte of data Older system represented letters using bytes
As a results most memory hardware

10011101 10010001 10010101 10010101 ➔ 4 bytes is a word

1 byte 2 byte 3 byte 4 byte (32 bits)

10011101 10010001 10010101 … 10010101 ➔ 8 bytes is a Doubleword

1 byte 2 byte 3 byte 7 byte (64 bits)
Review
RAMS and Byte Addresses
Addr_n 1. Byte is considered a basic unit of data.
2. Most memory hardware store 1 byte of data at each
address.
…

Addr_5 3. Each address is referred to as a byte address, as 8

bits are stores.
Addr_4
Addr_3 10011011
Addr_2 10110011
Addr_1 10010011

RAM
Review
Memory Operand , LOAD
Addr_n
𝑖𝑛𝑡 𝑎 4 = 5, 6, 7, 8 ;
64-Bit
Arrays are store in contiguous
Register (X19)
memory.
…

A[1]=6 So
64-Bit 5 is stored using 64 bits
6 is stored using 64 bits
Addr_10 Register (X20)
Let start address be Addr_2
Let Addr_2 be stored in register X22
What is the LEGv8 instruction to
A[0]=5 load a[0] into register X19?

Addr_2
Addr_1

RAM
Review
Memory Operand , LOAD
Addr_n
𝑖𝑛𝑡 4 = 5, 6, 7, 8 ;
64-Bit
Let start address be Addr_2
Register (X9)
Let Addr_2 be stored in register X22
…

What is the LEGv8 instruction to

64-Bit load a[0] into register X9?
𝐿𝐷𝑈𝑅 𝑋9, 𝑋22, #𝟎
Addr_10 Register (X22)
What is the LEGv8 instruction to
load a[1] into register X9?
𝐿𝐷𝑈𝑅 𝑋9, 𝑋22, #8

What is the LEGv8 instruction to

Addr_2 load a[3] into register X9?
Addr_1 𝐿𝐷𝑈𝑅 𝑋9, 𝑋22, #𝟐𝟒

RAM
3 X 8 = 24
Review
Memory Operand Example
• C code:

– h in X21, base address of A (i.e. A[0]) in X22

• LEGv8 code:

LDUR X9,[X22,#64]
ADD X9,X21,X9
STUR X9,[X22,#96]
 Constant or Immediate Operands
• Using a constant in operation. x=x+4
• More than half of arithmetic
instructions have constant Let X be stored in register X22
(SPEC CPU2006). If X20 is some base register,
and the number 4 is stored in
the memory at location
AddrConst4
 Constant or Immediate Operands
• Using a constant in operation. x = x +4
• More than half of arithmetic
instructions have constant Let X be stored in register X22
(SPEC CPU). If X20 is some base register,
and the number 4 is stored in
the memory at location
AddrConst4

Load 4 into register

Add
 Constant or Immediate Operands
• Using a constant in operation. x = x +4

• More than half of arithmetic Let X be stored in register X22

If X20 is some base register, and the
instructions have constant number 4 is stored in the memory at
location AddrConst4 (offset from X20)
(SPEC CPU2006).
LEGv8 Instructions:
Very common to use constants. 𝐿𝐷𝑈𝑅 𝑋9, [𝑋20, #𝐴𝑑𝑑𝑟𝐶𝑜𝑛𝑠𝑡4]
Too much time to load constants from 𝐴𝐷𝐷 𝑋22, 𝑋22, 𝑋9
memory.
Why not make a version of Add with one
operand fixed to a specific value.
One operand is always 4.
 Constant or Immediate Operands
• Using a constant in operation. x = x +4

• More than half of arithmetic Let X be stored in register X22

If X20 is some base register, and the
instructions have constant number 4 is stored in the memory at
location AddrConst4 (offset from X20)
(SPEC CPU2006).
LEGv8 Instructions:
Very common to use constants. 𝐿𝐷𝑈𝑅 𝑋9, [𝑋20, #𝐴𝑑𝑑𝑟𝐶𝑜𝑛𝑠𝑡4]
Too much time to load constants from 𝐴𝐷𝐷 𝑋22, 𝑋22, 𝑋9
memory.
Why not make a version of Add with one
operand fixed to a specific value. LEGv8 Instructions:
One operand is always 4. 𝑨𝑫𝑫𝑰 𝑋22, 𝑋22, #4
Add immediate