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DSD Question Bank Unit 1

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22 views3 pages

DSD Question Bank Unit 1

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Aishwarya
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BECE102L – DIGITAL SYSTEM DESIGN

QUESTION BANK
UNIT –I
DIGITAL LOGIC
1. Apply De-Morgan’s theorem to simplify A+BC.
2. Define the term prime implicants and Essential prime implicants.
3. Draw the XOR logic using only NAND gates.
4. Implement the following Boolean function with NOR – NOR
logicF = Π(0,2, 4,5,6)
5. Express the switching function f (ABC) = B in terms of minterm.
6. Define minterm & Maxterm. Give examples.
7. Simplify the given Boolean Expression F= x’+xy+xz’+xy’z’.
8. Prove that the logical sum of all minterms of a Boolean function of 2 variables is 1.
9. Show that a positive logic NAND gate is a negative logic NOR gate.
10. If A & B are Boolean variables and if A=1 & A+B=0, Find B?
11. Realize F = A’B+AB’ using minimum universal gates.
12. Write the Boolean expression for the output of the system shown in the figure.

13. Write down fan-in & fan-out of a standard TTL IC.


14. Prove that AB+A’C+BC = AB + A’C
15. Implement the following Boolean function with NAND – NAND
logicF = ∑(0,1, 3, 5)
16. What are don’t care terms?

17. What are universal gates implement AND gate using any one universal gate?
18. Define the term Propagation delay

PART – B
1. a). i). Simplify the following function using K – map, f=ABCD+AB’C’D’+AB’C+AB &
realize the SOP using only NAND gates and POS using only NOR gates (12)
ii). Simplify the logic circuit shown in figure (4)

2. a). i). Minimize the term using Quine McCluskey method & verify the result using K-
map method πM(0,1,4,11,13,15)+ πd(5,7,8).
(1
0)
ii). Explain the operation of 3 input TTL NAND gate with required diagram & truth
table.
(
6)

3. a). i). Using K-map method, Simplify the following Boolean function and obtain
(a) minimal SOP and
(b) minimal POS expression & realize using only NAND and NOR gates
F=∑m(0,2,3,6,7) + d(8,10,11,15) (10)
ii). Draw the circuits of 2 input NAND & 2 input NOR gate using CMOS (6)

4. implement the expression using CMOS logic

5. a).i).Find a minimal SOP representation for f(A,B,C,D,E) = ∑m(1,4,6,10,20,22,24,26) +


d(0,11,16,27) using K-map method. Draw the circuit of the minimal expression using
only NAND. (12)
ii). Obtain 3 level NOR – NOR implementation of f = [ab + cd] ef (4)

6. Minimize the term using Quine McCluskey method & verify the result using K-map
method ΠM(1,4,5,9,12,13,14) · Πd(8,10,11,15). (16)
7. Find a minimal SOP representation for
f(A,B,C,D,E)=∑m(1,4,6,10,20,22,24,26)+d(0,11,16,27) using K-map method. Draw the
circuit of the minimal expression using
only NAND. (16)
8. (i)Given Y (A, B, C, D) = ∏M (0, 1, 3, 5, 6, 7, 10, 14, 15), draw the K-map and obtain the
simplified expression. Realize the minimum expression using basic gates. (8)
(ii) Prove by perfect induction (8)
(i). A+AB = A
(ii) A(A+B) = A
(iii) A+A’B = A+B and
(iv) A(A’+B) =AB
9. (i). Compare & contrast the features of TTL & CMOS logic families. (8)
(ii). List out the basic rules (laws) that are used in Boolean algebra expressions with
example. (8)
10. Simplify using K-map to obtain minimum POS expression (A’+B’+C+D) (A+B’+C+D)
(A+B+C+D’) (A+B+C’+D’) (A’+B+C+D’) (A+B+C’+D). (16)
11. (i). Implement the expression Y (A, B, C) = ∏M (0, 2, 4, 5, 6,) using only NOR-NOR
logic. (8)
(ii). Draw the schematic and explain the operation of a CMOS inverter. Also explain its
characteristics. (8)
12. (i). Express the Boolean function F=XY+X’Z in the product of maxterm. (4)
(ii). Simplify the 5 variable switching function using Karnaugh map
f(EDCBA)=∑m(3,5,6,8,9,12,13,14,19,22,24,25,30). (12)

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