MICROPROCESSOR AND MICROCONTROLLER

Unit – I INTRODUCTION
Digital Computers - Microcomputer Organization- Computer languages –Microprocessor
Architecture and its operations – Microprocessor initiated operations and 8085 Bus organization
– Internal Data operations and 8085 registers - Peripheral or External initiated operations.

Unit – II 8085 MICROPROCESSOR

8085 Microprocessor – Pinout and Signals – Functional block diagram - 8085 Instruction Set and
Classifications.

Unit – III CONVERSIONS

BCD to Binary and Binary to BCD conversions - ASCII to BCD and BCD to ASCII conversions
- Binary to ASCII and ASCII to Binary conversions. BCD Arithmetic - BCD addition and
Subtraction - Multibyte Addition and Subtraction - Multiplication and Division.

Unit – IV 8085 INTERRUPTS

The 8085 Interrupts – RIM AND SIM instructions-8259 Programmable Interrupt Controller-
Direct Memory Access (DMA) and 8257 DMA controller.
Unit – V MICROCONTROLLER
Introduction to Microcontroller - Microcontroller Vs Microprocessor - 8051 Microcontroller
architecture - 8051 pin description. Timers and Counters – Operating Modes- Control Registers.
Interrupts – Interrupts in 8051 - Interrupts Control Register – Execution of interrupt.

Text Book(s)
1. R. S. Gaonkar- "Microprocessor Architecture- Programming and Applications with 8085"- 5th
Edition- Penram International Publications, 2009. [For unit I to unit IV]
2. Soumitra Kumar Mandal -“Microprocessors and Microcontrollers – Architectures,
Programming and Interfacing using 8085, 8086, 8051”, Tata McGraw Hill Education Private
Limited. [For unit V].

Reference Books:
1. Mathur- “Introduction to Microprocessor”- 3rd Edition- Tata McGraw-Hill -1993.
2. Raj Kamal - “Microcontrollers: Architecture, Programming, Interfacing and System Design”,
Pearson Education, 2005.
3.Krishna Kant, “Microprocessors and Microcontrollers – Architectures, Programming and
System Design 8085, 8086, 8051, 8096”, PHI, 2008
 UNIT-1

INTRODUCTION

Digital Computers
 Digital computers are devices that process data using digital technology, where data is
represented in discrete, binary form (0s and 1s).
 These machines are ubiquitous in modern society and are used for a wide range of tasks,
from simple calculations to complex simulations and data analysis.

Key components of digital computers include:

1. Central Processing Unit (CPU): The brain of the computer, responsible for executing
instructions, performing calculations, and managing data movement.

2. Memory: Storage for data and instructions that the CPU can access quickly. This includes
both random access memory (RAM) for temporary storage and long-term storage devices like
hard disk drives (HDDs) or solid-state drives (SSDs).

3. Input Devices: These allow users to interact with the computer by providing data and
instructions. Common input devices include keyboards, mice, touchscreens, and microphones.

4. Output Devices: These display or otherwise present the results of computations to the user.
Examples include monitors, printers, speakers, and actuators.

5. Motherboard: The main circuit board of the computer, which holds the CPU, memory, and
other essential components and provides the connections between them.

6. Operating System: Software that manages the computer's resources and provides a user
interface for interacting with the hardware and running applications.

 Digital computers operate using a binary system, where information is represented using
combinations of 0s and 1s.
 This binary representation allows for efficient manipulation and processing of data
through logical operations such as AND, OR, and NOT.
 The development of digital computers has revolutionized fields such as science,
engineering, medicine, business, and entertainment, enabling tasks that were previously
impractical or impossible.
 Today's digital computers range from small, handheld devices like smartphones to
powerful supercomputers capable of processing massive amounts of data at incredible
speeds.
Microcomputer Organization

 Microcomputer organization refers to the architecture and design principles of small-

scale computers, often referred to as microcomputers or personal computers (PCs).
 These systems typically consist of a single microprocessor chip that integrates the central
processing unit (CPU), memory, input/output (I/O) interfaces, and other essential
components onto a single integrated circuit.

Here are some key aspects of microcomputer organization:

1. Microprocessor:
 At the heart of a microcomputer is the microprocessor, which executes instructions
and performs calculations.
 Early microprocessors, such as the Intel 4004 and 8008, were simple and had limited
capabilities compared to modern CPUs like those found in PCs and smartphones.
2. Memory:
 Microcomputers typically have different types of memory, including random access
memory (RAM) for temporary data storage and read-only memory (ROM) for storing
firmware and boot instructions.
 RAM is used to hold data and program instructions that the CPU needs to access
quickly during operation.
3. Input/Output (I/O) Interfaces:
 Microcomputers connect to external devices such as keyboards, mice, displays,
storage devices, and network interfaces through various I/O ports and controllers.
  These interfaces allow users to interact with the computer and transfer data to and
from external devices.

4. Bus Architecture:
 The bus architecture of a microcomputer determines how different components
communicate with each other.
 It consists of data buses, address buses, and control signals that facilitate the transfer
of data and instructions between the CPU, memory, and I/O devices.
5. Peripheral Devices:
 Microcomputers can be expanded with additional peripheral devices to enhance their
functionality.
 Common peripherals include printers, scanners, disk drives, and expansion cards for
adding features like graphics, sound, and networking.
6. System Software:
 Microcomputers typically run an operating system (OS) that manages the hardware
resources and provides a user interface for running applications.
 Popular operating systems for microcomputers include Microsoft Windows, macOS,
and various distributions of Linux.
7. Assembly Language and High-Level Languages:
 Software for microcomputers is typically developed using programming languages
such as assembly language or high-level languages like C, C++, or Python.
 Assembly language provides low-level access to the microcomputer's hardware,
while high-level languages offer greater abstraction and ease of programming.
 Microcomputer organization has evolved significantly since the introduction of the first
microprocessors in the 1970s.
 Today's microcomputers are powerful, versatile, and widely used in various applications
ranging from personal computing and gaming to embedded systems and IoT devices.

Computer languages
Programming Language Generations

 A computer is a digital machine. It can only understand electric signals either ON or OFF
or 1 or 0.
 But how do we communicate with this digital machine? Just like there are multiple
languages we communicate with each other (e.g., English, Hindi, Tamil, Gujarati, etc.).
 But computers cannot understand our languages. We can interact with the computer
through multiple languages like machine language, assembly language, C, C++, Java, etc.

Basic Terms:
Computer language: A computer language is a way to give instructions to a computer to
perform desired tasks.

Program: A set of instruction written in a specific sequence for the computer to accomplish a
given task.

Machine language: The binary medium of communication with a computer through a designed
set of instruction specific to each computer.

Assembly language: A medium of communication with a computer in which programs are

written in mnemonics. An assembly language is specific to a given computer.

Mnemonic: A combination of letter to suggest the operation of an instruction. E.g, ADD, HALT
etc.

Categories of Computer Languages

There are two types of computer languages:

Low-Level Languages:

 These languages give instructions to a computer in a way that is easily understood by the
hardware of the computer.
 These languages are easier for a computer to understand but difficult for a human
understanding.
 This language is machine-dependent or specific to a given computer.
 Two low-level languages are Machine Language and Assembly Language.

High-Level Languages:

 These languages are written in English-like language.

 Thus, these are easier for a human to understand but difficult for a computer to
understand.
 They can be executed on a machine using a translator.
 This language is machine-independent.
 There are many high-level languages eg, C. C++. Java, COBOL, PHP, etc.

Evolution of Computer Languages

 A computer can understand instructions in terms of electric signals as it works on

electricity.
 Electric signals are either ON or OFF, or we can say 1 for ON or 0 for OFF.
 When computers we invented, firstly instructions were given to it in terms of 1’s and 0’s.
 This form of language is known as Machine Language or the first-generation language.
First Generation Language:

 Firstly, computers were given instructions in the forms of 1’s and 0’s.
 This language is called Machine Language or first-generation language.
 A computer was able to understand it directly without any conversion.
 This language is also known as Machine Language or Binary language.
 Binary language because only two symbols 1 and 0.

Second Generation Language:

 Machine Language was just 1’s and 0’s, in which error finding and correcting were very
difficult.
 So we have to develop a second-generation language. Also called an Assembly
Language.
 In this language, instructions were replaced with some coded terms called mnemonic.
 So that it becomes a little easier to read, understand, and correct.
 A computer can understand and work on machine code only.
 So assembly language needed a special software called Assembler that converts
mnemonic into machine language.

Third Generation Languages:

 First, two generations of languages were comparatively easier for a computer to

understand, but it was difficult for humans to read, understand and code in them.
 Thus, came English like programming languages to give instructions to computers.
 These languages are known as High-Level Languages as they are easier for humans to
understand.
 C, C++, Java, COBOL Pascal, etc. are some High-Level Languages.

Fourth Generation Language:

 Third-generation languages require detailed procedures, but fourth-generation languages

just require ‘what’ do we want from the code rather than ‘how to do’. i.e., the procedure.
 These languages are similar to statements in the human language mainly used in database
programming. E.g. Python, Ruby, SQL, MatLab.
 SQL-Structured Query Language is one such language, e.g. you just write SELECT ALL
department Name FROM EmployeeTable to get all the department names: No detailed
program is required.
Fifth Generation Languages:

 The fifth-generation languages are more focused on artificial intelligence

implementation.
 These have visual tools to develop a program. Prolog, OPSS Mercury, etc. are some
SGLS. E.g. Prolog, OPS5, Mercury etc.

Microprocessor Architecture and its operations

Microprocessor Architecture
 The microprocessor is the CPU (Central Processing Unit) of a computer.
 It is the heart of the computer. Here, we will describe Intel 8085 as it is one of the most
popular 8-bit microprocessor.

Intel 8085

 Intel 8085 is an 8-bit, NMOS microprocessor designed by Intel in 1977.

It has following configuration:

 It is a 40 pin I.C. package fabricated on a single LSI chip.

 The Intel 8085 uses a single +5Vd.c. supply for its operation.
 Intel 8085?s clock speed is about 3 MHz; the clock cycle is of 320ns.
 8 ?bit data bus.
 Address bus is of 16-bit, which can address up to 64KB
 16-bit stack pointer
 16 bit PC (Program Counter)
 Six 8-bit registers are arranged in pairs :BC, DE, HL

 Intel 8085 is used in mobile phones, microwave ovens, washing machines etc.

The below diagram shows the block diagram of Intel 8085:

ALU

 The Arithmetic and Logic Unit, ALU performs the arithmetic and logical operations:

 Addition
 Subtraction
 Logical AND
 Logical OR
 Logical EXCLUSIVE OR
 Complement (Logical NOT)
 Increment (add 1)
 Decrement (subtract 1)
 Left shift, Rotate left, Rotate right
 Clear, etc.

Timing and Control Unit

 The timing and control unit is the section of the CPU.

  It is used to generate timing and control signals which are necessary for the execution of
instructions.
 It is used to control data flow between CPU and peripherals (including memory).
 It is used to provide status, control and timing signals which are required for the
operation of memory and I/O devices.
 It is used to control the entire operations of the microprocessor and peripherals connected
to it.
 Thus we can see that the control unit of the CPU acts as the brain of the computer system.

Registers

 Registers are used for temporary storage and manipulation of data and instructions by the
microprocessor.
 Data remain in the registers till they are sent to the I/O devices or memory. Intel 8085
microprocessor has the following registers:

 One 8-bit accumulator (ACC) i.e. register A

 Six general purpose registers of 8-bit, these are B,C, D, E, H and L
 One 16-bit stack pointer, SP
 One 16-bit Program Counter, PC
 Instruction register
 Temporary register

 In addition to the above mentioned registers the 8085 microprocessor contains a set of
five flip-flops which serve as flags (or status flags).
 A flag is a flip-flop which indicates some conditions which arises after the execution of
an arithmetic or logical instruction.

Accumulator (ACC):
 The accumulator is an 8-bit register associated with the ALU.
 The register 'A' is an accumulator in the 8085.
 It is used to hold one of the operands of an arithmetic and logical operation.
 The final result of an arithmetic or logical operation is also placed in the accumulator.
a. General-Purpose Registers:

 The 8085 microprocessor contains six 8-bit general purpose registers.

 They are: B, D, C, E, H and L register.
 To hold data of 16-bit a combination of two 8-bit registers can be employed.
 The combination of two 8-bit registers is called register pair.
 The valid register pairs in the 8085 are: D-E, B-C and H-L.
  The H-L pair is used to act as a memory pointer.
b. Program Counter (PC):

 It is a 16-bit special purpose register.

 It is used to hold the address of memory of the next instruction to be executed.
 It keeps the track of the instruction in a program while they are being executed.
 The microprocessor increments the content of the next program counter during
the execution of an instruction so that at the end of the execution of an instruction
it points to the next instruction’s address in the program.
c. Stack Pointer (SP):
 It is a 16-bit special function register used as memory pointer.
 A stack is nothing but a portion of RAM.
 In the stack, the contents of only those registers are saved, which are needed in
the later part of the program.
 The stack pointer (SP) controls the addressing of the stack.
 The Stack Pointer contains the address of the top element of data stored in the
stack.

d. Instruction Register:

 The instruction register holds the opcode (operation code or instruction code) of
the instruction which is being decoded and executed.

e. Temporary Register:
 It is an 8-bit register associated with the ALU. It holds data during an
arithmetic/logical operation. It is used by the microprocessor. It is not accessible
to programmer.
f. Flags:

 The Intel 8085 microprocessor contains five flip-flops to serve as a status flags.
 The flip-flops are reset or set according to the conditions which arise during an
arithmetic or logical operation.

The five status flags of Intel 8085 are:

 Carry Flag (CS)

 Parity Flag (P)
 Auxiliary Carry Flag (AC)
  Zero Flag(Z)
 Sign Flag(S)

 If a flip-flop for a particular flag is set, then it indicates 1. When it is reset, it indicates 0.

Data and Address Bus

 The Intel 8085 is an 8-bit microprocessor. Its data bus is 8-bit wide and therefore, 8 bits
of data can be transmitted in parallel from or to the microprocessor.
 The Intel 8085 requires an address bus of 16-bit wide as the memory addresses are of
16-bits.
 The 8 most significant bits of the address are transmitted by the address bus, A-bus (pins
A8 ? A15).
 The 8 least significant bits of the address are transmitted by data/address bus, AD-bus
(pins AD0 ? AD7).

Microprocessor initiated operations and 8085 Bus Organization

 The 8085 microprocessor is a widely used 8-bit microprocessor that was introduced by
Intel.
 It features a straightforward architecture and an 8-bit data bus.
 Let's delve into the initiated operations and bus organization of the 8085 microprocessor:

Microprocessor initiated operations:

 These are operations that are initiated by the microprocessor itself to interact with
external devices. The different types are

 Memory read – Reads data ( or instruction) from memory

 Memory write – Writes data ( or instruction) from memory
 Input / Output read – Reads data from input devices.
 Input / Output write – Sends data to output devices.
 Lets take the example of memory read. The steps involved are

 MPU (micro processing unit) identifies peripheral device. It places a 16 bit address on
the address bus.
 External logical circuit decodes the address and identifies the memory location.
 MPU sends a memory read synchronization signal.
 The memory chip activates.
 The contents of the memory chip are placed on the 8 bit data bus.
Initiated Operations:

1. Arithmetic and Logical Operations:

 The 8085 microprocessor executes arithmetic operations such as addition, subtraction,
multiplication, and division. It also performs logical operations like AND, OR, XOR, and
complement.
 Example instructions: ADD, SUB, INR (increment), DCR (decrement), AND, ORA.

2. Data Transfer Operations:

 These operations involve moving data between registers, memory, and I/O ports.
 Example instructions: MOV (move), MVI (move immediate), LXI (load immediate),
LDA (load accumulator), STA (store accumulator).

3. Control Flow Operations:

 These operations control the flow of program execution, including branching and
subroutine calls.
 Example instructions: JMP (unconditional jump), CALL (call subroutine), RET (return
from subroutine), JZ (jump if zero), JC (jump if carry).

4. Input / Output Operations:

 The 8085 communicates with external devices through input and output operations.
 Example instructions: IN (input data from port), OUT (output data to port).

5. Stack Operations:
 The microprocessor supports stack operations for subroutine calls and return addresses
storage.
 Example instructions: PUSH (push data onto stack), POP (pop data from stack).

6. Interrupt Handling:
 The 8085 handles interrupts, both maskable and non-maskable, to respond to external
events promptly.
 Example instructions: RST (restart), DI (disable interrupts), EI (enable interrupts).

8085 Bus Organization:

Diagram to represent bus organization system of 8085 Microprocessor.
1. Address Bus (16 bits):
 The 8085 microprocessor features a 16-bit address bus, allowing it to address up to 64KB
of memory.
 It sends addresses to memory or I/O devices during read or write operations.
 Length of Address Bus of 8085 microprocessor is 16 Bit (That is, Four Hexadecimal
Digits), ranging from 0000 H to FFFF H, (H denotes Hexadecimal).
 The microprocessor 8085 can transfer maximum 16 bit address which means it can
address 65, 536 different memory location.

2. Data Bus (8 bits):

 The 8085 microprocessor has an 8-bit data bus for transferring data between the
processor and memory or I/O devices.
 It transfers data in parallel during read or write operations.

3. Control Bus:
 The control bus carries control signals to coordinate the activities of the microprocessor,
memory, and I/O devices. Control signals include read/write signals, memory enable, I/O
enable, interrupt request, and clock signals.

4. Memory Address Space:

 The 8085 microprocessor has a 16-bit address space, enabling it to access 64KB of
memory.
 The memory address space is divided into segments for different types of memory and
I/O ports.

Internal operations:
 These are operations that happen within the microprocessor, such as
  Storing data in register.
 Performing various arithmetic and logical operations.
 Doing test conditions.
 Sequence the execution of instructions.
 Storing data temporarily in stacks.

For example, lets take the below program,

MVI A,50H

MVI B,20H

ADD B

HLT

Memory location Hex code Instruction

2000 3E MVI A

2001 50 50H

2002 06 MVI B

2003 20 20H

2004 80 ADD B

2005 76 HLT

 Memory locations are incremented by byte value and not bit. Each instruction is stored in
the form of hexadecimal codes in the memory. Every instruction has a specific
hexadecimal code. MVI A has a hexadecimal code 3E .
Steps:
 When the program starts, the microprocessor places the address of the first operation on
the address bus.
 It then increments the address on the program counter by 1 (the address of the next
instruction).
 A memory read control signal is sent which activates the external memory chip. The data
in the address is then placed on the bidirectional data bus and sent to the microprocessor.
 The instruction is stored in the instruction register.
 The instruction decoder decodes the instruction.
Steps 1-3 repeat again to fetch 50 H stored in the memory. It is then stored in the B register. The
same steps repeat for MVI A,20H. Once the ADD B instruction is fetched, stored in instruction
register and decoded, the data in the B register is fetched and stored in the temporary register.
The contents of the Accumulator and the temporary register are given as inputs to the ALU. The
results of the ALU is stored in the accumulator. If the results of the carry operation result in a
carry, the carry flag (it is a flip flop) becomes 1.

Registers of 8085 Microprocessor

 It has eight addressable 8-bit registers: A, B, C, D, E, H, L, F, and two 16-bit registers PC
and SP. These registers can be classified as −

 General Purpose Registers

 Temporary Registers: a) Temporary data register b) W and Z registers
 Special Purpose Registers: a) Accumulator b) Flag registers c) Instruction register
 Sixteen-bit Registers: a) Program Counter (PC) b) Stack Pointer (SP)

General Purpose Registers

 Registers B, C, D, E, H, and L are general purpose registers in 8085 Microprocessor.

 All these GPRS are 8-bits wide.
 They are less important than the accumulator.
 They are used to store data temporarily during the execution of the program.
 For example, there is no instruction to add the contents of Band E registers.
 At least one of the operands has to be in A. Thus to add Band E registers, and to store the
result in B register, the following have to be done.
 Move to A register the contents of B register.
 Then add A and E registers. The result will be in A.
  Move this result from A register to B register.

Temporary Registers
(a)Temporary Data Register - The ALU has two inputs. One input is supplied by the
accumulator and other from the temporary data register. The programmer cannot access this
temporary data register. However, it is internally used for execution of most of the arithmetic
and logical instructions.

(b) W and Z registers - Wand Z registers are temporary registers. These registers are used to
hold 8-bit data during the execution of some instructions. These registers are not available for the
programmer since 8085Microprocessor Architecture uses them internally.

Special Purpose Registers

(a) Register A(Accumulator) - Register A is an 8-bit register used in 8085 to perform arithmetic,
logical, I/O & LOAD/STORE operations. Register A is quite often called as an Accumulator. An
accumulator is a register for short-term, intermediate storage of arithmetic and logic data in a
computer's CPU (Central Processing Unit).

(b)Flag Register - It is a 3-bit register, in which five of the bits carry significant information in
the form of flags: S (Sign flag), Z (Zero flag), AC(Auxiliary carry flag), P (Parity flag), and CY
(carry flag); as shown in Fig. 1.2.

 S-Sign flag - After the execution of arithmetic or logical operations, if bit D7 of the result is
1, the sign flag is set. In a given byte if D7 is1, the number will be viewed as a negative
number. If D7 is U, the number will be considered as a positive number.
 Z-Zero flag -The zero flag sets if the result of the operation in ALU is zero and flag resets if
the result is non zero. The zero flags are also set if a certain register content becomes zero
following an increment or decrement operation of that register.
  AC-auxiliary Carry flag - This flag is set if there is an overflow out of bit 3 i.e. carry from
lower nibble to higher nibble (D3 bit to D4 bit). This flag is used for BCD operations and it is
not available for the programmer.
 P-Parity flag - Parity is defined by the number of ones present in the accumulator. After
arithmetic or logical operation, if the result has an even number of ones, i.e.even parity, the
flag is set. If the parity is odd, the flag is reset.
 CY-Carry flag - This flag is set if there is an overflow out of bit 7. The carry flag also serves
as a borrow flag for subtraction. In both the examples shown below, the carry flag is set.
Addition
9BH -----> 1001 1011
+75 H -----> + 0111 0101
--------- -----------
Carry 1 10 H -----> 1 0001 0000
Subtraction
89H -----> 1000 1001
-AB H -----> - 1010 1011
--------- -----------
Borrow1 10 H -----> 1 1101 1110

c) Instruction Register - In a typical processor operation, the processor first fetches the
opcode of instruction from memory (i.e. it places an address on the address bus and memory
responds by placing the data stored at the specified address on the data bus). The CPU stores this
opcode in a register called the instruction register. This opcode is further sent to the instruction
decoder to select one of the 256 alternatives.

4. Sixteen Bit Registers

a) Program counter (PC) –

 Program is a sequence of instructions. As mentioned earlier, microprocessor fetches these

instructions from the memory and executes them
 The program counter is a special purpose register which, at a given time, stores the address of
the next instruction to be fetched.
 Program Counter acts as a pointer to the next instruction.
b) Stack Pointer (SP) –

 The stack is a reserved area of the memory in the RAM where temporary information may be
stored.
 A 16-bit stack pointer is used to hold the address of the most recent stack entry.

In the following figure depicts the architecture of 8085 microprocessor and with its register
organization –

Peripheral initiated operations:

These are operations that are initiated by the peripheral devices connected to the microprocessor:

1. Reset – When this pin is activated, all the internal operations are suspended, the address of
the program counter is reset to 0000H. The program execution starts at 0000H.
2. Interrupt – The activation of this pin temporarily suspends the internal operations to execute
other operations called a service routine (emergency procedures). After performing the
service routine, normal internal operations resume.

3. Ready – The activation of this pin tells the microprocessor that the peripheral device is ready
for the next action. If the ready pin is not activated, the microprocessor is in a wait stage. It is
waiting for the peripheral device to complete its operation so they can continue to the next
operation.

4. Hold – When the hold pin is activates, the microprocessor gives up control of the its buses
and lets the peripheral device use them. The microprocessor becomes the slave while the
peripheral device that sent that signal becomes the master.

Each of these operations have a specific pin in the microprocessor chip.

From the pin diagram given above,

1. HLDA (Hold Acknowledge) – It indicates that the microprocessor has received the HOLD
command and will give up its control of the data and address bus in the next cycle. When the
HOLD signal is removed, HLDA is set to 0.

2. Reset in – Used to reset the microprocessor. This involves suspending all the internal
operations and setting the address in the program counter to 0000H.
3. Reset out – All the connected devices are also reset when the microprocessor is reset.

4. TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR are interrupt signals.
 UNIT-II
8085 MICROPROCESSOR
8085 Microprocessor
 The 8085 microprocessor is an 8-bit microprocessor introduced by Intel in 1976.
 It's part of the Intel 8080 family and is backward compatible with the 8080.
 Here are some key features and aspects:
1. Architecture:
 It uses a Von Neumann architecture, meaning that both data and instructions are
stored in the same memory.
 It has an 8-bit data bus and a 16-bit address bus.
2. Registers:
 The 8085 has six general-purpose registers, labeled B, C, D, E, H, and L.
 These can be combined as register pairs to perform 16-bit operations.
 It also has a 16-bit stack pointer and a 16-bit program counter.
3. Instruction Set:
 The instruction set of the 8085 consists of around 74 instructions.
 These instructions are classified into various groups like data transfer, arithmetic,
logic, branching, etc.
4. Clock Speed:
 The 8085 typically operates at a clock speed of 3 MHz.
5. Memory:
 It can address up to 64 KB of memory directly.
6. Interrupts:
 The 8085 supports five interrupts: TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR.
 These interrupts allow external devices to request the attention of the
microprocessor.
7. Instruction Execution:
 It executes instructions in a serial manner, meaning it executes one instruction at
a time.
 The 8085 was widely used in various applications, including industrial control systems,
instrumentation, and early personal computers. Despite its age, it still has relevance in
certain embedded systems and educational environments.

PINOUT AND SIGNALS

Pin diagram of 8085 microprocessor is as given below:
1. Address Bus and Data Bus: The address bus is a group of sixteen lines i.e A0-A15. The
address bus is unidirectional, i.e., bits flow in one direction from the microprocessor unit to the
peripheral devices and uses the high order address bus.
2. Control and Status Signals:
 ALE – It is an Address Latch Enable signal. It goes high during first T state of a machine
cycle and enables the lower 8-bits of the address, if its value is 1 otherwise data bus is
activated.
 IO/M’ – It is a status signal which determines whether the address is for input-output or
memory. When it is high(1) the address on the address bus is for input-output devices.
When it is low(0) the address on the address bus is for the memory.
 SO, S1 – These are status signals. They distinguish the various types of operations such as
halt, reading, instruction fetching or writing.

IO/M’ S1 S0 Data Bus Status

0 1 1 Opcode fetch

0 1 0 Memory read

0 0 1 Memory write
 IO/M’ S1 S0 Data Bus Status

1 1 0 I/O read

1 0 1 I/O write

1 1 1 Interrupt acknowledge

0 0 0 Halt
 RD’ – It is a signal to control READ operation. When it is low the selected memory or
input-output device is read.
 WR’ – It is a signal to control WRITE operation. When it goes low the data on the data bus
is written into the selected memory or I/O location.
 READY – It senses whether a peripheral is ready to transfer data or not. If READY is
high(1) the peripheral is ready. If it is low(0) the microprocessor waits till it goes high. It is
useful for interfacing low speed devices.
3. Power Supply and Clock Frequency:
 Vcc – +5v power supply
 Vss – Ground Reference
 XI, X2 – A crystal is connected at these two pins. The frequency is internally divided by
two, therefore, to operate a system at 3MHZ the crystal should have frequency of 6MHZ.
 CLK (OUT) – This signal can be used as the system clock for other devices.
4. Interrupts and Peripheral Initiated Signals:
The 8085 has five interrupt signals that can be used to interrupt a program execution.
(i) INTR
(ii) RST 7.5
(iii) RST 6.5
(iv) RST 5.5
(v) TRAP
The microprocessor acknowledges Interrupt Request by INTA’ signal. In addition to
Interrupts, there are three externally initiated signals namely RESET, HOLD and READY.
To respond to HOLD request, it has one signal called HLDA.
 INTR – It is an interrupt request signal.
 INTA’ – It is an interrupt acknowledgement sent by the microprocessor after INTR is
received.
5. Reset Signals:
 RESET IN’ – When the signal on this pin is low(0), the program-counter is set to zero,
the buses are tristated and the microprocessor unit is reset.
 RESET OUT – This signal indicates that the MPU is being reset. The signal can be used
to reset other devices.
6. DMA Signals:
 HOLD – It indicates that another device is requesting the use of the address and data bus.
Having received HOLD request the microprocessor relinquishes the use of the buses as
soon as the current machine cycle is completed. Internal processing may continue. After the
removal of the HOLD signal the processor regains the bus.
 HLDA – It is a signal which indicates that the hold request has been received after the
removal of a HOLD request, the HLDA goes low.
7. Serial I/O Ports: Serial transmission in 8085 is implemented by the two signals,
 SID and SOD – SID is a data line for serial input where as SOD is a data line for serial
output.
Functional Block Diagram
Functional Block Diagram of 8085 Microprocessor

Fig: Functional Block Diagram of 8085 Microprocessor

1. ALU
 The ALU performs the actual numerical and logic operation such as ‘add’, ‘subtract’,
‘AND’, ‘OR’ etc.
 Uses data from memory and from Accumulator to perform arithmetic operation and
always stores result of operation in Accumulator.
 The ALU consists of accumulator, flag register and temporary register.
 a. Accumulator
 The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU). This
register is used to store 8-bit data and to perform arithmetic and logical operations.
The result of an operation is stored in the accumulator.
 The accumulator is also identified as register A.

b. Flag register
 8085 has 8-bit flag register. There are only 5 active flags.

S Z AC P CY

Fig: 8085 flag register

 Flags are flip-flops which are used to indicate the status of the accumulator and other
register after the completion of operation.
 These flip-flops are set or reset according to the data condition of the result in the
accumulator and other registers.

i. Sign flag(S):
 Sign flag indicates whether the result of a mathematical or logical operation is negative or
positive.
 If the result is negative, this flag will be set (i.e. S=1) and if the result is positive, the flag
will be reset (i.e. S=0).

ii. Zero flag (Z):

 Zero flag indicates whether the result of a mathematical or logical operation is zero or
not.
 If the result of current operation is zero, the flag will be set (i.e. Z=1) otherwise the flag
will be reset (Z=0).
 This flag will be modified by the result in the accumulator as well as in the other
register.

iii. Auxiliary carry flag (AC):

 In operation when a carry is generated by bit D3 and passes on to bit D4, the AC flag
will be set otherwise AC flag will be reset.
 This flag is used only internally for BCD operation and is not available for the
programmer to change the sequence of program with the jump instruction.
 iv. Parity flag (P):

 This flag indicates whether the current result is of even parity (no. of 1’s is even) or
odd parity (no. of 1’s is odd).
 If even parity, P flag will be set otherwise reset.

v. Carry flag (CY):

 This flag indicates whether during an addition or subtraction operation carry or
borrow is generated or not.
 If carry or borrow is generated, the flag will be set otherwise reset.

2. Timing and control unit

 This unit produces all the timing and control signal for all the operation.
 This unit synchronizes all the MP operations with the clock and generates the control
signals necessary for communication between the MP and peripherals.

3. Instruction register and decoder

 The instruction register and decoder are part of ALU. When an instruction is fetched
from memory, it is loaded in the instruction register.
 The decoder decodes the instruction and establishes the sequence of events to follow.
 The IR is not programmable and cannot be accessed through any instruction.
4. Register array
 The register unit of 8085 consists of
 Six general-purpose data registers B,C,D,E,H,L
 Two internal registers W and Z
 Two 16-bit address registers PC (program counter) and SP (stack pointer)
 One increment/decrement counter register
 And, one multiplexer (MUX)
 The six general-purpose registers are used to store 8-bit data. They can be combined
as register pairs BC, DE, and HL to perform some 16-bit operations.
 The two internal registers W and Z are used to hold 8-bit data during the execution of
some instructions, CALL and XCHG instructions.
 SP is 16-bit registers used to point the address of data stored in the stack memory. It
always indicates the top of the stack.
 PC is 16-bit register used to point the address of the next instruction to be fetched and
executed stored in the memory.
5. System bus
a. Data bus
 It carries ‘data’, in binary form, between MP and other external units, such as
memory.
 Typical size is 8 or 16 bits.

b. Address bus
 It carries ‘address’ of operand in binary form.
 Typical size is 16-bit.

c. Control Bus
 Control Bus are various lines which have specific functions for coordinating and
controlling MP operations
 E.g.: Read/Write control line.

6. Interrupt Control
 Interrupt is a signal, which suspends the routine what the MP is doing, brings the
control to perform the subroutine, completes it and returns to main routine.
 May be hardware or software interrupts. Some interrupts may be ignored (maskable),
some cannot (non-maskable).
 E.g. INTR, TRAP, RST 7.5, RST 6.5, RST 5.5

7. Serial I/O Control

 The MP performs serial data input or output (one bit at a time). In serial transmission,
data bits are sent over a single line, one bit at a time.
 The 8085 has two signals to implement the serial transmission: SID (serial input data)
and SOD (serial output data).

8085 Microprocessor Instruction Format

 An instruction is a command to the microprocessor to perform a given task on specified
data.
 Each instruction has two parts, one is a task to be performed, called the operation code
(opcode), and the second is the data to be operated on called the operand.
 The 8085 instruction set is classified according to a word size.
 One-Byte Instructions: A 1-byte instruction includes the opcode and operand in
the same byte. Operands are internal registers and are coded into the instruction.
  Two-Byte Instructions: In a two-byte instruction, the first byte specifies the
operation code and the second byte specifies the operand. The source operand is
a data byte immediately following the opcode.
 Three-Byte Instructions: In a three-byte instruction, the first byte specifies the
opcode and the following two bytes specify the 16-bit address. Note that the
second byte is the low-order address and the third byte is the high-order address.

8085 Microprocessor Addressing Modes

 The various formats for specifying operands are called the addressing modes. For 8085,
they are

Immediate Addressing:
 Data is provided in the instruction.
 Load the immediate data to the destination provided.
 Example: MVI A, 12 H

Register Addressing:
 Data is provided through the registers.
 Example: MOV B, C

Direct Addressing:
 Used to accept data from outside devices to store in the accumulator or send the data
stored in the accumulator to the outside device.
 Example: MOV A, [1000]

Indirect Addressing:
 The processor calculates the effective address, and the contents of the address is used
to form a second address. The second address is where the data is stored.
 Example: MOV A, [[1000]]

Implicit addressing:
 In this addressing mode, the data itself specifies the data to be operated upon.
 Example: CMA; Complement the contents of the accumulator.
8085 Microprocessor Instruction Set
 An instruction is a binary pattern designed inside a microprocessor to perform a specific
function. Each instruction is represented by an 8-bit binary value. The instruction set can
be categorized into 5 types:

1.Data Transfer Instructions:

 These instructions transfer data from one register to another, from memory to register or
register to memory.
 When an instruction for a data transfer group is executed, data is transferred from the
source to the destination without altering the contents of the source.
 Examples: MOV, MVI, LXI, LDA, STA, etc.

2.Arithmetic Instructions:
 These instructions are used to perform arithmetic operations such as addition,
subtraction, increment or decrement of the content of a register or memory.
 Examples: ADD, ADC, ADI, DAD, SUB, INR, DCR, etc.

3.Logical Instructions:
 These instructions perform logical operations such as AND, OR, compare, rotate etc.
 Examples: ANA, ANI, ORA, ORI, XRA, CMA, CMC, STC, CMP, RLC, RAL,
RAR, etc.

4.Branching Instructions:
 These instructions are used to perform a conditional and unconditional jump, subroutine
call and return, and restart.
 Examples: JZ, JNZ, JC, JNC, JP, JM, JPE, JPO, CALL, RET, RST, etc.

5.Machine Control Instructions:

 These instructions control machine functions such as Halt, Interrupt, or do nothing.
 The microprocessor operations related to data manipulation can be summarized in
four functions: copying data, performing arithmetic operations, performing logical
operations, testing for a given condition and alerting the program sequence.
 Example: PUSH, POP, HLT, XTHL, NOP, EI, DI, etc.

8085 Microprocessor Example

Example-1: Write an 8085 assembly program for multiplying two 8-bit numbers.
  MVI A,00; Load immediate data into the accumulator.
 MVI B,02; Load immediate data into register B.
 MVI C,04; Load immediate data into register C.
 LOOP: ADD B; Add the content to the accumulator.
 DCR C; Decrement the content of register C by 1.
 JNZ LOOP
 STA 1000 H; Store the content of the accumulator in memory location 1000 H
 HLT ; Halt

Instruction Set Classification

 An instruction is a binary pattern designed inside a microprocessor to perform a
specific function.
 The entire group of instructions, called the instruction set, determines what
functions the microprocessor can perform.
 These instructions can be classified into the following five functional categories:
data transfer (copy) operations, arithmetic operations, logical operations,
branching operations, and machine-control operations.

1 Data Transfer Group

 The data transfer instructions move data between registers or between memory and
registers.
MOV Move
MVI Move Immediate
LDA Load Accumulator Directly from Memory
STA Store Accumulator Directly in Memory
LHLD Load H & L Registers Directly from Memory
SHLD Store H & L Registers Directly in Memory
An 'X' in the name of a data transfer instruction implies that it deals with a register pair (16-bits);
LXI Load Register Pair with Immediate data
LDAX Load Accumulator from Address in Register Pair
STAX Store Accumulator in Address in Register Pair
XCHG Exchange H & L with D & E
XTHL Exchange Top of Stack with H & L

2 Arithmetic Group
The arithmetic instructions add, subtract, increment, or decrement data in registers or memory.
ADD Add to Accumulator
ADI Add Immediate Data to Accumulator
ADC Add to Accumulator Using Carry Flag
ACI Add immediate data to Accumulator Using Carry
SUB Subtract from Accumulator
SUI Subtract Immediate Data from Accumulator
SBB Subtract from Accumulator Using Borrow (Carry) Flag
SBI Subtract Immediate from Accumulator Using Borrow (Carry) Flag
INR Increment Specified Byte by One
DCR Decrement Specified Byte by One
INX Increment Register Pair by One
DCX Decrement Register Pair by One
DAD Double Register Add; Add Content of Register
Pair to H & L Register Pair

3 Logical Group
 This group performs logical (Boolean) operations on data in registers and memory and on
condition flags. The logical AND, OR, and Exclusive OR instructions enable you to set
specific bits in the accumulator ON or OFF.
ANA Logical AND with Accumulator
ANI Logical AND with Accumulator Using Immediate Data
ORA Logical OR with Accumulator
OR Logical OR with Accumulator Using Immediate Data
XRA Exclusive Logical OR with Accumulator
XRI Exclusive OR Using Immediate Data
The Compare instructions compare the content of an 8-bit value with the contents of the
accumulator;
CMP Compare
CPI Compare Using Immediate Data
The rotate instructions shift the contents of the accumulator one bit position to the left or right:
RLC Rotate Accumulator Left
RRC Rotate Accumulator Right
RAL Rotate Left Through Carry
RAR Rotate Right Through Carry
Complement and carry flag instructions:
CMA Complement Accumulator
CMC Complement Carry Flag
STC Set Carry Flag

4 Branch Group
 The branching instructions alter normal sequential program flow, either unconditionally
or conditionally. The unconditional branching instructions are as follows:
JMP Jump
CALL Call
RET Return
 Conditional branching instructions examine the status of one of four condition flags to
determine whether the specified branch is to be executed. The conditions that may be
specified are as follows:
NZ Not Zero (Z = 0)
Z Zero (Z = 1)
NC No Carry (C = 0)
C Carry (C = 1)
PO Parity Odd (P = 0)
PE Parity Even (P = 1)
P Plus (S = 0)
M Minus (S = 1)
Thus, the conditional branching instructions are specified as follows
Jumps Calls Returns
INC CNC RNC (No Carry)
JNZ CNZ RNZ (Not Zero)
JM CM RM (Minus)
JP0 CPO RPO (Parity Odd)
JM CM RM (Minus)
JPE CPE RPE (Parity Even)
JP0 CPO RPO (Parity Odd)
 Two other instructions can affect a branch by replacing the contents or the program
counter:
PCHL Move H & L to Program Counter
RST Special Restart Instruction Used with Interrupts

5 Stack Instructions
The following instructions affect the Stack and/or Stack Pointer
PUSH Push Two bytes of Data onto the Stack
POP Pop Two Bytes of Data off the Stack
XTHL Exchange Top of Stack with H & L
SPHL Move content of H & L to Stack Pointer

6 I/0 instructions
IN Initiate Input Operation
OUT Initiate Output Operation

7 Machine Control instructions

EI Enable Interrupt System
DI Disable Interrupt System
HLT Halt
NOP No Operation
 UNIT-III
BCD to Binary and Binary to BCD conversions
Converting between Binary-Coded Decimal (BCD) and binary can be useful in certain
applications, particularly in digital electronics or computing systems where decimal
representation is required. Here's how you can perform these conversions:
BCD to Binary Conversion:
1. Separate the digits: BCD encodes each decimal digit in a 4-bit binary number. Separate each
digit into groups of four bits.
2. Convert each digit to binary: For each BCD digit, convert it to its 4-bit binary equivalent.
3. Concatenate the binary digits: After converting each BCD digit to binary, concatenate them
together to form the binary representation of the original BCD number.
Example:
Let's say we have the BCD number 1010 0110.
1. Separate the digits: 1010 and 0110.
2. Convert each digit to binary:
- 1010 in binary is 10.
- 0110 in binary is 6.
3. Concatenate the binary digits: 1010 0110 in BCD is equivalent to 101000110 in binary.
Binary to BCD Conversion:
1. Split the binary number into groups of 4 bits: Start from the rightmost bit and group the binary
digits into sets of four, adding leading zeros if necessary.
2. Convert each group to decimal: Convert each 4-bit group to its decimal equivalent.

3. Concatenate the decimal digits: After converting each group to decimal, concatenate them
together to form the BCD representation of the original binary number.
Example:
Let's say we have the binary number 1101101.
1. Split the binary number into groups of 4 bits: 0110 1101.
2. Convert each group to decimal:
 - 0110 in decimal is 6.
- 1101 in decimal is 13.
3. Concatenate the decimal digits: 6 13 in binary is equivalent to 0110 1101 in BCD.
These are the basic steps for performing BCD to binary and binary to BCD conversions. You can
use these steps in programming or digital logic circuits to perform the conversions as needed.

There are many methods or techniques which can be used to convert code from one format to
another. We'll demonstrate here the following

 Binary to BCD Conversion

 BCD to Binary Conversion

Binary to BCD Conversion

Steps

 Step 1 -- Convert the binary number to decimal.

 Step 2 -- Convert decimal number to BCD.

Example − convert (11101)2 to BCD.

Step 1 − Convert to Decimal

Binary Number − 111012

Calculating Decimal Equivalent −

Step Binary Number Decimal Number

Step 1 111012 ((1 × 24) + (1 × 23) + (1 × 22) + (0 × 21) + (1 × 20))10
Step 2 111012 (16 + 8 + 4 + 0 + 1)10
Step 3 111012 2910

Binary Number − 111012 = Decimal Number − 2910

Step 2 − Convert to BCD

Decimal Number − 2910

 Calculating BCD Equivalent. Convert each digit into groups of four binary digits
equivalent.

Step Decimal Number Conversion

Step 1 2910 00102 10012
 Step 2 2910 00101001BCD

Result

(11101)2 = (00101001)BCD

BCD to Binary Conversion

Steps

 Step 1 -- Convert the BCD number to decimal.

 Step 2 -- Convert decimal to binary.

Example − convert (00101001)BCD to Binary.

Step 1 - Convert to BCD

BCD Number − (00101001)BCD

Calculating Decimal Equivalent. Convert each four digit into a group and get decimal equivalent
for each group.

Step BCD Number Conversion

Step 1 (00101001)BCD 00102 10012
Step 2 (00101001)BCD 210 910
Step 3 (00101001)BCD 2910

BCD Number − (00101001)BCD = Decimal Number − 2910

Step 2 - Convert to Binary

Used long division method for decimal to binary conversion.

Decimal Number − 2910

Calculating Binary Equivalent −

Step Operation Result Remainder

Step 1 29 / 2 14 1
Step 2 14 / 2 7 0
Step 3 7/2 3 1
Step 4 3/2 1 1
Step 5 1/2 0 1
As mentioned in Steps 2 and 4, the remainders have to be arranged in the reverse order so that
the first remainder becomes the least significant digit (LSD) and the last remainder becomes the
most significant digit (MSD).

Decimal Number − 2910 = Binary Number − 111012

Result

(00101001)BCD = (11101)2

Converting between ASCII (American Standard Code for Information Interchange) and Binary-
Coded Decimal (BCD) involves encoding characters from the ASCII table into their respective
BCD representations, and vice versa. Here are some examples:
ASCII to BCD Conversion:
1. Convert ASCII character to its ASCII code: Look up the ASCII code for each character in the
ASCII table.
2. Convert ASCII code to binary: Convert the ASCII code to binary representation.
3. Group binary digits into sets of four: For each ASCII code, group the binary digits into sets of
four.
4. Convert each group to BCD: Convert each 4-bit group to its BCD representation.
5. Concatenate BCD representations: Concatenate the BCD representations of each ASCII code
together.
Example:
Let's convert the ASCII string "HELLO" to BCD.
1. ASCII codes for "HELLO":
- H: 72
- E: 69
- L: 76
- L: 76
- O: 79
2. Convert ASCII codes to binary:
- H: 01001000
- E: 01000101
 - L: 01001100
- L: 01001100
- O: 01001111
3. Group binary digits into sets of four:
- H: 0100 1000
- E: 0100 0101
- L: 0100 1100
- L: 0100 1100
- O: 0100 1111
4. Convert each group to BCD:
- H: 0100 1000 -> 0100 (4) 1000 (8)
- E: 0100 0101 -> 0100 (4) 0101 (5)
- L: 0100 1100 -> 0100 (4) 1100 (12)
- L: 0100 1100 -> 0100 (4) 1100 (12)
- O: 0100 1111 -> 0100 (4) 1111 (15)
5. Concatenate BCD representations: 0100 1000 0100 0101 0100 1100 0100 1100 0100 1111
BCD to ASCII Conversion:
1. Split the BCD representation into pairs of digits: For each pair of BCD digits, separate them.
2. Convert each pair to binary: Convert each pair of BCD digits to binary.
3. Convert binary to ASCII: Convert the binary representation to its corresponding ASCII
character using the ASCII table.
Example:
Let's convert the BCD representation 0100 1000 0100 0101 0100 1100 0100 1100 0100 1111 to
ASCII.
1. Split BCD representation into pairs:
0100 1000
0100 0101
0100 1100
 0100 1100
0100 1111
2. Convert each pair to binary:
0100 1000 -> 01001000 -> 72 (ASCII code for 'H')
0100 0101 -> 01000101 -> 69 (ASCII code for 'E')
0100 1100 -> 01001100 -> 76 (ASCII code for 'L')
0100 1100 -> 01001100 -> 76 (ASCII code for 'L')
0100 1111 -> 01001111 -> 79 (ASCII code for 'O')
3. Convert binary to ASCII: "HELLO"
These examples demonstrate how to perform ASCII to BCD and BCD to ASCII conversions.
You can follow similar steps to perform conversions for other characters or strings.
Converting between binary and ASCII involves encoding characters from the ASCII table into
their respective binary representations, and vice versa. Here are the steps for binary to ASCII and
ASCII to binary conversions:
Binary to ASCII Conversion:
1. Split the binary representation into groups of 8 bits: For each ASCII character, split the binary
representation into groups of 8 bits.
2. Convert each group to decimal: Convert each group of 8 bits (byte) to its decimal equivalent.
3. Find the corresponding ASCII character: Look up the decimal value in the ASCII table to find
the corresponding ASCII character.
4. Concatenate ASCII characters: Concatenate the ASCII characters together to form the ASCII
string.
Example:
Let's convert the binary string "01001000 01000101 01001100 01001100 01001111" to ASCII.
1. Split binary representation into groups of 8 bits:
- 01001000 (72 in decimal, corresponds to 'H' in ASCII)
- 01000101 (69 in decimal, corresponds to 'E' in ASCII)
- 01001100 (76 in decimal, corresponds to 'L' in ASCII)
- 01001100 (76 in decimal, corresponds to 'L' in ASCII)
- 01001111 (79 in decimal, corresponds to 'O' in ASCII)
2. Concatenate ASCII characters: "HELLO"
ASCII to Binary Conversion:
1. Convert each ASCII character to its ASCII code: Look up the ASCII code for each character
in the ASCII table.
2. Convert ASCII code to binary: Convert each ASCII code to its binary representation.
3. Pad binary representation if necessary: Ensure that each binary representation is 8 bits long by
adding leading zeros if needed.
4. Concatenate binary representations: Concatenate the binary representations together to form
the binary string.
Example:
Let's convert the ASCII string "HELLO" to binary.
1. ASCII codes for "HELLO":
- H: 72
- E: 69
- L: 76
- L: 76
- O: 79
2. Convert ASCII codes to binary:
- H: 01001000
- E: 01000101
- L: 01001100
- L: 01001100
- O: 01001111
3. Concatenate binary representations: "01001000 01000101 01001100 01001100 01001111"
These examples demonstrate how to perform binary to ASCII and ASCII to binary conversions.
You can follow similar steps to perform conversions for other characters or strings.

Binary Arithmetic
Binary arithmetic is essential part of all the digital computers and many other digital system.
Binary Addition
It is a key for binary subtraction, multiplication, division. There are four rules of binary addition.

In fourth case, a binary addition is creating a sum of (1 + 1 = 10) i.e. 0 is written in the given
column and a carry of 1 over to the next column.

Example − Addition

Binary Subtraction
Subtraction and Borrow, these two words will be used very frequently for the binary
subtraction. There are four rules of binary subtraction.

Example − Subtraction
Binary Multiplication
Binary multiplication is similar to decimal multiplication. It is simpler than decimal
multiplication because only 0s and 1s are involved. There are four rules of binary multiplication.

Example − Multiplication

Binary Division
Binary division is similar to decimal division. It is called as the long division procedure.

Example − Division
Multibyte addition and subtraction using Binary Coded Decimal (BCD)
arithmetic
Addition Example:
Let's add two multibyte BCD numbers:
1234
+ 5678
______
6912
Here's how it works:
1. Start from the rightmost digits and add them together: 4 + 8 = 12 (BCD: 0010).
2. Carry over the tens place (1) to the next column.
3. Add the next pair of digits along with the carry: 3 + 7 + 1 = 11 (BCD: 0001).
4. Carry over the tens place (1) again.
5. Add the next pair of digits along with the carry: 2 + 6 + 1 = 9 (BCD: 1001).
6. No carry this time.
7. Finally, add the leftmost digits: 1 + 5 = 6.
So, the result is 6912 in BCD format.
Subtraction Example:
Let's subtract a multibyte BCD number from another:
9876
- 5432
______
4444
Sure, let's delve into examples of multibyte multiplication and division using Binary Coded
Decimal (BCD) arithmetic:
Multiplication Example:
Let's multiply two multibyte BCD numbers:
123
× 456
_________
To multiply these numbers:
1. Start with the rightmost digit of the bottom number (6) and multiply it by each digit of the top
number in turn, moving left:
- \( 6 \times 3 = 18 \) (BCD: 0001 1000)
- \( 6 \times 2 = 12 \) (BCD: 0001 0010)
- \( 6 \times 1 = 6 \) (BCD: 0110)
2. Then, move to the next digit of the bottom number (5) and repeat the process, but shifted one
place to the left:
- \( 5 \times 3 = 15 \) (BCD: 0001 0101)
- \( 5 \times 2 = 10 \) (BCD: 0001 0000)
- \( 5 \times 1 = 5 \) (BCD: 0101)
3. Lastly, move o the leftmost digit of the bottom number (4) and repeat the process, but shifted
two places to the left:
- \( 4 \times 3 = 12 \) (BCD: 0001 0010)
- \( 4 \times 2 = 8 \) (BCD: 1000)
- \( 4 \times 1 = 4 \) (BCD: 0100)
4. Finally, add all the partial products together:
1 1 7 7 3 1 8
× 1 2 3
_______________
4 6 3 8 3 1 8
231456
37418
_______________
5615738
So, the result of the multiplication is \( 561738 \).
Division Example
Let's divide one multibyte BCD number by another:
1234 ÷ 56
To perform division:
1. Start by dividing the leftmost digits of the dividend by the divisor. In this case, \( 12 ÷ 56 = 0
\), and the remainder is \( 12 \).
2. Bring down the next digit of the dividend to form \( 124 \)
3. Now, divide \( 124 ÷ 56 \), which gives \( 2 \) with a remainder of \( 12 \).
4. Bring down the next digit of the dividend to form \( 1234 \).
5. Finally, divide \( 1234 ÷ 56 \), which gives \( 22 \) with a remainder of \( 2 \).
So, the result of the division is \( 22 \) with a remainder of \( 2 \).
 UNIT-IV
8085 INTERRUPTS
The 8085 Interrupts – RIM AND SIM instructions-8259 Programmable Interrupt Controller-
Direct Memory Access (DMA) and 8257 DMA controller.

Interrupts in 8085
 Interrupts are the signals generated by the external devices to request the microprocessor
to perform a task.
 There are 5 interrupt signals,
 i.e. TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR.

 Interrupt are classified into following groups based on their parameter −

 Vector interrupt − In this type of interrupt, the interrupt address is known to the
processor. For example: RST7.5, RST6.5, RST5.5, TRAP.
 Non-Vector interrupt − In this type of interrupt, the interrupt address is not known to
the processor so, the interrupt address needs to be sent externally by the device to
perform interrupts. For example: INTR.
 Maskable interrupt − In this type of interrupt, we can disable the interrupt by writing
some instructions into the program. For example: RST7.5, RST6.5, RST5.5.
 Non-Maskable interrupt − In this type of interrupt, we cannot disable the interrupt by
writing some instructions into the program. For example: TRAP.
 Software interrupt − In this type of interrupt, the programmer has to add the instructions
into the program to execute the interrupt. There are 8 software interrupts in 8085, i.e.
RST0, RST1, RST2, RST3, RST4, RST5, RST6, and RST7.
 Hardware interrupt − There are 5 interrupt pins in 8085 used as hardware interrupts,
i.e. TRAP, RST7.5, RST6.5, RST5.5, INTA.

Interrupt Service Routine (ISR)

 A small program or a routine that when executed, services the corresponding interrupting
source is called an ISR.

TRAP

 It is a non-maskable interrupt, having the highest priority among all interrupts.

 In case of failure, it executes as ISR and sends the data to backup memory.
 This interrupt transfers the control to the location 0024H.

RST7.5

 It is a maskable interrupt, having the second highest priority among all interrupts.
  When this interrupt is executed, the processor saves the content of the PC register into the
stack and branches to 003CH address.

RST 6.5

 It is a maskable interrupt, having the third highest priority among all interrupts.
 When this interrupt is executed, the processor saves the content of the PC register into the
stack and branches to 0034H address.

RST 5.5

 It is a maskable interrupt. When this interrupt is executed, the processor saves the content
of the PC register into the stack and branches to 002CH address.

INTR

 It is a maskable interrupt, having the lowest priority among all interrupts. It can be
disabled by resetting the microprocessor.

When INTR signal goes high, the following events can occur −

 The microprocessor checks the status of INTR signal during the execution of each
instruction.
 When the INTR signal is high, then the microprocessor completes its current instruction
and sends active low interrupt acknowledge signal.
 When instructions are received, then the microprocessor saves the address of the next
instruction on stack and executes the received instruction.

RIM AND SIM instructions

SIM instruction in 8085
 In 8085 Instruction set, SIM stands for “SetInterrupt Mask”.
 It is 1-Byte instruction and it is a multipurpose instruction. The main uses of SIM instruction are
–

 Masking/unmasking of RST7.5, RST6.5, and RST5.5

 Reset to 0 RST7.5 flip-flop
 Perform serial output of data

Mnemonics, Operand Opcode(in HEX) Bytes

SIM 30 1
  The meaning and purpose of the various bits of the accumulator when SIM is executed
has been depicted below –


 . Masking of interrupts: Only the LS 4 bits of the accumulator are used for masking or
unmasking of interrupts.

Bit Purpose
No.
Bit This is the Mask Set Enable (MSE) bit. This bit can have two values: 0or 1.
3:
 If MSE bit = 0, SIM instruction is not being used for masking or unmasking of
interrupts. In such a case, the LS 3bits of the Accumulator are not having any useful
information.
 If MSE bit = 1, the SIM instruction is used for masking or unmasking of interrupts.
Then the LS 3 bits provide information about masking or unmasking of interrupts.
Bit This is mask RST7.5 (M7.5) bit. Thisbit is meaningful only if MSE bit = 1. If MSE = 1 and
2: M7.5 = 0,RST7.5 is unmasked. If MSE = 1 and M7.5 = 1, RST7.5 is masked.
Bit This is M6.5 bit, used for masking/unmasking of RST6.5. It is similar to M7.5 bit.
1:
Bit This is M5.5 bit, used for masking/unmasking of RST5.5. It is similar to M7.5 bit.
0:

 It should be noted that RST7.5, RST6.5, and RST5.5 can be masked or unmasked using
this SIM instruction.
 TRAP and INTR cannot be masked or unmasked using SIM.
 TRAP is not allowed to be masked because it is the highest priority un-maskable
interrupt.
 INTR does do not need the facility of masking because it is the lowest priority interrupt.
 After reset of 8085 RST7.5, RST6.5, and RST5.5 interrupts will be in masked condition.
 Reset RST7.5 flip-flop: Bit 4 (R7.5) of Accumulator is used for resetting to 0 RST7.5
flip-flop output when SIM instruction is executed.
 If R7.5 = 0, SIM instruction is not being used for resetting of RST7.5 flip-flop. Thus, if
R7.5 = 0, there is no change in the RST7.5 flip-flop output.
 If R7.5 = 1, the RST7.5flip-flop gets cleared. Let us consider the following diagram for
the better understanding –
  Form the diagram it is clear that SIM signal is activated if and only if, SIM instruction is
executed. R7.5 signal is activated when bit 4 (R7.5) of Accumulator = 1.
 So the RST7.5flip-flop receives logic 1 to its clear input and thus gets cleared when bit 4
of Accumulator = 1 and SIM instruction is executed.
 Alternatively, RST7.5 flip-flop gets cleared when RST7.5 interrupt is recognized by the
8085 or whenever the 8085 is reset.

Bit Purpose
No.
Bit This is the serial output enables (SOE) bit. If this bit = 0, SIM instruction is not being used
6: for serial output of data. In such a case, the MS bit of Accumulator is not having any useful
information. If SOE bit = 1, the SIM instruction is used for serial output of data. Then the
MS bit provides the data to be sent out on the SOD pin of 8085.
Bit This is serial output data (SOD)bit. This bit is meaningful only if SOE bit = 1. If SOE = 1
7: and SIM instruction is executed, then the SOD bit comes out on the SOD pin of 8085.

Let us consider the following program segment –

Address Hex Mnemonic Comment

Codes
2000 3E MVI A, A ← 19H =0001 1001, it means SOD=0,
19H SDE=0, R7.5=1, MSE=1, M5.5=1
2001 19 Accumulator value 19H

2002 30 SIM Set Interrupt Mask

RIM instruction in 8085

 In 8085 Instruction set, Read Interrupt Mask. It is a 1-Byte multi-purpose instruction. It is

used for the following purposes.

 To check whether RST7.5, RST6.5, and RST5.5 are masked or not;

 To check whether interrupts are enabled or not;
 To check whether RST7.5, RST6.5, or RST5.5 interrupts are pending or not;
 To perform serial input of data.

Mnemonics, Operand Opcode (in HEX) Bytes

RIM 20 1

 Through this RIM instruction, 8085 can know which interrupt is masked or unmasked, etc.
The contents of the Accumulator after the execution of the RIM instruction provide this
information.
 The meaning of the various bits of the Accumulator after Read Interrupt Mask is
executed is shown in the following figure –

 Mask status of interrupts: The LS 3 bits of the accumulator are used to provide mask
status of interrupts. Note that they are not used for masking or unmasking. Masking or
unmasking has to be done using the Read Interrupt Mask instruction.

Bit Purpose
No.
Bit This is mask RST5.5 (M5.5) bit.
0:  If M5.5 = 1, it means that RST5.5 interrupt has been masked.
 If M5.5 = 0, RST5.5 interrupt is unmasked.
Bit This is mask RST6.5 (M6.5) bit.
1:  If M6.5 = 1, it means that RST 6.5 interrupt has been masked.
  If M6.5 = 0, RST 6.5 interrupt is unmasked.
Bit This is mask RST7.5 (M7.5) bit.
2:  If M7.5 = 1, it means that RST 7.5 interrupt has been masked.
 If M7.5 = 0, RST7.5 interrupt is unmasked.

 Interrupt Enable (IE) status: Bit 3 of the Accumulator provides the status of IE flip-flop
after the Read Interrupt Mask instruction is executed.

 If IE = 1, it means that the interrupt system is enabled. This will be the situation if EI
instruction is executed sometime prior to the RIM instruction.
 If IE = 0, it means that the interrupt system is disabled. This will be the situation if
sometime prior to execution of the RIM instruction, one of the following things have
occurred.
 DI instruction was executed
 Intel 8085 has been reset
 Intel 8085 has entered an interrupt service subroutine.

Let us now other status bits in the following table –

Bit Purpose
No.
Bit This is interrupt pending RST5.5 (IP5.5) bit.
4:  If IP5.5 = 1, it means that RST5.5 interrupt is pending, waiting to be serviced. This will
be the situation when RST5.5 interrupt pin is activated, but RST5.5 is masked, or the
interrupt system is disabled.
 If IP5.5 = 0, the RST5.5interrupt is not pending.
Bit This is interrupt pending RST6.5 (IP6.5) bit.
5:  If IP6.5 = 1, it means that RST6.5 interrupt is pending, waiting to be serviced.
 If IP6.5 = 0, the RST6.5interrupt is not pending.
Bit This is interrupt pending RST7.5 (IP7.5) bit.
6:  If IP7.5 = 1, it means that RST7.5 interrupt is pending, waiting to be serviced.
 If IP7.5 = 0, the RST7.5 interrupt is not pending.
Bit This is SID bit. After the RIM instruction is executed, the data on the SID pin of 8085 gets
7: loaded into this bit position.

 Let us discuss details about the various interrupts of 8085 as summarized in the table that
follows.
 Pin Priority Interrupt Service Sub- Sensitivity Condition
routine Address
TRAP Highest 0024H Rising Edge and Unconditional
High Level
RST7.5 Second 003CH Rising Edge Unmasked and EI
RST6.5 Third 0034H High Level Unmasked and EI
RST5.5 Fourth 002CH High Level Unmasked and EI
INTR Lowest Supplied by an external High Level EI
device

Let us consider the following program segment –

Address Hex Mnemonic Comment

Codes
2000 3E MVI A, A ← 19H =0001 1001, it means SOD=0, SDE=0, R7.5=1,
19H MSE=1, M5.5=1
2001 19 Accumulator value 19H

2002 30 SIM Set Interrupt Mask

2003 20 RIM Read Interrupt Mask. If Accumulator gets the value01H then
that means SID=0, I7.5=0, I6.5=0, I5.5=0, IE=0,
M7.5=0,M6.5=0 and M5.5=1

8259 Programmable Interrupt Controller

8259 PIC Microprocessor
 The 8259 is known as the Programmable Interrupt Controller (PIC) microprocessor.
 In 8085 and 8086 there are five hardware interrupts and two hardware interrupts
respectively.
 This chip combines the multi-interrupt input source to single interrupt output.
 This provides 8-interrupts from IR0 to IR7.
 Let us see some features of this microprocessor.

 This chip is designed for 8085 and 8086.

 It can be programmed either in edge triggered, or in level triggered mode
 We can mask individual bits of Interrupt Request Register.
 By cascading 8259 chips, we can increase interrupts up to 64 interrupt lines
 Clock cycle is not needed.
The pin level diagram and functional pin diagram is like below -

The block diagram is like below -

1. Data bus buffer – This Block is used as a mediator between 8259 and 8085/8086
microprocessor by acting as a buffer. It takes the control word from the 8085 (let say)
microprocessor and transfer it to the control logic of 8259 microprocessor. The data bus
buffer consists of 8 bits represented as D0-D7 in the block diagram. Thus, shows that a
maximum of 8 bits data can be transferred at a time.
2. Read/Write logic – This block works only when the value of pin CS is low (as this pin
is active low). This block is responsible for the flow of data depending upon the inputs of
RD and WR. These two pins are active low pins used for read and write operations.
3. Control logic – It is the center of the PIC and controls the functioning of every block. It
has pin INTR which is connected with other microprocessor for taking interrupt request
and pin INT for giving the output.
4. Interrupt request register (IRR) – It stores all the interrupt level which are
requesting for Interrupt services.
5. Interrupt service register (ISR) – It stores the interrupt level which are currently
being executed.
6. Interrupt mask register (IMR) – It stores the interrupt level which have to be
masked by storing the masking bits of the interrupt level.
7. Priority resolver – It examines all the three registers and set the priority of interrupts
and according to the priority of the interrupts, interrupt with highest priority is set in ISR
register. Also, it reset the interrupt level which is already been serviced in IRR.
8. Cascade buffer – To increase the Interrupt handling capability, we can further cascade
more number of pins by using cascade buffer. So, during increment of interrupt capability,
CSA lines are used to control multiple interrupt structure.

Direct Memory Access (DMA) and 8257 DMA controller.

 DMA stands for Direct Memory Access. It is designed by Intel to transfer data at the
fastest rate. It allows the device to transfer the data directly to/from memory without any
interference of the CPU.
 Using a DMA controller, the device requests the CPU to hold its data, address and
control bus, so the device is free to transfer data directly to/from the memory. The DMA
data transfer is initiated only after receiving HLDA signal from the CPU.

How DMA Operations are Performed?

 Following is the sequence of operations performed by a DMA −

 Initially, when any device has to send data between the device and the memory, the
device has to send DMA request (DRQ) to DMA controller.
 The DMA controller sends Hold request (HRQ) to the CPU and waits for the CPU to
assert the HLDA.
 Then the microprocessor tri-states all the data bus, address bus, and control bus. The
CPU leaves the control over bus and acknowledges the HOLD request through
HLDA signal.
 Now the CPU is in HOLD state and the DMA controller has to manage the operations
over buses between the CPU, memory, and I/O devices.

Features of 8257

 Here is a list of some of the prominent features of 8257 −

 It has four channels which can be used over four I/O devices.
 Each channel has 16-bit address and 14-bit counter.
 Each channel can transfer data up to 64kb.
 Each channel can be programmed independently.
 Each channel can perform read transfer, write transfer and verify transfer operations.
 It generates MARK signal to the peripheral device that 128 bytes have been transferred.
 It requires a single phase clock.
 Its frequency ranges from 250Hz to 3MHz.
 It operates in 2 modes, i.e., Master mode and Slave mode.

8257 Architecture
The following image shows the architecture of 8257 −
8257 Pin Description

 The following image shows the pin diagram of a 8257 DMA controller −
DRQ0−DRQ3

 These are the four individual channel DMA request inputs, which are used by the
peripheral devices for using DMA services.
 When the fixed priority mode is selected, then DRQ0 has the highest priority and
DRQ3 has the lowest priority among them.

DACKo − DACK3

 These are the active-low DMA acknowledge lines, which updates the requesting
peripheral about the status of their request by the CPU.
 These lines can also act as strobe lines for the requesting devices.

Do − D7

 These are bidirectional, data lines which are used to interface the system bus with the
internal data bus of DMA controller.
 In the Slave mode, it carries command words to 8257 and status word from 8257.
  In the master mode, these lines are used to send higher byte of the generated address to
the latch. This address is further latched using ADSTB signal.

IOR

 It is an active-low bidirectional tri-state input line, which is used by the CPU to read
internal registers of 8257 in the Slave mode.
 In the master mode, it is used to read data from the peripheral devices during a memory
write cycle.

IOW

 It is an active low bi-direction tri-state line, which is used to load the contents of the data
bus to the 8-bit mode register or upper/lower byte of a 16-bit DMA address register or
terminal count register.
 In the master mode, it is used to load the data to the peripheral devices during DMA
memory read cycle.

CLK

 It is a clock frequency signal which is required for the internal operation of 8257.

RESET

 This signal is used to RESET the DMA controller by disabling all the DMA channels.

Ao - A3

 These are the four least significant address lines.

 In the slave mode, they act as an input, which selects one of the registers to be read or
written.
 In the master mode, they are the four least significant memory address output lines
generated by 8257.

CS

 It is an active-low chip select line.

 In the Slave mode, it enables the read/write operations to/from 8257.
 In the master mode, it disables the read/write operations to/from 8257.

A4 - A7

 These are the higher nibble of the lower byte address generated by DMA in the master
mode.
READY

 It is an active-high asynchronous input signal, which makes DMA ready by inserting wait
states.

HRQ

 This signal is used to receive the hold request signal from the output device.
 In the slave mode, it is connected with a DRQ input line 8257.
 In Master mode, it is connected with HOLD input of the CPU.

HLDA

 It is the hold acknowledgement signal which indicates the DMA controller that the bus
has been granted to the requesting peripheral by the CPU when it is set to 1.

MEMR

 It is the low memory read signal, which is used to read the data from the addressed
memory locations during DMA read cycles.

MEMW

 It is the active-low three state signal which is used to write the data to the addressed
memory location during DMA write operation.

ADST

 This signal is used to convert the higher byte of the memory address generated by the
DMA controller into the latches.

AEN

 This signal is used to disable the address bus/data bus.

TC

 It stands for ‘Terminal Count’, which indicates the present DMA cycle to the present
peripheral devices.

MARK

 The mark will be activated after each 128 cycles or integral multiples of it from the
beginning.
  It indicates the current DMA cycle is the 128th cycle since the previous MARK output to
the selected peripheral device.

Vcc

It is the power signal which is required for the operation of the circuit.