Computer Science (D9) XII - Paper - II
Computer Science (D9) XII - Paper - II
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Computer Science ( D9) XII - Paper –II
The figure below shows the logic pin-out diagram of the 8085 microprocessor. All
single can be classified into six groups: 1) Address Bus 2) Data Bus 3) Control and Status
signals 4) Power supply and Frequency signals 5) Externally initiated signals and 6)
Serial I/O ports.
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Computer Science ( D9) XII - Paper –II
Pin-out diagram:
1) ADDRESS BUS: The 8085 has eight signals lines A15-A8 and used as high order
address bus. They are also called as unidirectional address bus.
2) MULTIPLEX ADDRESS/DATA BUS: The signals lines AD7-AD0 are bi-
directional, they server dual purpose. They are used as the low order address bus as
well as the data bus. This is also known as multiplexing the bus.
3) CONTROLS AND STATUS SIGNAL: This group of signals includes two control
signals (RD and WR), three status signals (IO/M, S1 and S0) to identify the nature of
the operations and one special signal (ALE) indicate the beginning of the operation.
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Computer Science ( D9) XII - Paper –II
ALE –Address Latch Enable: This is a positive (active high) going pulse
generated every time the 8085 begins an operation. It indicates that the bits on
AD7 – AD0 are address bits.
RD-Read: This is a Read control signal (active low).This signal indicates that
the selected I/O or Memory device is to be read and data are available on the
data bus.
WR- Write: This is a write control signal (active low). This signal indicates
that the data on the data bus are to be written into a selected memory or I/O
location.
IO/M: This is a status signal used to differentiate between I/O and memory
operations. When it is high (1) an I/O operation; when it is low (0) it indicates
a memory operation. This signal is combined with RD and WR to generate
I/O and memory control signals.
S1 and S0: These status signals similar to IO/M, can identify various
operations, but they are rarely used in small systems.
Instruction Cycle: Am instruction cycle is defined as the time required completing the
execution of an instruction. The 8085 instruction cycle consists of one to five machine
cycle.
Machine Cycle: Machine cycle is defined as the time required to competing any
operation of accessing either memory or I/O which is the subpart of an instruction. In
8085, the machine cycle may consist of three to six T-state.
T-State: The subdivision of an operation, which is performed in one clock period is
called as T-state.
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Computer Science ( D9) XII - Paper –II
4) POWER SUPPLY AND CLOCK FREQUENCY: The power supply and frequency
signals are as follows:
Vcc: +5 V power supply.
Vss: Ground reference i.e. earthing
X1, X2: Crystal is connected at these two pins. The frequency is internally
divided by two: therefore, to operate a system at 3 MHz, the crystal should
have a frequency of 6 MHz
CLK(OUT)- Clock output: This signal can be used as the system clock for
other devices.
5. INTR : Interrupt Request: Has the lowest priority among all the interrupt.
Interrupts:
An interrupt is subroutine called, initiated by external device through hardware or
microprocessor.
An interrupt can also be viewed as a signal which suspends the normal sequence of
microprocessor gives service to that device which has given the signal. After
completing the request microprocessor again returns to the main program.
Microprocessor is connected to different peripheral devices. To communicate with
these devices, microprocessor 8085 used interrupt method.
An interrupt is an input signal which transfers control to specific routine known as
Interrupt Service Routine (ISR). After executing ISR control is again transfer to main
program.
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Computer Science ( D9) XII - Paper –II
Nonmaskable Interrupts:
i) These interrupt cannot be masked or cannot made pending
ii) Nonmaskable interrupt disables all Maskable interrupts
iii) It is used for emergency purpose.
iv) It has higher priority than Maskable interrupts.
Maskable Interrupts:
i) These interrupt can be masked or made pending
ii) Maskable interrupt cannot disable any Nonmaskable interrupt
iii) It is used to interface with peripheral devices.
iv) It has lower priority than Nonmaskable interrupts.
Software Interrupts:
6) SERIAL I/O PORTS: The 8085 has two signals to implement the serial
transmission: SID (Serial Input Data) and SOD ( Serial Output Data)
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Computer Science ( D9) XII - Paper –II
1) ALU: The arithmetic and logical unit performs the computing functions; it includes the
accumulator, the temporary register, Shifter, Adder and Status Register.
SHIFTER: Performs logical operations like rotate left and right etc.
STATUS REGISTER: Contains group of individual flip-flops that can be set or reset
according to the conditions created by the last ALU operations.
2) REGISTERS: The 8085 has six general purpose registers used to store 8-bit data during the
program execution. These registers are identified as B, C, D, E, H and L. They can be
combined as register pairs: BC, DE, and HL to perform some 16-bit operations
3) ACCUMULATOR: The accumulator is an 8-bit register that is part of ALU. This registers
is used to store 8-bit data and to perform arithmetic and logical operations. The result of an
operation is stored in the accumulator. The accumulator is also identified as registers A.
4) TIMING AND CONTROL UNIT: This unit synchronizes all the microprocessor operation
with the clock and generates the controls signals necessary for communication between the
microprocessor and peripherals.
5) INSTRUCTION REGISTER AND DECODER: The instruction registers and the decoder
as part of the ALU. When an instruction is fetched from memory, it is loaded in the
instruction registers. The decoder decodes the instruction and establishes the sequence of
events to follow.
6) PROGRAM COUNTER (PC): This is 16-bit registers used to sequence the execution of
instructions. The PC is to point to the memory address from which the next instruction to be
fetch. When an instruction is being fetched, the PC is incremented by one to hold the next
instruction to execute.
7) STACK POINTER (SP): The Stack pointer is also 16-bit registers. It points to a memory
location in R/W memory called the STACK.
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Computer Science ( D9) XII - Paper –II
8) FLAGS REGISTER:
Auxiliary carry
D7 D6 D5 D4 D3 D2 D1 D0
Carry 1 1 1 1 1
E.G. : A:1 0 0 1 1 0 0 1
B :1 1 1 0 1 1 0 1
carry 1 1 0 0 0 0 1 1 0 Result
bit
Sign bits
S-SIGN: After the execution of an arithmetic or logic operation. If bit D7 of the result in the
accumulator is 1, the sign flag is set (1), it indicate the number is Negative. If D7is 0, then the
sign flag is reset (0), the number will be considered as positive.
Z-ZERO: The zero flag is set (1) if the ALU operation result in 0000 0000 and the flag is
reset (0), if the result is Non-zero.
AC-AUXILIARY CARRY: In an arithmetic operation, when a carry is generated by digit
D3 and passed on to digit D4, the Ac flag is set (1), otherwise reset (0).
P-PARITY: After arithmetic or logic operation, if the result has an even number (2, 4, 6, 8)
of 1s , the flag is set (1). If it has an odd number (1, 3,5,7) of 1s, the flag is reset (0).
CY-CARRY: if arithmetic operations generate carry from D7, then carry flag is set (1),
otherwise it is reset (0).
Q : Load flag register with hexadecimal B3H. Interpret its meaning.
Ans: First Convert B3H hexadecimal number into binary digits.
B3 : 1011 0011
Second, store that binary number in the flag registers
1 0 1 0 1
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