Memory Ldco
Memory Ldco
Theory
Design of Memory :
RAM Design:
A memory with 4 words needs two address lines. The two address inputs
go through a 2*4 decoder to select one of the four words. The decoder is
enabled with the memory enable input. When the memory enable is 0, all
outputs of the decoder are 0 and none of the memory words are selected.
With the memory enable at 1, one of the four words is selected, dictated
by the value in the two address lines. Once a word has been selected, the
read/write input determines the operation. the logic diagram is-
Design Issues :
A basic RAM cell has been provided here as a component which can be
used to design larger memory units. An IC memory consisting of 4
words each having 3 bits has been aslo provided.
Objective
Objective of memory design(single bit RAM cell):
To design memory units and understand how it operates during read and
write operation.
1. understanding behaviour of memory from working module and the
module designed by the student as part of the experiment
2. designing an memory for given parameter
Examining behaviour of memory for the working module and module
designed by the student as part of the experiment (refer to the circuit
diagram):
Procedure
Design of Memory:
Procedure to perform the experiment: Design of 4X3 RAM memory:
1. Start the simulator as directed. This simulator supports 5-valued
logic.
2. To design the circuit we need 12 binary RAM cell, 9 OR gate, 7 bit
switch (to give input, which will toggle its value with a double click),
3 bit display (to see the output), wires.
3. The pin configuration of a component is shown whenever the mouse
is hovered on any canned component of the palette or press the 'show
pinconfig' button. Pin numbering starts from 1 and from the bottom
left corner (indicated with the circle) and increases anticlockwise.
4. For a binary RAM cell input is in pin-5, output is in pin-4 and select
is pin-8, Read/Write is in pin-6, for read operation give 1 input to
Read/Write pin. For write operation give 0 input to Read/Write pin.
5. For a 'decoder with enable', input A is in pin-6, B is in pin-5, output
D0 is in pin-4, D1 is in pin-3, D2 is in pin-2, D3 is in pin-1 and
Enable is in pin-8
6. Click on the 'decoder with enable' component (in the Other
Components drawer in the pallet) and then click on the position of
the editor window where you want to add the component (no drag
and drop, simple click will serve the purpose), likewise add 12
binary RAM cell (from the Other Components drawer in the pallet),
9 OR gates (from Logic Gates drawer in the pallete), 7 bit switches
(which will toggle its value with a double click), 3 bit displays (from
Display and Input drawer of the pallet,if it is not seen scroll down in
the drawer)
7. To connect any two components select the Connection menu of
Palette, and then click on the Source terminal and click on the target
terminal. According to the circuit diagram connect all the
components, connect 2 bit switches to the inputs of the 'decoder with
enable' (which will act as address input), 1 bit switch to the enable
pin of the 'decoder with enable' (which will act as memory enable
input), connect a bit switch to the Read/Write(R/W') line, 3 bit
switches to the data inputs line, 3 bit displays to the data output line
and OR gates according to the diagram shown in the circuit diagram.
after a the connection is over click the selection tool in the pallete.
8. To see the circuit working, Do some read or write operation by
properly setting the R/W', memory enable then give input and check
the output. suppose you give, R/W'=1, memory enable=1, address
input=01, data input=101, then it will be a read operation and you
will not see 101 as output, it will store 101 in the word-1. now again
set, R/W'=0, memory enable=1, address input=01, then it will be a
write operation and you will see 101 as the content of word-1 on the
output display.
Components :
For Designing a RAM Cell
To build a RAM Cell, we need :
1. AND Gate(2 input)-6
2. NOT Gate-2
3. RS Flip Flop-1
For Designing a 4X3 RAM
To build a 4X3 RAM, we need :
1. OR Gate(2 input)-11
2. RAM Cell-12
3. 2X4 Decoder with Enable-1
Experiment
Design of Memory:
General guideline to use the simulator for performing the experiment:
• Start the simulator as directed. For more detail please refer to the
manual for using the simulator
• The simulator supports 5-valued logic
• To add the logic components to the editor or canvas (where you
build the circuit) select any component and click on the position of
the canvas where you want to add the component
• The pin configuration is shown when you select the component and
press the 'show pinconfig' button in the left toolbar or whenever the
mouse is hovered on any canned component of palette
• To connect any two components select the connection tool of palette,
and then click on the source terminal and then click on the the target
terminal
• To move any component select the component using the selection
tool and drag the component to the desired position
• To give a toggle input to the circuit, use 'Bit Switch' which will
toggle its value with a double click
• Use 'Bit Display' component to see any single bit value. 'Digital
Display' will show the output in digital format
• undo/redo, delete, zoom in/zoom out, and other functionalities have
been given in the top toolbar for ease of circuit building
• Use start/stop clock pulse to start or stop the clock input of the circuit.
Clock period can be set from the given 'set clock' button in the left
toolbar
• Use 'plot graph' button to see input-output wave forms
• Users can save their circuits with .logic extension and reuse them
• After building the circuit press the simulate button in the top toolbar
to get the output
• If the circuit contains a clock pulse input, then the 'start clock' button
will start the simulation of the whole circuit. Then there is no need
to again press the 'simulate' button
Software for conducting the experiment, as appropriate for your platform,
may be downloaded via SOFTWARE