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Dte Imp

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61 views5 pages

Dte Imp

Uploaded by

Danish Sheikh
Copyright
© © All Rights Reserved
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QUESTION BANK (I Scheme)

Name of subject: Digital Techniques


Course Title: DTE (22320) Unit Test: I
Semester: 3I Program Code: IS/EJ

CHAPTER 1: Number Systems and Codes

2 marks
1. Write the base of the following number systems: Decimal, Binary, Octal, and Hexadecimal.
2. Give two applications of EX-OR and EX-NOR gates each.
3. Convert the following Binary number into Gray code.
(i) 1111
(ii) 1101001

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4 marks
4. Convert the following:
i) (5C7)16 = (?)10
ii) ii) (2598)10 = (?)16
iii) iii) (10110)2 = (?)10 = (?)16
5. Perform the following subtraction using 1’s and 2’s complement method:
i) (52)10 – (65)10
ii) ii) (101011)2 – (11010)2

CHAPTER 2: Logic Gates and Logic Families

2 marks
6. Define following characteristics of logic families :
i) Propagation Delay
ii) ii)Fan out
7. State commutative and associative laws for the binary numbers.
8. Draw the Symbol and write the Truth Table of Universal Gates.

4 marks
9. For the given figure No. 1, derive the Boolean expression of Y.

Figure No. 1
10. Realize the following logic operations using only NAND and NOR gates: AND, OR, NOT.
11. Compare TTL and CMOS logic families on the basis of following:
i) Propogation delay
ii) Power dissipation
iii) Fan-out
iv) Basic gate
12. State and prove De Morgan’s Theorems.
13. Reduce the following Boolean expression using Boolean laws.

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14. Describe the operation of TTL logic circuit working as NAND gate.

CHAPTER 3: Combinational Logic Circuits

2 marks
15. Draw three variable K-map formats.
16. State the necessity of multiplexer.
17. Draw Block diagram of 4:1 Multiplexer and write its truth table.
18. Identify function of following ICs. (i) 74244(ii) 74245.

4 marks
19. Minimize the following expression using K-map. f
(P, Q, R, S) = Σ m (0, 1, 4, 5, 7, 8, 9, 12, 13, 15).
20. Draw the block diagram and write the Truth Table of Half Subtractor.
21. Design Full Adder using K-map and Truth Table.
22. Design a four bit BCD adder using IC 7483 and NAND gates only.
23. Design Gray to Binary converter.
24. Give the function of the following terminals of IC 7447.
i) LT ii) RBI iii) BI iv) RBO
25. Design 1: 16 demultiplexer using 1: 4 demultiplexers.
26. Realize the following function using demultiplexer :
I) F1 = Σ m (1, 2, 5, 6, 7, 11,
II) F2 = π M (0, 1, 2, 5, 6, 7, 8, 11, 12, 15)

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QUESTION BANK
Unit Test-II

Program : - Computer Engineering Group Program Code:- / IS/EJ/CM

Course Title: - Digital Techniques Semester: - Third

Course Abbr &Code:- DTE (22320) Scheme:I

CHAPTER 4: Sequential Logic Circuits (CO4)

2marks:-

1.Draw symbol and write the truth table of JK flip flop.


2.Write excitation table of D flip flop.
3.Draw Block schematic of IC 7474.
4.Explain the triggering methods used for digital circuits.
5.Define modulus of a counter? Write down the number of flip flops required for
mod-5 counter?

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4marks:-

6.Describe the operation of 4- bit universal shift register with the help of block diagram.
7.Describe the working of Master-Slave JK Flip-Flop with Truth Table and Logic diagram.
8.Describe the procedure to design MOD-6 counter using IC 7490 in brief.
9.Describe the operation of 4 bit SISO shift register with the help of block diagram, truth table
and timing diagram.
10. Describe Race Around condition and how can it be eliminated.
11. Describe the operation of 3 bit synchronous up counter with Truth Table and Logic
Diagram.
12. Draw the Logic Diagram, Truth Table and waveforms of 3 bit twisted Ring counter.
13. Draw logic diagram and truth table of T Flip – Flop.

CHAPTER 5 Data Converters And PLDs (CO5)

2marks:-
14. List any two specifications of IC- DAC 0808.
15. Give two applications of DAC and ADC each.
16. State any two applications of PLA’s.
17. Define Flash memory.
18. Compare Static RAM and Dynamic RAM.

4 marks:-
19. Draw the block diagram of Programmable Logic Array.
20. Describe the operation of CPLD with the help of block diagram.
21. Calculate analog output of 4 bit DAC for digital input is 1011. Assume VF S= 5V.
22. Describe the working principle of R – 2R ladder with neat diagram.
23. Compare the following Volatile with Non-Volatile memory.
24. Describe the working principle of Successive approximation type ADC with the help
of block diagram.

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