INTEGRATION, the VLSI journal 97 (2024) 102186

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Integration, the VLSI Journal

journal homepage: www.elsevier.com/locate/vlsi

Qualitative data augmentation for performance prediction in VLSI circuits

Prasha Srivastava, Pawan Kumar, Zia Abbas ∗
International Institute of Information Technology, Hyderabad, 500032, India

ARTICLE INFO ABSTRACT

Keywords: Various studies have shown the advantages of using Machine Learning (ML) techniques for analog and digital IC
Machine learning design automation and optimization. Data scarcity is still an issue for electronic designs, while training highly
Artificial intelligence accurate ML models. This work proposes generating and evaluating artificial data using generative adversarial
VLSI design
networks (GANs) for circuit data to aid and improve the accuracy of ML models trained with a small training
Generative adversarial networks
data set. The training data is obtained by various simulations in the Cadence Virtuoso, HSPICE, and Microcap
design environment with TSMC 180 nm and 22 nm CMOS technology nodes. The artificial data is generated
and tested for an appropriate set of analog circuits and digital cells. The experimental results show that the
proposed artificial data generation significantly improves ML models and reduces the percentage error by more
than 50% of the original percentage error, which were previously trained with insufficient data. Furthermore,
this research aims to contribute to the extensive application of AI/ML in the field of VLSI design and technology
by relieving the training data availability-related challenges.

1. Introduction and related work of data augmentation and synthetic data generation can be observed in
various other domains, demonstrating the broader application of these
Machine Learning (ML) is an Artificial Intelligence (AI) method that techniques as follows:
allows computers to act without requiring definitive programming. ML
assists in improving the accuracy of prediction in various applications. 1. A. Mikołajczyk et al. [11] compared and analyzed multiple data
Predictions are made by models using sample data referred to as train- augmentation methods in image classification and improved the
ing data. With the advent of ML, the field of VLSI design and testing training process efficiency for image classification
has the prospect of achieving high levels of automation, speed, and 2. To solve the problem of class imbalance due to the lack of
efficiency. Researchers have introduced numerous AI/ML approaches fraudulent electricity consumers, M. Asif et al. [12] proposed
to achieve notable results in the VLSI design domain [1–8]. employing an evolutionary bidirectional Wasserstein Generative
Most of the approaches heavily rely on a substantial amount of Adversarial Network (Bi-WGAN) to synthesize the most plausible
training data [4,6,8], which poses a challenge for many use cases due fraudulent electricity consumer samples to detect non-technical
to computational expenses, time constraints, and privacy concerns. The losses (NTL) in smart meters.
inadequacy in quantity or diversity of training data, which can restrict 3. W. Tan and H. Guo [13] also utilized a data augmentation
the learning ability of an ML model, is defined as data scarcity. Other
method in their automatic COVID-19 diagnosis framework from
domains, such as sound classification, medical image analysis, disease
lung CT images and improved the generalization capability of
diagnosis, face recognition, etc., employing AI/ML techniques also face
the 2D CNN classification models.
the issue of data scarcity. As discussed by A. Munappy et al. [9], in real-
world industrial applications of deep learning in different domains, the 4. Kortylewski et al. [14] used synthetically generated data to
shortage of diverse data is one of the challenges that can significantly reduce the number of real-world images needed for training
impact the overall performance of deep learning systems. Researchers deep face recognition systems and simultaneously achieved an
have conducted various studies to address this challenge. Data augmen- increased performance.
tation and synthetic data generation are some of the suggested methods 5. Synthetic data has also been used for facial expression analy-
to overcome this limitation and build large-scale training datasets in sis [15], signal generation [16], industrial data generation [17],
these fields. Data augmentation with synthetically created samples has etc.
been proven beneficial for several ML models [10]. Further instances

∗ Corresponding author.
E-mail addresses: [email protected] (P. Srivastava), [email protected] (P. Kumar), [email protected] (Z. Abbas).

https://doi.org/10.1016/j.vlsi.2024.102186
Received 27 July 2023; Received in revised form 11 February 2024; Accepted 17 March 2024
Available online 18 March 2024
0167-9260/© 2024 Elsevier B.V. All rights reserved.
P. Srivastava et al. Integration 97 (2024) 102186

Table 1
Analog circuits with their practical applications used in this work. Parameters denoted in PURPLE: Input parameters for evaluation; Parameters denoted in BLUE: Output parameters
for evaluation.
Dataset Applications Parameters Total parameters
Current reference Building block for oscillators, amplifiers, Supply voltage, Temperature, MOSFET process 9
circuit and phase-locked loops. Used in AIMDs corner, Resistor process corner, Resistance,
such as pacemakers, communication Threshold voltages for MOSFETs, Subthreshold
devices, etc. [18] slope, Output current
Low dropout In wired and wireless communications for Input voltage, Temperature, Internal Resistances, 12
regulator (LDO) portable battery-powered equipment, Load Resistance, Output voltage
implanted biomedical devices, automotive
applications, digital Core supply, and
consumer electronics. [19–21]
Operational For designing basic voltage amplifiers, Process corner, Supply voltage, Temperature, DC 7
trans-conductance active filters, etc. For example, it finds gain, Phase Margin, Unity gain frequency, Power
amplifier applications in biomedical instruments. [18] consumption
Comparator circuit For interfacing with digital logic in Process corner, Supply voltage, Temperature, 6
electronic devices [22,23] Comparator delay, Current consumption, Threshold
voltage
Voltage reference For designing power supplies, measurement Supply voltage, Temperature, MOSFET process 9
and control systems, DACs, and ADCs. These corner, Resistor process corner, Temperature
are used in high-precision applications like coefficient, Reference voltage at nominal
medical and scientific equipment. [18] temperature, Reference voltage at −55 ◦ C,
Reference current, Mirrored current
Temperature sensor In medical devices, handling chemicals, Process corners, Temperature, Supply Voltage, 6
food processing, etc. [24,25] Output voltage

generator fails to capture all modes of the target distribution [28,30,

31]. Diffusion models represent a relatively recent development. They
exhibit the ability to generate high-quality and diverse outputs while
capturing multimodal distributions. However, their training process is
computationally expensive due to the sequential nature of sampling.
Many image data augmentation tasks use GANs and VAE [16,17,32].
GAN has also shown promising results for synthesizing artificial data for
Intrusion Detection Systems(IDS), medical records, educational records
etc [33,34].
Most studies on data augmentation and generation use GAN and
have improved ML models for image-related tasks. It is noteworthy that
while data augmentation has been extensively explored in domains like
medical imaging, VLSI circuit data, characterized by its continuous and
highly mathematically related nature, has been relatively unexplored
in this context. Hence, it is of interest to explore and evaluate the
applicability of GANs or other generative methods in the context of
circuit data. The primary challenge and novelty lie in adapting existing
architectures, such as GANs and VAEs, for non-image data modalities
like VLSI circuits. Also, investigating the potential enhancement of ML
models working on circuit data through the utilization of these methods
Fig. 1. An example of machine learning based data augmentation method using GANs would be noteworthy. Given the considerable computational expenses
for tuning AIMDs.
entailed in training a diffusion model, this study defers the investigation
of utilizing data generated from a diffusion model for circuit data to
future research endeavors. This study is exclusively focused on practical
Existing work regarding data augmentation and synthetic data gen- application and newly proposes a synthetic data generation method for
eration focuses primarily on image data. Various algorithms such as augmenting circuit data using generative adversarial networks (GAN).
geometric transformations, color space augmentations, kernel filters, Our work, therefore, contributes to the field by extending the applica-
mixing images, random erasing, feature space augmentation, adver- tion of generative models to address the unique challenges posed by
sarial training, generative adversarial networks, neural style transfer, non-image data in the VLSI domain. Our contribution is summarized
and meta-learning are used [26] for image augmentation. Generative below:
models are known to produce large and diverse synthetic data for
image datasets. Some of the most commonly used generative mod- 1. Data augmentation for electronic circuit data.
els are Variational Autoencoders(VAE) [27], Generative Adversarial 2. Comparative analysis of the effectiveness of GANs and VAEs
Networks(GAN) [28], and Diffusion Probabilistic models [29]. in the context of data augmentation specifically for electronic
Among these models, different models have different tradeoffs. For circuit data.
instance, VAEs can successfully learn interpretable latent representa- 3. Evaluation of different methods for prevention of mode collapse.
tions of data and perform effective data generation, but they tend Mode collapse is observed when the generated artificial data is
to yield blurry samples compared to those generated by GAN [28]. repetitive and covers only a few reoccurring samples.
GANs can capture complex data distributions and produce high-quality, 4. Demonstration of reduction in prediction error of a previously
visually realistic samples. However, training GANs can be challenging trained ML model by utilizing the generated artificial data for
and unstable, as they are susceptible to mode collapse, where the accurate delay prediction in complex circuits. Furthermore, the

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Table 2
List of digital cell datasets used in this work. (Input parameters for evaluation:
Supply voltage, Temperature, Channel length, Transistor width, physical and elec-
trical equivalent of oxide thickness, nominal gate oxide thickness, source/drain
junction depth, and channel doping concentration, Load capacitance; Output
parameters for evaluation: Propagation Delays for the cell when a certain input
is going from low to high or high to low logic level.)
Dataset Total
parameters
NOT gate delay 17
Two input NAND gate delay 19
Two input AND gate delay 19
Two input NOR gate delay 19
Two input OR gate delay 19
Two input XOR gate delay 19
Three input AND-OR circuit delay 21
Full adder delay 21
2:1 Multiplexer delay 21
Three input NAND gate delay 21
Three input AND gate delay 21
Three input NOR gate delay 21
Four input AND-OR circuit (AO22) delay 23
Fig. 2. Validation process for artificially generated data. Four input AND-OR circuit (AO31) delay 23

Table 3
scalability of the artificial data generated for basic circuits to Comparison of performance of GAN and VAE for generation of current reference
data. Here, PURPLE represents best performing model for GAN and BLUE represents
more complex and larger circuits is also explored.
best performing model for VAE. It is noticed that GAN performs better than VAE in
individual cases as well as the best-performing GAN model beats the best-performing
This paper is organized as follows. Section 2 presents a detailed de-
VAE model.
scription of the used circuit data. This section also answers why data
Number of hidden Average MAPE Average MAPE
augmentation is needed for circuit data and various applications where layers across all features across all features
data augmentation for circuit data can prove beneficial. Section 3 for GAN (%) for VAE (%)
briefly introduces GAN architecture, working, and issues such as mode 2 hidden layers 6.75 7.55
collapse. Section 3 further presents ways to prevent mode collapse. 3 hidden layers 4.15 7.02
Section 4 offers the setup of experiments and performance evaluation 7 hidden layers 4.67 5.75
methodology followed by the obtained experimental results. Finally, in 8 hidden layers 5.23 6.25
9 hidden layers 5.37 9.24
Section 5, the conclusions are drawn.

2. Description of circuit data and need for data augmentation

2.2. Need of data augmentation for circuit data
2.1. Description of circuit data
Analog and digital electronic circuitry form the backbone for a wide
This work considers data from six widely used analog electronic range of applications in healthcare, mobility, the Internet of Things
circuits and fourteen primary digital cells. As a validation approach, (IoT), and wearable and implantable devices. Data extracted from
simulated data from Electronic Design Automation (EDA) tools Ca- circuits, including essential parameters and actual output, can be valu-
dence Virtuoso [35], Micro-Cap [36], and HSpice [37] is employed able for training machine learning models. This data enables various
for training and testing. In this work, only 500 samples are used for applications such as predicting device performance, identifying faulty
training. components, fine-tuning circuits, and optimizing circuit design through
The training data for analog designs in Table 1 is generated by machine learning [4,5]. In VLSI design, many ML applications deal with
varying the process corners across tt, ss, ff, sf, fs corners; varying automating and optimizing circuit design and testing [2,4,6–8].
temperature within −55 ◦ C to 125 ◦ C in the steps of 5 ◦ C and varying Sufficient volume and superior data quality are vital in training
supply voltage with a ±10% deviation from the nominal value (1.8 V). precise machine learning models, thereby attaining optimal outcomes
For different circuits, different parameters are considered in Table 1 in these tasks. For example, biomedical devices such as active im-
plantable medical devices (AIMDs) cannot be tuned manually once
For digital cells in Table 2, the training data is obtained as a vector
implanted within a patient’s body. Instead, they can be fine-tuned by
of random values from the Gaussian distribution of each process param-
programming with new operational parameters [38]. ML can aid this
eter considering ±10% variations at 3𝜎 in CMOS standard cells at 22 nm
tuning process, but patient privacy limits data acquisition, hindering
High-K MGK through Predictive Technology Models (PTM). Twelve
proper model training.
process parameters (PMOS and NMOS) - Channel length, Transistor
In previous performance estimation works such as [8,39] authors
width, physical and electrical equivalent of oxide thickness, nominal
have achieved precise training with 15 K and 50k samples respectively.
gate oxide thickness, source/drain junction depth, and channel doping
Gathering such massive data required for training the ML model from
concentration are considered in this work. Along with these statistical
electronic components and circuits is a tremendous challenge. Follow-
distributions, random temperature samples ranging from −55 ◦ C to
ing concerns limit the data procurement and significantly contribute to
125 ◦ C and supply voltage with a ±10% deviation from the nominal
the complexity involved in gathering the necessary data for practical
value (0.8V) are included. Load capacitance is also varied similar to
ML model training in electronic systems:
process parameters. The rise/fall time for step input transition was
fixed at 10ps for all our experiments. Propagation delay estimations of 1. Concerns regarding privacy and the proprietary nature of the
CMOS cells with PVT (Process, supply voltage, temperature) variations data.
are carried out through HSPICE Monte-Carlo simulations to obtain the 2. Computational and power requirements associated with data
training data. acquisition.

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Fig. 3. Complete training process of GAN for circuit data. Refer to Fig. 2 for the validation step.

3. Practical difficulties and time constraints involved in obtaining Loss Function for GAN: GAN training process can be written as the
the data. following optimization objective:

The issue of insufficient data can be addressed by generating high- min max 𝐸𝑥∼𝑋 log(𝐷(𝑥)) + 𝐸𝑧∼𝑍 log(1 − 𝐷(𝐺(𝑧))). (1)
𝐺 𝐷
quality artificial data. This is exemplified in Table 5, where training
with artificial data demonstrates comparable results even with a large Here 𝑋 is the original real data, and 𝑍 is the latent variable
training dataset. Thus, data augmentation shows the potential for train- distribution. The above optimization objective translates to 𝐷, the dis-
ing and developing good ML models in VLSI design domain (refer criminator wanting to maximize the classification performance between
Fig. 1). real and artificial samples and G, the generator wanting to minimize the
same. The above Eq. (1) is the binary cross entropy loss between real
and artificial samples.
3. Data augmentation using generative adversarial networks
Practically, we would want to optimize both 𝐺 and 𝐷 separately at
(GANs)
each iteration:

3.1. Description of GAN architecture • Optimization objective for discriminator:

max 𝐸𝑥∼𝑋 log(𝐷(𝑥)) + 𝐸𝑧∼𝑍 log(1 − 𝐷(𝐺(𝑧))).

GANs are a type of generative machine learning model that tries to 𝐷
learn the data distribution and create synthetic data. GAN architecture
• Optimization objective for generator:
consists of two deep neural networks, one of which we call a generator,
and the other is called a discriminator. The training data, which is the min 𝐸𝑧∼𝑍 log(1 − 𝐷(𝐺(𝑧))).
𝐺
actual existing data, is referred to as real data, and the data generated
by GAN is referred to as artificial data here. But such a minimax game does not perform well in practice because
The generator has the task of creating the samples intended to come when the discriminator rejects the generator sample with high confi-
from the same distribution as the real data. The generator takes a dence then 𝐷(𝐺(𝑧)) = 0. Thus, the optimization objective for generator
random noise vector as input. This vector represents the latent features vanishes and the gradient for generator vanishes with it. Due to this
of the data generated. For example, this vector represents features like the generator is now stuck at poor performance.
shape and color for image data. The generator gives artificial samples
at the output. 3.2. Preventing mode collapse in GANs
The discriminator examines the samples from the generator and the
real samples and tells if they are real or artificial. Thus, we can say that Other deep learning models are trained to achieve a single min-
discriminator is just a conventional classifier that classifies input data ima, whereas GANs are trained to achieve equilibrium between two
into two classes: real or artificial. Discriminator, in this way, learns the networks working as adversaries. The model parameters may oscillate,
features of the real data. destabilize, and never converge, making the training unstable. Due to
Conceptually discriminator then provides feedback to the generator, this instability, a common issue faced in GANs is mode collapse [28,
which helps the generator create data resembling real data. Technically 30,31].
the generator is trained to develop data towards what the discriminator Different approaches have been proposed to address the problem of
thinks is real. Both networks are trained alternatively, and they com- mode collapse in GANs. Martin Arjovsky et al. proposed WGAN [30],
pete to improve themselves. Eventually, the discriminator identifies the where the objective function for training was changed to Wasserstein
tiny difference between the real and the generated, and the generator distance. Ishaan Gulrajani et al. proposed adding the gradient penal-
creates data such that the discriminator cannot differentiate anymore. ties in the objective function to enforce the Lipschitz constraint to
The GAN is then said to have reached convergence and now can improve the training of WGAN [31]. Various approaches used multiple
produce data resembling natural data. generators [40–42]. Unrolled GANs [43] were proposed to prevent

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Fig. 4. Performance of GAN model with different hidden layers w.r.t. Cadence for current reference circuit data.

Fig. 5. Here, 𝛼 represents the learning rate for ADAM optimizer. Performance of GAN model with three layers for Current reference dataset (see Table 1) for different learning
rates. Here, the error is calculated with respect to the EDA tool Cadence Virtuoso.

Fig. 6. Performance of GAN model with 3 layers and learning rate = 0.0005 w.r.t Cadence Virtuoso for Current reference dataset after applying spectral methods. Here, the error
is calculated with respect to the EDA tool Cadence Virtuoso.

the generator from overfitting for a particular discriminator. Input- Spectral normalization proposed by Takeru Miyato et al. [44] has pre-
based regularizations [31] had drawbacks while imposing regulariza- sented more promising results while tackling mode collapse in GANs.
tion on the space outside of the supports of the generator and data They target to find the discriminator 𝐷 from a set of 𝐾 Lipschitz
continuous functions to stabilize the training of the discriminator
distributions.
arg max 𝐹 (𝐺, 𝐷),
The standard form for GAN is given by Eq. (1), which can be further ‖𝑓 ‖𝑙𝑖𝑝 <𝐾

written as where ‖𝑓 ‖𝑙𝑖𝑝 is the Lipschitz constant of the discriminator function 𝑓 .

Their approach constrains the spectral norm of each discriminator layer
min max 𝐹 (𝐺, 𝐷), to control the Lipschitz constant of the overall discriminator function.
𝐺 𝐷

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Fig. 7. Performance of GAN models with spectral regularization for different analog circuit datasets.

Fig. 8. Comparison of the distribution of training dataset for current reference circuit and various generated datasets. KL divergence between data distributions from different
generators with respect to training data is also shown in the lower left. (KL divergence measures how one probability distribution differs from another.)

Spectral normalization as given by Takeru Miyato et al. [44] is as matrices go hand in hand; moreover, they demonstrated that spectral
follows collapse is the cause of mode collapse. They define spectral collapse as
the vanishing of many singular values of a matrix. Spectral collapse for
𝑊𝑆𝑁 (𝑊 ) ∶= 𝑊 ∕𝜎(𝑊 ),
a discriminator with spectral normalization can be explained as a con-
where 𝑊 is the weight matrix of a layer, 𝜎(𝑊 ) is the spectral norm siderable decrease of singular values of 𝑊𝑆𝑁 (𝑊 ) in the discriminator.
of the matrix 𝑊 , which is equivalent to the largest singular value of The weight matrix after applying singular value decomposition can be
𝑊 . They make sure that the Lipschitz constant of the discriminator represented as
function is bounded by normalizing weights of each layer such that
𝜎(𝑊𝑆𝑁 (𝑊 )) = 1. 𝑊 = 𝑈 ⋅𝛴 ⋅𝑉𝑇,
Kanglin Liu et al. [45] proposed spectral regularization to solve
the continuing mode collapse issue even in the Spectral Normalized where 𝑈 and 𝑉 are orthogonal matrix, and 𝛴 is given as
[ ]
GANs(SN-GANs) [44]. Spectral regularization is based on the observa- 𝐷 0
tion that mode collapse and spectral collapse in discriminator’s weight 𝛴= ,
0 0

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Fig. 9. Performance of GAN models with learning rate=0.0005 and spectral regularization, for delay datasets of different digital cells wrt HSPICE.

where 𝐷 represents spectral distribution of 𝑊 as follows 1. To compensate 𝐷, 𝛥𝐷 is found, where 𝛥𝐷 is given by

⎡𝜎1 − 𝜎1 … … … … 0⎤
⎡𝜎1 ⎤ ⎢ 0 ⋱ … … … ⋮⎥
⎢ ⎥ ⎢ ⎥
⋮ … 𝜎1 − 𝜎𝑖 … … ⋮⎥
𝐷=⎢
𝜎2 ⎥. 𝛥𝐷 = ⎢ .
⎢ ⋱ ⎥ ⎢ ⋮ … … 0 … ⋮⎥
⎢ ⎢ ⋮ ⎥
⎣ 𝜎𝑟 ⎥⎦ ⎢ … … … ⋱ ⋮⎥
⎣ 0 … … … … 0⎦

Here 𝑖 is a hyper-parameter such that

To avoid spectral collapse, the following steps are followed to obtain

spectral regularized weights: 1≤𝑖≤𝑟

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Fig. 10. Comparison of distribution of training dataset for comparator circuit and various generated datasets using a generator with three hidden layers and learning rate 0.0005
at different epochs. (Epoch with lowest percentage error highlighted in red.)

Fig. 11. Comparison of distribution of training dataset for OTA circuit and various generated datasets using a generator with three hidden layers and learning rate 0.0005 at
different epochs. (Epoch with lowest percentage error highlighted in red.)

2. 𝐷′ is formed from 𝐷 and 𝛥𝐷 We compared the performance of our GAN with spectral normaliza-
⎡𝜎1 … … … … 0⎤ tion and spectral regularization. To obtain quality data augmentation
⎢0 ⋱ … … … ⋮⎥ we use density distribution plots and calculate KL divergence between
⎢ ⎥ the distributions of generated data and training data to understand and
⋮ … 𝜎1 … … ⋮⎥
𝐷 = 𝐷 + 𝛥𝐷 = ⎢
′
.
⎢⋮ … … 𝜎𝑖+1 … ⋮⎥ compare the performance. Here, KL divergence is a measure of how one
⎢⋮ … … … ⋱ ⋮⎥ ⎥ probability distribution differs from another. We found spectral regu-
⎢
⎣0 … … … … 𝜎𝑟 ⎦ larization indeed delivers better results. The results are summarized in
the next section.
3. 𝑊 turns to 𝑊 ′ = 𝑊 + 𝛥𝑊 such that
[ ] [ ]
𝐷 0 𝛥𝐷 0
𝑊′ =𝑈 ⋅ ⋅𝑉𝑇 +𝑈 ⋅ ⋅𝑉𝑇.
0 0 0 0 4. Numerical experiments
[ ]
𝛥𝐷 0
where 𝛥𝑊 = 𝑈 ⋅ ⋅𝑉𝑇
0 0 4.1. Setup of experiments
4. To maintain Lipschitz continuity, spectral normalization is ap-
plied. Spectral regularized weights (𝑊𝑆𝑅 (𝑊 )) are obtained as We use Python-3.8.16 and Google Colab for the training of
follows
GAN models. Moreover, our implementation uses Keras-2.9.0 and
𝑊𝑆𝑅 (𝑊 ) = 𝑊 ′ ∕𝜎(𝑊 ) = (𝑊 + 𝛥𝑊 )∕𝜎(𝑊 ). Tensorflow-2.9.2.

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Fig. 12. Comparison of distribution of training dataset for delay in two input AND gate circuit and various generated datasets using a generator with three hidden layers and
learning rate 0.0005 at different epochs. (Epoch with lowest percentage error highlighted in red.)

Fig. 13. Comparison of distribution of training dataset for delay in NAND gate circuit and various generated datasets using a generator with three hidden layers and learning rate
0.0005 at different epochs. (Epoch with lowest percentage error highlighted in red.)

4.1.1. GAN architecture 4.1.2. VAE architecture

For each dataset, a GAN model consisting of a discriminator model For comparing with GAN, a VAE model is formed. The VAE archi-
and a generator model is formed. The discriminator and generator tecture consists of two neural networks: an encoder and a decoder,
models are neural networks with the same number of layers. The gen- designed with equal number of layers. The encoder receives real in-
erator network has input dimensions the same as the latent dimensions. put data and processes it through a series of dense layers, gradually
Input to the generator is randomly generated latent points. Generator reducing the number of units until it reaches a critical layer known
network has output dimensions the same as the dimensions of real
as the bottleneck layer. Within the encoder, this transformation aims
data points. Discriminator network has input dimensions the same as
to distill essential features from the input, ultimately computing the
the dimensions of real data points. Discriminator network has output
dimension of 1 for the output as classification into artificial or real. For mean and log variance values necessary for creating the latent space
the hidden layers, we have used the leaky ReLU activation function. representation. These values play a vital role in generating sampled
The output layer for the generator model uses a hyperbolic tangent representations used for data generation.
activation function, whereas, the output layer for the discriminator On the other side, the decoder, mirroring the layer count of the
model uses sigmoid activation. Both these networks in sequential form encoder, operates in reverse. It takes the latent space representation
create the GAN architecture. and gradually increases the number of units through its dense layers

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to reconstruct the original input data. The choice of using leaky ReLU good at generating only a few points from the entire training data
activation and batch normalization in the hidden layers is to prevent distribution. Thus, the generator generates only these points and suc-
issues like gradient vanishing and aid in the convergence of the network cessfully fools the discriminator. This is evident in Fig. 8, where the
during training. density distribution of generated data without spectral regularization
Together, these two networks(encoder and decoder) collaborate or normalization has peaked in some areas of training data only. This
seamlessly within the VAE framework, working in tandem to transform shows the generated data is less diverse. Also, the KL divergence is high
and reconstruct data by extracting meaningful features and decoding for the generated data distribution as observed in Fig. 8.
them back into their original form.
4.2.2. Effect of spectral normalization and spectral regularization for avoid-
4.1.3. Performance evaluation of GAN ing mode collapse
Assessing the performance of different GAN models is necessary to To deal with the issue of mode collapse, we experimented with
compare the quality of synthetic data generated. Numerous quantitative the spectral normalization proposed by Takeru Miyato et al. [44]
and qualitative measures have been suggested relating to the evaluation and spectral regularization proposed by Kanglin Liu et al. [45]. It is
and interpretation of generative models [46], for example, inception observed that both of these methods successfully avoid mode collapse
score, Frechet inception distance, average log-likelihood, Parzen win- in our models, as seen in the distribution plot in Fig. 8. The plots show
dow estimates, and visual fidelity. These measures have been proposed that although the error percentage is slightly more, the generated data
to focus on image data generation; moreover, a single standard cannot has a diverse distribution. The increase in error can be attributed to the
cover all facets of image generation. Thus, there is no concurrence absence of mode collapse.
regarding the best measure [46]. Theis et al. [47] also pointed out On comparing spectral regularization and spectral normalization,
that a model may perform well concerning a measure and not perform we found spectral regularization to be performing better with respect
well concerning others. They [47] also suggested that evaluation for to distribution plots (Fig. 8) as well as mean absolute percentage
generative models needs to be done directly in the context of the error, refer to Figs. 6(a) and 6(b). Moreover, Fig. 8 also confirms that
intended application. the Kl divergence for the data distribution generated using spectral
Thus keeping the above points in mind, GAN models for circuit regularization is lower than the KL divergence for the data distribution
data are evaluated directly with respect to the simulator, which is the generated using spectral normalization.
source of our data itself. We select a few features from the generated The GAN model with spectral regularization is trained on various
synthetic dataset and give them as input to the simulator. Let us call other similar datasets from different analog circuits (see Table 1) and
these features as input features and the remaining features as output digital cells (see Table 2). Fig. 7 shows a reduction in error with
features. Now we compare the output feature values from the simulator increasing epochs for data from other analog circuits, Fig. 9 shows the
and the generator. The metric for comparison in this work is the mean same for delay datasets from various digital cells. Table 4 shows the low
absolute percentage error. Fig. 2 shows the complete evaluation process percentage error obtained for various digital cells. Figs. 11, 10, 12 and
for artificially generated data. 13 show the distribution density plots fitting towards the training data
Very few real data samples(500 samples) are used for training distribution with increasing epochs for few circuits. These figures also
the GAN. Then, artificial data samples are generated using only the ensure that the GAN is free from mode collapse. Hence, we can infer
generator. Next, the GAN performance is evaluated using these artificial that the generated artificial data is of high quality and can be applied
samples, as shown in Fig. 2. The training is continued over epochs to other applications.
until satisfactory performance is achieved. Hyperparameters are tuned Moreover, an advantage in terms of generation speed is also ob-
in case of poor performance. Fig. 3 explains the complete experimental served as, simulator HSpice takes 6 s to evaluate the delays for 100
process for training the GAN on circuit data. datapoints for NOR3 cell, whereas GAN generates 100 samples in just
274 ms. Thus, it can be concluded that GAN can provide data at a far
4.2. Results higher speed than traditional simulators.

As discussed in previous section, the output feature values from 4.2.3. Comparative analysis of GAN with VAE
the generator and the simulator are compared to get the right idea of We compared the performance of GAN and VAE for the Current-
performance (see Figs. 4, 5, 6). Reference circuit dataset. For comparing the overall performance, av-
erage of mean absolute percentage error is calculated across all features
4.2.1. Hyperparameter search for each model. GAN performed noticeably better than VAE as observed
The hyper-parameter search is initiated by looking for the optimum in Table 3. It is observed that the best-performing GAN model success-
number of layers. The performance of the GAN model with varying fully beats the best-performing VAE model. Detailed evaluation results
numbers of hidden layers is observed in Fig. 4 and Table 3. of VAE can be referred to Appendix.
It is observed that increasing the number of hidden layers seems
too complex for the given data sets, and this benefits very little in 4.2.4. Experiments on complex circuits
decreasing the percentage error. Moreover, more layers will lead to As proposed earlier, data augmentation and synthetic data gen-
more computation time for calculating spectral values while using spec- eration can prove helpful for training good ML models for different
tral regularization or normalization. Hence, we reduced the number electronic designs. We experimented with training ML models for two
of layers. From Fig. 4, we find that there is no clear choice for the complex digital cells to prove the utility of the proposed artificial data.
number of hidden layers as two and three hidden layers both perform We compared the performance of the same model by training with very
well for all input features simultaneously. Whereas, in Table 3 three few real data samples (500 samples) and then training after adding the
hidden layers are observed to be best performing. Therefore, three synthetic data (1000 samples) to increase the training data size (total
hidden layers for the current reference dataset are used as a tradeoff data samples = 1500). It is observed that the model performs better
between model complexity and performance. For some datasets, two when we add artificial data samples. The above digital cells in Table 2
hidden layers with comparable performance are used. are the building blocks for various complex digital circuits. Thus, we
Next, we experiment with different learning rates. Fig. 5 shows that used the data generated for these basic cells for training ML models for
a learning rate of around 0.0005 provides a low percentage error for complex digital cells.
all the features simultaneously. On further investigation, it is found We used ISCAS benchmark C17 circuit and a 4-bit ripple carry adder
that the GAN suffers from mode collapse, i.e., the model becomes for our experiments. We tested a gradient-boosting regression model

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Table 4
Percentage error obtained for different digital cell datasets used in this work. Here, the error is calculated with respect to the HSPICE.
Delay dataset Mean absolute percentage error
delay lh delay hl delay lh delay hl delay lh delay hl delay lh delay hl
node a node a node b node b node c node c node d node d
NOT gate 7.00 5.81 – – – – – –
Two input NAND gate 5.43 6.01 6.06 6.52 – – – –
Two input AND gate 5.75 5.26 6.42 5.81 – – – –
Two input NOR gate 7.30 4.87 7.34 5.36 – – – –
Two input OR gate 6.05 5.77 5.49 6.37 – – – –
Two input XOR gate 5.83 5.90 5.25 4.63 – – – –
Three input AND-OR circuit 8.85 7.25 6.80 8.05 5.9 8.74 – –
Full adder 4.50 4.54 4.24 3.57 3.80 3.30 – –
2:1 Multiplexer 5.37 4.38 5.45 4.78 5.84 5.58 – –
Three input NAND gate 9.15 4.44 8.71 4.27 8.37 6.19 – –
Three input AND gate 5.41 5.10 4.64 4.64 5.41 4.19 – –
Three input NOR gate 7.09 4.32 6.62 4.25 7.41 4.37 – –
Four input AND-OR circuit (AO22) 5.13 3.71 4.60 4.13 5.50 4.15 5.01 4.77
Four input AND-OR circuit (AO31) 5.40 4.91 5.50 6.11 5.15 5.42 5.48 6.04

Note: ‘delay lh node a’ stands for the propagation delay when a goes from low to high logic level i.e., 0 to 1. Similarly, ‘delay hl node a’ stands for the propagation delay when
a goes from high to low logic level i.e., 1 to 0.

Table 5
Comparison of percentage error w.r.t. simulated delay for the predicted delay in complex digital cells. Here 𝑇𝑠𝑑 is the simulated delay, 𝑇𝑝𝑑 is the predicted delay. (The error
reported in [8] is included here solely for reference purposes and is not intended for direct comparison.)
Complex digital circuit 𝑇𝑠𝑑 (ps) [22 nm 𝑇𝑝𝑑 with real 𝑇𝑝𝑑 with real + Error in 𝑇𝑝𝑑 with Error in 𝑇𝑝𝑑 with real Reported error
CMOS] data (ps) [22 nm artificial data (ps) real data (%) + artificial data (%) in 𝑇𝑝𝑑 in [8] (%)
CMOS] [22 nm CMOS] [22 nm CMOS] [22 nm CMOS] [16 nm CMOS]
ISCAS C17 10.7 11 10.6 3.08 0.65 1.1
4-bit ripple carry adder 41 43.1 42 5 2.4 1.4

Table 6
Percentage error obtained for some digital cell datasets used in this work for VAE. Here, the error is calculated with respect to the HSPICE.
Delay dataset Mean absolute percentage error
delay lh delay hl delay lh delay hl delay lh delay hl delay lh delay hl
node a node a node b node b node c node c node d node d
NOT gate 36.37 30.31 – – – – – –
Two input NOR gate 8.01 5.25 5.04 9.91 – – – –
2:1 Multiplexer 5.65 5.26 6.83 6.09 4.54 3.88 – –
Four input AND-OR circuit (AO31) 3.52 3.91 3.04 3.82 3.09 3.87 8.25 4.03

Note: ‘delay lh node a’ stands for the propagation delay when a goes from low to high logic level i.e., 0 to 1. Similarly, ‘delay hl node a’ stands for the propagation delay when
a goes from high to low logic level i.e., 1 to 0.

to predict the delays for the complex cells. After training on data, the evaluate the quality of generated data. Spectral regularization has been
model predicted the delay for individual digital blocks/gates in the cell, used to avoid mode collapse in GAN. Artificial data has been generated
which we used to find the overall delay in the cell. As shown in Table 5, and tested for six analog circuits and fourteen basic digital cell designs.
we find a decrease in percentage error for predicted delay when we use The experimental results confirm a low mean absolute percentage error
the artificial data in addition to actual data for training the ML model for the generated data. The proposed artificial data has finally been
for the circuits. Table 5 shows the decrease is more than 50% of the applied to gradient-boosting regression models for predicting delays in
original error. the ISCAS benchmark C17 circuit and a four-bit ripple carry adder. The
simulation results show a reduction in model percentage error by more
5. Conclusion than 50% of the previous percentage error when additional artificial
data is used for training.
This paper presents an artificial data generation method for circuits The proposed methodology for generating artificial data has the
to aid the training of ML models for design automation, tuning, op- potential to be applied to many other circuit designs and provide
timization, etc. Model accuracy is heavily dependent on the quantity greater accuracy to ML models, especially when the training data is
and quality of training data, but large amounts of training data for scarce and is challenging to obtain.
electronic circuits can be computationally expensive or practically dif-
ficult to obtain. The generated synthetic data is beneficial for training CRediT authorship contribution statement
the models when the training data is scarce. GANs have been used in
image and audio data modality and have provided promising results in Prasha Srivastava: Conceptualization, Methodology, Validation,
terms of quality and speed. This work adapts GAN to create artificial Formal analysis, Investigation, Writing – original draft, Writing –
data for various electronic circuits. The training data are obtained by review & editing, Data curation. Pawan Kumar: Conceptualization,
various simulations in the Cadence Virtuoso, HSPICE, and Microcap Methodology, Supervision, Validation, Formal analysis. Zia Abbas:
design environment with TSMC 180 nm and 22 nm CMOS technology Conceptualization, Methodology, Supervision, Resources, Supervision,
nodes. An evaluation methodology using the simulators is proposed to Project administration, Funding acquisition.

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P. Srivastava et al. Integration 97 (2024) 102186

Fig. 14. Performance of VAE model with different hidden layers w.r.t. Cadence for current reference circuit data.

Fig. 15. Here, 𝛼 represents the learning rate for ADAM optimizer. Performance of VAE model with seven layers for Current reference dataset (see Table 1) for different learning
rates. Here, the error is calculated with respect to the EDA tool Cadence Virtuoso.

Fig. 16. Performance of VAE models for few other analog circuit datasets.

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P. Srivastava et al. Integration 97 (2024) 102186

Fig. 17. Performance of VAE models with learning rate = 0.0005, for delay datasets of different digital cells wrt HSPICE.

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