COA PAPER-WINTER-2022

1Q(a)
Q: What is binary and decimal equivalent of F8 hexadecimal value?
Ans:
F = 1111
8 = 1000
SO,The binary equivalent of F8 hexadecimal value is 11111000
(11111000)₂ = (1 × 2⁷) + (1 × 2⁶) + (1 × 2⁵) + (1 × 2⁴) + (1 × 2³) + (0 × 2²) + (0 × 2¹) + (0 × 2⁰)
= 128 + 64 +32 +16+8
= 248
So,The decimal equivalent of F8 hexadecimal value is 248
1Q(b)
Q: Write Steps for two n digit numbers subtraction in base r.
Ans:
To subtract two n-digit numbers in base r, follow these steps:
1. Line up the digits of the two numbers by placing the digits of both numbers in the same column.
2. Start from the rightmost digit and subtract the digits of the second number from the digits of the first
number in the same column. If the digit in the first number is smaller than the digit in the second
number, borrow 1 from the next column.
3. Repeat step 2 for each column until all digits have been subtracted.
4. Write the result of each subtraction below the line, keeping the digits aligned.
5. If there are any borrow operations in step 2, subtract the borrowed value from the digit in the next
higher column.
6. Repeat step 5 until there are no more borrow operations.
7. The final result is the difference of the two numbers.
For example, to subtract 5479 from 8923 in base 10, we would follow these steps:

So the difference of 8923 and 5479 is 3444.

1Q(c)
Q: List and explain Memory reference instructions in detail.
ANS:
• Memory reference instructions are those commands or instructions which are in the custom to
generate a reference to the memory and approval to a program to have an approach to the
commanded information and that states as to from where the data is cache continually. These
instructions are known as Memory Reference Instructions.
There are seven memory reference instructions which are as follows &
AND
• Description: Performs a bitwise AND operation between the value in memory and a register, and
stores the result in a register.
• Syntax: AND destination_register, source_register, [address]
• Example: AND R1, R2, [0x2000] – Perform a bitwise AND between the value at memory address
0x2000 and the value in register R2, store the result in register R1.
ADD
• Description: Adds the value from memory to a register and stores the result in a register.
• Syntax: ADD destination_register, source_register, [address]
• Example: ADD R1, R2, [0x2000] – Add the value at memory address 0x2000 to the value in
register R2, store the result in register R1.
LDA
• Description: Loads data from memory into a register.
• Syntax: LDR destination_register, [address]
• Example: LDR R1, [0x2000] – Load the value at memory address 0x2000 into register R1.
STA
• Description: Stores data from a register into memory.
• Syntax: STR source_register, [address]
• Example: STR R1, [0x2000] – Store the value in register R1 into memory address 0x2000
BUN
• The Branch Unconditionally (BUN) instruction can send the instruction that is determined by the
effective address.
• They understand that the address of the next instruction to be performed is held by the PC and it
should be incremented by one to receive the address of the next instruction in the sequence.
• If the control needs to implement multiple instructions that are not next in the sequence, it can
execute the BUN instruction.
BSA
• BSA stands for Branch and Save return Address.
• These instructions can branch a part of the program (known as subroutine or procedure).
• When this instruction is performed, BSA will store the address of the next instruction from the PC
into a memory location that is determined by the effective address.
ISZ
• The Increment if Zero (ISZ) instruction increments the word determined by effective address.
• If the incremented cost is zero, thus PC is incremented by 1.
• A negative value is saved in the memory word through the programmer.
• It can influence the zero value after getting incremented repeatedly.
• Thus, the PC is incremented and the next instruction is skipped.
2Q(a)
Q: What is arithmetic micro operation?
ANS:The Arithmetic Micro-operations deals with the operations performed on numeric data stored in the
registers.
The basic Arithmetic Micro-operations are classified in the following categories:
1. Addition
2. Subtraction
3. Increment
4. Decrement
5. Shift
Some additional Arithmetic Micro-operations are classified as:
1. Add with carry
2. Subtract with borrow
3. Transfer/Load, etc.
The following table shows the symbolic representation of various Arithmetic Micro-operations.
Symbolic Representation Description

R3 ← R1 + R2 The contents of R1 plus R2 are transferred to R3.

R3 ← R1 - R2 The contents of R1 minus R2 are transferred to R3.

R2 ← R2' Complement the contents of R2 (1's complement)

R2 ← R2' + 1 2's complement the contents of R2 (negate)

R3 ← R1 + R2' + 1 R1 plus the 2's complement of R2 (subtraction)

R1 ← R1 + 1 Increment the contents of R1 by one

R1 ← R1 - 1 Decrement the contents of R1 by one

2Q(b)
Q: What is RAM and ROM?
ANS:
• RAM
o Random Access Memory (RAM) is a type of computer memory that is used to temporarily
store data that the computer is currently using or processing.
o RAM is volatile memory, which means that the data stored in it is lost when the power is
turned off.
o RAM is typically used to store the operating system, application programs, and data that the
computer is currently using.
o DRAM: Dynamic RAM, is made of capacitors and transistors, and must be refreshed every
10~100 ms. It is slower and cheaper than SRAM.
o SRAM: Static RAM, has a six transistor circuit in each cell and retains data, until powered
off.
o NVRAM: Non-Volatile RAM, retains its data, even when turned off. Example: Flash
memory.

• ROM
o Read Only Memory (ROM) is a type of computer memory that is used to permanently store
data that does not need to be modified.
o ROM is non-volatile memory, which means that the data stored in it is retained even when
the power is turned off.
o ROM is typically used to store the computer’s BIOS (basic input/output system), which
contains the instructions for booting the computer, as well as firmware for other hardware
devices.
o It also stores the bootstrap loader program, to load and start the operating system when
computer is turned on. PROM(Programmable ROM), EPROM(Erasable PROM)
and EEPROM(Electrically Erasable PROM) are some commonly used ROMs.
2Q(c)
Q: Draw and explain working of 4 bit binary adder.
ANS: ALREAY DONE IN SUMMER-PAPER-2023
 2Q(c)OR
Q: State and Explain any seven logic micro operation.
ANS:
1. AND:
• This micro operation performs a logical AND operation on the corresponding bits of two
operands.
• The result of the operation is 1 if and only if both bits are 1, otherwise the result is 0.
• The truth table of the AND operation is as follows:
A B A&B

0 0 0

0 1 0

1 0 0

1 1 1

2. OR:
• This micro operation performs a logical OR operation on the corresponding bits of two
operands.
• The result of the operation is 0 if and only if both bits are 0, otherwise the result is 1.
• The truth table for OR operation is:
A B Output

0 0 0

0 1 1

1 0 1

1 1 1

3. Complement:
• This micro operation performs a logical NOT operation on the bits of an operand. The result
of the operation is the complement of the operand bit.
• Example: t2 = A’
4. XOR:
• This micro operation performs a logical XOR (exclusive OR) operation on the corresponding
bits of two operands.
• The result of the operation is 1 if and only if the bits are different, otherwise the result is 0.
• The truth table for XOR operation is:
Input A Input B Output

0 0 0
 0 1 1

1 0 1

1 1 0

5. Shift:
• This micro operation shifts the bits of an operand either to the left or right. The direction of
the shift is determined by a control signal.
6. Rotate:
• This micro operation rotates the bits of an operand either to the left or right. The rotated out
bits are inserted back into the operand on the opposite side. The direction of the rotation is
determined by a control signal.
7. Clear:
• This micro operation clears (sets to 0) the bits of an operand.
With two binary variables and four logic micro-operation we can perform 16 logic miceo-operation.

3Q(a)
Q: List out Register for basic computer.
ANS: ALREAY DONE IN SUMMER-PAPER-2023
 3Q(b)
Q: Explain register reference instruction format.
ANS:
• These instructions perform operations on registers rather than memory addresses.
• The IR(14 – 12) is 111 (differentiates it from memory reference) and IR(15) is 0 (differentiates it
from input/output instructions).
• The rest 12 bits specify register operation.

• Example – IR register contains = 0111001000000000, i.e. CMA after fetch and decode cycle we find
out that it is a register reference instruction for complement accumulator.
Mnemonic Description
CLA Clear AC register
INC Increment AC register
CLE Clear E
CMA Complement AC
CIR Circulate right AC and E
CIL Circulate left AC and E
CME Complement E bit
SPA Skip next instruction if content of AC register are
+ve
SNA Skip next instruction if content of AC register are -
ve
SZA Skip next instruction if content of AC register are
Zero
SZE Skip next instruction if bit E = 0
HLT Stop processing and halt the computer

3Q(c)
Q: Explain register transfer using block diagram and timing diagram.
ALREAY DONE IN mid sem question bank

3Q(a)OR
Q: Draw and explain control unit diagram for basic computer
ALREAY DONE IN mid sem question bank
 3Q(b)OR
Q: State various phases of instruction cycle

The major phases of instruction cycle are:

1. Fetch: In the fetch cycle, the CPU retrieves the instruction from memory. The instruction is typically
stored at the address specified by the program counter (PC). The PC is then incremented to point to
the next instruction in memory.
2. Decode: In the decode cycle, the CPU interprets the instruction and determines what operation needs
to be performed. This involves identifying the opcode and any operands that are needed to execute
the instruction.
3. Execute: In the execute cycle, the CPU performs the operation specified by the instruction. This may
involve reading or writing data from or to memory, performing arithmetic or logic operations on
data, or manipulating the control flow of the program.
4. There are also some additional steps that may be performed during the instruction cycle, depending
on the CPU architecture and instruction set:
5. Fetch operands: In some CPUs, the operands needed for an instruction are fetched during a separate
cycle before the execute cycle. This is called the fetch operands cycle.
6. Store results: In some CPUs, the results of an instruction are stored during a separate cycle after the
execute cycle. This is called the store results cycle.
7. Interrupt handling: In some CPUs, interrupt handling may occur during any cycle of the instruction
cycle. An interrupt is a signal that the CPU receives from an external device or software that requires
immediate attention. When an interrupt occurs, the CPU suspends the current instruction and
executes an interrupt handler to service the interrupt.
3Q(c)OR
Q: Explain any four input output reference instruction.
Ans:
Input/output (I/O) instructions are used to transfer data between the processor and I/O devices. Here are four
examples of I/O reference instructions:
1. IN (Input): This instruction is used to transfer data from an input device, such as a keyboard or a
mouse, to the processor. The instruction specifies the address of the input port from which the data is
to be read.
2. OUT (Output): This instruction is used to transfer data from the processor to an output device, such
as a printer or a display. The instruction specifies the address of the output port to which the data is
to be written.
3. EI (Enable Interrupts): This instruction is used to enable interrupts, which allow the processor to
respond to external events, such as user input or the completion of an I/O operation.
4. DI (Disable Interrupts): This instruction is used to disable interrupts, which prevent the processor
from responding to external events. This is useful in situations where the processor needs to
complete a critical task without interruption.

4Q(a)
Q:(a) Draw flowchart of first pass assembler.
ANS: ALREAY DONE IN SUMMER-PAPER-2023
 4Q(b)
Q:(b) Write assembly language program to add two numbers.
ANS:

4Q(c)
Q:(c) Write assembly language program to multiply two numbers.
Ans:
After the semicolon is comment for understanding

4Q(a)OR
Q: What is address sequencing?
ANS:
• Address sequencing refers to the process of generating memory addresses in a sequential manner
during the execution of a computer program.
• It involves the generation of a sequence of memory addresses that correspond to the locations in
memory where the instructions and data of a program are stored.
• Address sequencing is an important aspect of the instruction cycle and is controlled by the
instruction fetch and decode phase of the processor.
 • It involves the calculation of the address of the next instruction to be fetched and the transfer of that
address to the memory unit.
• The address sequencing process is usually performed by the control unit of the processor, which
generates and manages the sequence of memory addresses required by the program.

• The diagram shows the block diagram of a control memory and its associated hardware to support in
choosing the next microinstruction.
• The microinstruction present in the control memory has a set of bits that facilitate to start off the
micro-operations in registers.
• There are four different directions are showed in the figure from where the control address register
recovers its address
• The CAR is incremented by the incrementer and selects the next instruction. In multiple fields of
microinstruction, the branching address can be determined to result in branching.
• It can specify the condition of the status bits of microinstruction, conditional branching can be
applied.
• A mapping logic circuit can share an external address. A special register can save the return address
so that when the microprogram needs to return from the subroutine, it can need the value from the
unique register.

4Q(b)OR
Q: Write assembly language program to subtract one number from other
number.
Ans: ALREAY DONE IN SUMMER-PAPER-2023
 4Q(c)OR
Q: Explain booth’s multiplication algorithm with example.
ANS: Booth’s multiplication algorithm is an algorithm used for multiplying two binary numbers. It was
invented by Andrew Donald Booth in 1950.
The steps of Booth’s multiplication algorithm are as follows:
1. Set the Multiplicand and Multiplier binary bits as M and Q, respectively.
2. Initially, we set the AC and Qn + 1 registers value to 0.
3. A Qn represents the last bit of the Q, and the Qn+1 shows the incremented bit of Qn by 1.
4. On each cycle of the booth algorithm, Qn and Qn + 1 bits will be checked on the following parameters
as follows:
i. When two bits Qn and Qn + 1 are 00 or 11, we simply perform the arithmetic shift right
operation (ashr) to the partial product AC. And the bits of Qn and Qn + 1 is incremented by 1
bit.
ii. If the bits of Qn and Qn + 1 is shows to 01, the multiplicand bits (M) will be added to the AC
(Accumulator register). After that, we perform the right shift operation to the AC and QR bits
by 1.
iii. If the bits of Qn and Qn + 1 is shows to 10, the multiplicand bits (M) will be subtracted from
the AC (Accumulator register). After that, we perform the right shift operation to the AC and
QR bits by 1.
5. The operation continuously works till we reached n - 1 bit in the booth algorithm.
6. Results of the Multiplication binary bits will be stored in the AC and QR registers.
EXAMPLE: Mutliple of +(7) and +(3)
Here no register size given so assume 4 bits
M = (7)10 → (0111)2
Q = (3)10 → (0011)2
From flowchat AC = AC-M , If we want to ignore subtraction then we have to find -M
-M = 2’s complement of M
-M = 1001

AC Q Q-1 Operation Understanding

part
First cycle 0000 0011 0 (1) Q = 1 Q-1 = 0 1) checking the
AC = AC -M value of Q and
0000 Q-1 depending up the
+1001 value of q and a-1
1001 0011 0 1001 operation will
1100 1001 1 (2) Arithmetic performedFrom
shift right(ASR) flow chat

2)Shifting
operation
Second cycle 1110 0100 1 (1) Arithmetic 1)Shifting
shift right(ASR) operation
Third cycle 0101 0100 1 (1) Q = 0 Q-1 = 1 1) same first
AC = AC 1M cycle
0000 understanding
+0111 part
0101
0010 1010 0 (2) Arithmetic
shift right(ASR)
Fourth cycle 0001 0101 0 (1) Arithmetic
shift right(ASR)
Final ans (00010101)2 = (21)10
7*3 = 21
booth’s FLOW CHART:

5Q(a)
Q: Explain register stack.
ANS:
• A register stack is a type of computer memory organization that uses registers instead of memory
locations for storing data temporarily
• . In this memory organization, the registers are arranged in a stack-like structure, with the top register
serving as the current stack pointer.
• The register stack can be used for performing operations such as subroutine calls, nested subroutine
calls, and other operations that require temporary storage of data.
• The register stack is faster than the main memory since it takes less time to access the register as
compared to accessing the memory.
• In a register stack, the push operation stores data in the top register and increments the stack pointer,
whereas the pop operation retrieves data from the top register and decrements the stack pointer.
• The register stack is often used in microcontrollers and embedded systems due to its speed and
simplicity.
• However, the register stack has limited capacity since the number of registers in a computer is
usually small.
• In addition, the register stack is volatile, which means that the data stored in the stack is lost when
the power is turned off.
• As a result, the register stack is only suitable for storing temporary data and not for permanent
storage.
 5Q(b)
Q: What is difference between two address and three address instructions?
ANS:
THREE-ADDRESS INSTRUCTION TWO-ADDRESS INSTRUCTION
It has four fields. It has three fields.
It has one field for opcode and three fields for It has one field for opcode and two fields for address.
address.
It has long instruction length. It has shorter instruction.
It is slower accessing location inside It is faster accessing location inside processor than
processor than memory. memory.
There is distinct address fields for destination There is one address field common for destination and
and source. source.
In 3-address format, destination address can While in 2-address format, destination address can
not contain operand. have operand.
In 3-address format, instructions are less. While in 2-address format, instructions are more.
It generally requires three memory access. It generally requires two memory access but in some
cases it requires three memory access too.
In 3-address format, three memory access is While in 2-address format, it eliminated three memory
required. access but not completely.

5Q(c)
Q: Write a note on asynchronous data transfer.
ANS:
• Asynchronous data transfer refers to a method of transferring data between two devices or
components where the timing of the data transmission is not synchronized by a common clock
signal.
• Instead, data is transferred based on the availability of data at the sender and the readiness of the
receiver to accept the data.
• Asynchronous data transfer is commonly used in various communication systems, serial interfaces,
and networking protocols. Here's a detailed note on asynchronous data transfer:
• These two methods can achieve this asynchronous way of data transfer:
o Strobe control: A strobe pulse is supplied by one unit to indicate to the other unit when
the transfer has to occur.
o Handshaking: This method is commonly used to accompany each data item being
transferred with a control signal that indicates data in the bus. The unit receiving the data
item responds with another signal to acknowledge receipt of the data.

1. Strobe Control Method

• The Strobe Control method of asynchronous data transfer employs a single control line to time each
transfer.
• This control line is also known as a strobe, and it may be achieved either by source or destination,
depending on which initiate the transfer.
 o Source initiated strobe: In the below block diagram, you can see that strobe is initiated by
source, and as shown in the timing diagram, the source unit first places the data on the data
bus.

o Destination initiated strobe: In the below block diagram, you see that the strobe initiated by
destination, and in the timing diagram, the destination unit first activates the strobe pulse,
informing the source to provide the data.

o
2. Handshaking Method
• This method is commonly used to accompany each data item being transferred with a control
signal that indicates data in the bus. The unit receiving the data item responds with another
signal to acknowledge receipt of the data.

o Source initiated handshaking: In the below block diagram, you can see that two
handshaking lines are "data valid", which is generated by the source unit, and "data
accepted", generated by the destination unit.
o Destination initiated handshaking: In the below block diagram, you see that the two
handshaking lines are "data valid", generated by the source unit, and "ready for data"
generated by the destination unit.
Note that the name of signal data accepted generated by the destination unit has been changed
to ready for data to reflect its new meaning.
 5Q(a)OR
Q: What is difference between direct and indirect addressing mode?
ANS:
Parameters Direct Addressing Mode Indirect Addressing Mode
Address Field Address field contains the effective Address field contains reference of effective
address of operand. address.
Memory Requires only one memory reference Requires two memory references
References
Processing This addressing mode has fast It is slower than direct addressing mode.
Speed addressing compared to indirect
addressing mode
Classification No further classification Further classified into two categories-
Memory Indirect and Register Indirect
Addressing Mode.
Calculation No further calculation is required to Requires further calculation to find the
perform the operation. effective address.
Address Space It occupies a smaller amount of space It occupies a large amount of space than the
than the indirect mode. direct mode.
Overhead No additional overhead is involved Additional overhead is involved while
while searching for operand. searching for operand.
Advantage Easy as no intermediary is involved. Availability of large address space.
Disadvantage Address space is restricted. Requires more number of memory
references.
Application It aids in accessing static data and It assists in passing arrays as parameters and
using variables. implementing pointers.

5Q(b)OR
Q: Explain arithmetic pipeline.
ANS:
• Arithmetic Pipelines are mostly used in high-speed computers.
• They are used to implement floating-point operations, multiplication of fixed-point numbers, and
similar computations encountered in scientific problems.
• To understand the concepts of arithmetic pipeline in a more convenient way, let us consider an
example of a pipeline unit for floating-point addition and subtraction.
• The inputs to the floating-point adder pipeline are two normalized floating-point binary numbers
defined as:
o X = A * 2a = 0.9504 * 103
o Y = B * 2b = 0.8200 * 102
• Where A and B are two fractions that represent the mantissa and a and b are the exponents.
• The combined operation of floating-point addition and subtraction is divided into four segments.
Each segment contains the corresponding suboperation to be performed in the given pipeline. The
suboperations that are shown in the four segments are:
1. Compare the exponents by subtraction.
2. Align the mantissas.
3. Add or subtract the mantissas.
4. Normalize the result.
• The following block diagram represents the suboperations performed in each segment of the
pipeline.
 5Q(c)OR
Q: Write a short note on virtual memory.
ANS:

• Virtual memory is a technique used in computer systems to allow programs to access more memory
than is physically available. It is a memory management technique that involves the use of secondary
storage, such as a hard disk, to simulate additional main memory.
• In virtual memory, each program is divided into a series of pages, with each page being loaded into
main memory only when it is needed.
• When a page is not needed, it can be swapped out to the hard disk, freeing up main memory for other
programs to use.
• This allows programs to use more memory than is physically available and enables efficient sharing
of memory between multiple programs.
• The operating system maintains a page table, which keeps track of which pages are currently in main
memory and which pages are on disk.
• When a program attempts to access a page that is not currently in main memory, a page fault occurs
and the operating system retrieves the required page from disk, updates the page table, and restarts
the instruction that caused the page fault.
• Virtual memory has several benefits, including:
o It allows programs to access more memory than is physically available, which can increase
system performance and enable the execution of larger programs.
o It enables efficient sharing of memory between multiple programs, reducing the overall
memory requirements of the system.
o It provides a level of protection for programs, as each program has its own virtual address
space that is isolated from other programs.
• However, virtual memory can also have performance drawbacks, as the process of swapping pages
between main memory and disk can be slow.
• In addition, it requires additional overhead in the form of the page table and page fault handling.