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Unit 2 Logic Gates

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24 views14 pages

Unit 2 Logic Gates

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© © All Rights Reserved
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Logic gates

Logic Gates

Introduction
In the computers, these Boolean operations are performed by logic gates.

Elementary logic gates


Gates are digital (two-state) circuits because the input and output signals are
either low voltage (denotes 0) or high voltage (denotes 1).

A gate is an electronic circuit which operates on one or more signals and


always produces an output signal.

Gates are classified into two types.


(a) Basic gates
(b) Derived gates
(a) Basic gates
There are three basic logic gates:
1. NOT gate (inverter)
2. OR gate
3. AND gate
(b) Derived gates
There are four derived gates:
1. NOR gate
2. NAND gate
3. XOR gate (Exclusive OR gate)
4. XNOR gate (Exclusive NOR gate)
Inverter (NOT gate)
An inverter is also called a NOT gate, because the output is not the same
as the input. The output is the complement (opposite) of the input.

Mr. Guruprasad T R, Faculty, Dept. Of CS Page 1


Logic gates

An Inverter is a gate with only one input signal and one output
signal; the output state is always the opposite of the input state.

X X

X X
X X
0 1
Low High
1 0
High Low

A low input i.e., 0 produces high output i.e., 1 and vice versa. NOT operation
is symbolized as or i.e., NOT X is written as X1 or X.
OR Gate

The OR gate has two or more input signals but only one output signal. If any of
the input signals is 1 (high), the output signal is 1 (high). The output is 0(low)
when all inputs are 0(low).

Following tables show OR action:


X Y Z F=X+Y+Z
0 0 0 0
X Y F=X+Y
0 0 1 1
0 0 0
0 1 0 1
0 1 1
0 1 1 1
1 0 1
1 0 0 1
1 1 1
1 0 1 1
Table 3.3 Truth table for 1 1 0 1
1 1 1 1
2-input OR gatea
Table 3.4 Truth Table for three input OR gate
The symbol for OR gate is given below:

A A A
F B F B F
B C C
D

OR operation is symbolized as + i.e., X or Y is written as X+Y.


AND gate
The AND Gate can have two or more input signals and produce oneoutput signal.
When all the inputs are high then the output is high. If any one of the input is
0(low) the output is low.

Mr. Guruprasad T R, Faculty, Dept. Of CS Page 2


Logic gates
Thus, the AND represents the logical multiplication.

X Y F=X.Y X Y Z F=X.Y.Z

0 0 0 0 0 0 0
0 0 1 0
0 1 0 0 1 0 0
1 0 0 0 1 1 0
1 0 0 0
1 1 1 1 0 1 0
Table 3.5: 2- input AND gate 1 1 0 0
1 1 1 1

Table 3.6: 3-input AND gate


The symbol for AND is

A A A
F B F B
B F
C
C D

AND operation is symbolized as X AND Y is written as X.Y


Derived gates
NOR Gate
NOR gate is nothing but NOT OR gate or inverted OR gate. This means, an
OR gate is always followed by a NOT gate to give NOR gate.

The NOR gate has two or more input signals but only one output signal. If all the
inputs are 0 (low), then the output signal is 1 (high). If anyone of the input is
1(high), then the output is 0(low).

X Y F = X+Y
0 0 1
X Y Z F=X+Y+Z
0 1 0
0 0 0 1
1 0 0
0 0 1 0
1 1 0 0 1 0 0
Table 3.7: 2-input NOR gate 0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
Table 3.8: 3-input NOR gate 1 1 1 0

Mr. Guruprasad T R, Faculty, Dept. Of CS Page 3


Logic gates

NOR operation is symbolized as i.e., X NOR Y is written as X + Y.

(a)

(b) (c) (d)


NAND Gate
NAND gate is NOT AND gate
or inverted AND gate. This means,
an AND gate is always followed by
a NOT gate to give NAND gate.
The NAND Gate has two or more input signals but only one output signal. If all
of the inputs are 1 (high), then the output produced is 0 (low). If anyone of
the input is 0(low) then the output is 1(high).

NAND action is illustrated in following Truth Tables (2.9 and 2.10)


X Y F = XY
0 0 1
0 1 1 X Y Z F = XYZ
1 0 1
1 1 0 0 0 0 1
0 0 1 1
Table 3.9: Truth table of 2-input NAND gate 0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
Table 3.10 Truth table of 3-input NAND gate

The logical meaning of NAND gate can be shown as follows:


NAND operation is symbolized as i.e., X NAND Y is written as X.Y.
XOR Gate or Exclusive-OR Gate
The XOR Gate can also have two or more inputs, but produces one output
signal.
 Accepts two or more inputs and produces single output.
 The output is 0 if there are even number of 1’s in the inputs.
 The output is 1 if there are odd number of 1’s in the inputs.

In Boolean algebra,  sign stands for XOR operation. Thus, A XOR B can
Mr. Guruprasad T R, Faculty, Dept. Of CS Page 4
Logic gates
be written as AB.
Following Truth Tables (2.11 and 2.12) illustrates XOR operation.

No. of 1’s X Y Z = AB No. of 1’s X Y Z F


Even/odd Even 0 0 0 0
Even 0 0 0 Odd 0 0 1 1
Odd 0 1 1 Odd 0 1 0 1
Odd 1 0 1 Even 0 1 1 0
Even 1 1 0 Odd 1 0 0 1
Even 1 0 1 0
Table 3.11 Truth table of 2-input XOR Even 1 1 0 0
gate
Odd 1 1 1 1

Table 3.12 3 input XOR gate

The symbols of XOR gates are given below:

XOR addition can be summarized as following:


0 0 = 0; 0  1 = 1; 1 0 = 1; 1 1 = 0
The operation representing XOR may be written as F = xy = x y + xy

XNOR Gate or Exclusive NOR Gate


An XOR gate is followed by a NOT gate (inventor) becomes XNOR gate.
Thus, The XNOR Gate is logically equivalent to an inverted XOR gate.
 Accepts two or more inputs and produces single output.
 The output is 0 if there are odd number of 1’s in the inputs.
 The output is 1 if there are even number of 1’s in the inputs.

Following truth tables 2.13 and No. of 1’s X Y Z F


2.14 illustrate XNOR action.
Even 0 0 0 1
No. of 1’s X Y F
Odd 0 0 1 0
Even/odd
Odd 0 1 0 0
Even 0 0 1
Odd 0 1 0 Even 0 1 1 1
Odd 1 0 0 0
Odd 1 0 0
Even 1 0 1 1
Even 1 1 1
Even 1 1 0 1
Table 3.13 2 input XNOR gate Odd 1 1 1 0
Table 3.14 3 input XNOR gate

Mr. Guruprasad T R, Faculty, Dept. Of CS Page 5


Logic gates

Following are the XNOR gate symbols:

The bubble (small circle), on the output of NAND, NOR, XNOR gates
represents complementation.
The expression representing XNOR may be written as
F = (X+Y) . (X+Y)
The XNOR operation is symbolized as  i.e. X NOR Y is written as XY.
Circuit diagrams
Boolean algebra is useless unless it can be translated into hardware, in
the form of gates. This translation of Boolean algebra in the gates’ form is known
as logic circuits.
Example 2.1: Design a circuit to realize the following:
F(A, B, C) = AB + AC + BAC
Solution: The given Boolean expression can also be written as follows
F(A, B, C) = A . B + A . C + B . A . C
or F(A, B, C) = (A AND B) OR (A AND (NOT C)) OR ((NOT B) AND (NOT A) AND C)

Mr. Guruprasad T R, Faculty, Dept. Of CS Page 6


Logic gates

Example 2.2 Draw the diagram of digital circuit for the function:
F(X, Y, Z) = (X + Y) . (X + Z) . (Y + Z)
Solution: Above expression can also be written as
F(X, Y, Z) = (X OR Y) AND ((NOT X) OR (NOT Z)) AND (Y OR Z)
Thus circuit diagram will be

X X+Y
Y

X X+Z F
Z
(X+Y).(X+Z).(Y+Z)

Y Y+Z
Z

Example 3 : AB+BC(B+C)

Mr. Guruprasad T R, Faculty, Dept. Of CS Page 7


Logic gates
Example 4 :

NAND, NOR as Universal Gates


The NAND and NOR gates are more popular as these are less expensive and
easier to design. The basic gates AND, OR and NOT can easily be implemented
using NAND/NOR gates. Thus NAND, NOR gates are also referred to as
Universal Gates.

NAND–to-NOT logic
Not Operation

X X

NOT X = X NAND X
= X.X {De Morgan's Second Theorem}
=X+X {De Morgan's Second Theorem}
=X

NAND–to-AND logic
AND and OR operations from NAND gates are shown below:

AND operation

X.Y XY

X.Y AND operation using NAND is


X . Y = (X NAND Y) NAND (X NAND Y)
Proof: X NAND Y = X.Y
=X+Y (De Morgan’s Second Theorem)
Mr. Guruprasad T R, Faculty, Dept. Of CS Page 8
Logic gates
(X NAND Y) NAND (X NAND Y)
= (X + Y) NAND (X + Y)
= (X + Y) . (X + Y) (De Morgan’s Second Theorem)
= X.Y + X.Y (De Morgan’s First Theorem)
=X.Y+X.Y (X = X)
= XY (X + X = X)
OR Operation
X.X
X

X+Y

Y
Y.Y

X + Y = (X NAND X) NAND (Y NAND Y)


Proof : X NAND X = X.X {De Morgan’s Second Theorem}
=X+X {De Morgan’s Second Theorem}
=X { X+X=X }
Similarly, Y NAND Y = Y
Therefore, (X NAND X) NAND (Y NAND Y) = X NAND Y
= (X . Y)
=X+Y {X = X, Y = Y}
=X+Y

Universal Property Of NOR Gate


NOR-to-NOT logic
NOT, AND and OR operations can be implemented in NOR-to-NOR form
as shown on below.

A A

Mr. Guruprasad T R, Faculty, Dept. Of CS Page 9


Logic gates
NOT X = X NOR X
= X+X
= X.X
=X
NOR to OR Operation
A + B = (A NOR B) NOR (A NOR B)

NOR to AND Operation


A . B = (A NOR A) NOR (B NOR B)A

A
B
A.B
B

Universal property of NAND Gate

NAND as NOT Gate


All NAND input pins connect to the input signal A which gives an output A

NAND as AND Gate


The AND is replaced by a NAND gate with its output complemented by a NAND gate inverter

Mr. Guruprasad T R, Faculty, Dept. Of CS Page 10


Logic gates
NAND as OR Gate
The OR gate is replaced by a NAND gate with all its inputs complemented by NAND gate inverter

NAND as X-OR Gate


The X-OR gate is replaced by a NAND gate with all its inputs complemented by NAND gate
inverter.

Mr. Guruprasad T R, Faculty, Dept. Of CS Page 11


Logic gates

NAND as X-NOR Gate


The X-NOR gate is replaced by a NAND gate with all its inputs complemented by NAND gate
inverter.

Universal property of NOR Gate

NOR as NOT Gate

A NOT gate is equivalent to an inverted-input NOR gate.

NOR as AND Gate


The AND is replaced by a NOR gate with its output complemented by a NOR gate inverter

NOR as OR Gate

The OR is replaced by a NOR gate with its output complemented by a NOR gate inverter.

NOR as X-OR Gate

The X-OR gate is replaced by a NOR gate with all its inputs complemented by NOR gate inverter

Mr. Guruprasad T R, Faculty, Dept. Of CS Page 12


Logic gates

NOR as X-NOR Gate


The X-NOR gate is replaced by a NOR gate with all its inputs complemented by NOR gate
inverte

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Logic gates

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