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Chapter 4

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0% found this document useful (0 votes)
12 views39 pages

Chapter 4

data arc
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© © All Rights Reserved
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Available Formats
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You are on page 1/ 39

Chapter -4

Register Transfer Language and Micro


Operations

1
Outlines
Register Transfer Language

Register transfer

Bus and Memory Transfer

Arithmetic Operations

Logic Operations

Shift Micro operations

2
Register Transfer Language
 Digital systems are composed of modules that are constructed from
digital components, such as registers, decoders, arithmetic elements,
and control logic
 The modules are interconnected with common data and control paths to
form a digital computer system
 Modules can be defined by the registers they contain and operations that
are performed on the data stored in them
 The operations executed on data stored in registers are called
microoperations
 A microoperation is an elementary operation performed on the information
stored in one or more registers, Examples are shift, count, clear, and load
 Some of the digital components are registers that implement
microoperations
 E.g. a counter with parallel loading is capable of performing the
microoperation load and increment
3
Register Transfer Language …
 The internal hardware organization of a digital computer is best defined

by specifying
 Set of registers it contains and their function

 The sequence of MOs performed on the binary information

 The control for initiating the sequence of MOs

 The symbolic notation describing MO transfers among registers is called a register

transfer language.
 The term register transfer implies availability of logic circuits for performing

MOs and transfer results of the operations to another (or same) register.
4
Register Transfer
 Registers are designated by capital letters followed by optional number:

MAR, PC, IR, R1, R2, etc


 The register that holds an address for the memory unit is called MAR
 The program counter register is called PC
 IR is the instruction register and R1 is a processor register

 The individual flip-flops, i.e. bits, in an n-bit register are numbered in

sequence from 0 to n-1starting from the right

5
Register Transfer …
 The information transfer from one register to another is designate in symbolic
form by means of a replacement operator.
 Register transfer: R2 ←R1
 transfers the content of register R1into register R2,The content of R1remains intact
 Implies that the necessary hardware for performing the transfer is available
 And that the destination register has a parallel load capability

 If the transfer is to occur only under a predetermined control condition,


designate it by:
 If (P = 1) then (R2 ← R1) or
 P: R2 ← R1, where P is a control function that can be either 0 or 1

 Every statement written in register transfer notation implies the


presence of the required hardware construction

6
Register Transfer …
 Transfer from R1 to R2 when P = 1, example

7
Register Transfer …

 Basic symbols of the register transfer notation

8
Bus and Memory Transfer
 A typical computer system has multiple register, which path
needed to transfer information from one register to other register
 Using separate line between each register is increase the number of
lines in the system
 An efficient scheme for transferring information between registers
in multiple register configuration is using common bus system
 A bus structure consists of a set of common lines, one for each bit
of a registers
 Control signals determine which register is selected by the bus
during each transfer
9
Bus and Memory Transfer….
 One way of constructing common bus is using multiplexer

 Multiplexers select the source register whose binary

information is then placed on the bus

 The select lines are connected to the selection inputs of the

multiplexers and choose the bits of one register


 Example: 4-line common bus

10
Bus and Memory Transfer….
 The number of multiplexers equals the bus width n.

 The size of each multiplexer must be kx 1, where k is the number of n-bit


registers, e.g. 16-bit bus and 8 registers:
 16 8 x 1 multiplexers

 3 address (selection) lines: encodes 8 addresses, one for each register.

 To transfer information from the bus to a register, the bus lines are connected
to the inputs of all destination registers and the corresponding load control line
must be activated
 The bus can be stated explicitly in the register transfer statement:
 BUS ←C, R1 ←BUS

 or the existence of the bus is implied by the statement:


 R1 ←C
11
Bus and Memory Transfer….
Bus system for four registers (Mano, 1993)

12
Bus and Memory Transfer….
 Bus system can be also constructed with 3-state buffers
 A three-state gate is a digital circuit that exhibits three states

 Two of the states are signals equivalent to logic 1 and 0


 The third state is a high-impedance state – this behaves like
an open circuit, which means the output is disconnected and
does not have a logic significance

13
Bus and Memory Transfer….
 The three-state buffer gate has a normal input and a control input

which determines the output state


 With control 1, the output equals the normal input

 With control 0, the gate goes to a high-impedance state

 This enables a large number of three-state gate outputs to be

connected with wires to form a common bus line without endangering


loading effects

 Decoders are used to ensure that no more than one control input is

active at any given time


14  This circuit can replace the multiplexer
Bus and Memory Transfer….
 To construct a common bus for four registers of n bits each using three-

state buffers, we need n circuits with four buffers in each

 Only one decoder is necessary to select between the four registers

15 Implementing a bus using 3-state buffers (Mano1993


Memory Transfer
 Designate a memory word by the letter M

 It is necessary to specify the address of M when writing memory

transfer operations

 Designate the address register by AR and the data register by DR

 The read operation can be stated as:

 Read: DR ← M[AR]

 Read memory word Mfrom address ARto data register DR”

 The write operation can be stated as:

 Write: M[AR] ← R1

16  “Write data from R1to a memory word Mat address AR”


Arithmetic Micro-operations
 Micro-operation is an elementary operation performed with the

data stored in registers

 Four (typical) micro-operation (MO) categories


1. Register transfer
2. Arithmetic, e.g.: addition, subtraction, increment, decrement,
shift
3. Logic
4. Shift
• The basic arithmetic microoperations are addition,
subtraction, increment, decrement, and shift

17
Arithmetic Micro-operations…
 Add micro-operation:

 R3←R1 + R2

 To implement this statement with hardware we need three registers and addition
circuits.
 Subtract micro-operation:

 R3←R1 + R2 +1

 R2 represents the 1’s complement of R2

 Adding 1 to 1’s complement produces 2’s complement

 Adding the contents of R1 to the 2’s complement of R2 is equivalent to subtracting

 Multiply and divide are not included as microoperations, A microoperation is one that
can be executed by one clock pulse
 Multiply (divide) is implemented by a sequence of add and shift microoperations
(subtract and shift)
18
Arithmetic Micro-operations…..
 Arithmetic micro-operations

19
Arithmetic Micro-operations….
 To implement the add microoperation with hardware, we need the
registers that hold the data and the digital component that performs the
addition
 Binary adder is a digital circuit that generates the arithmetic sum of two
binary numbers of any length.
 Full-adder form the arithmetic sum of two bits and a previous carry

 Binary adder is constructed with full-adder circuits connected in cascade,


with the output carry from one full-adder connected to the input carry of
the next full adder
 An n-bit binary adder requires n full-adders
20
Arithmetic Micro-operations….
 The subtraction A-B can be carried out by the following steps
 Take the 1’s complement of B (invert each bit)
 Get the 2’s complement by adding 1
 Add the result to A
 The addition and subtraction operations can be combined into
one common circuit by including an XOR gate with each full-
adder
 1’s complement can be implement with inverters, and a one can
be added to sum through the input carry C0
 When M= 0 the circuit is an adder, when M= 1 the circuit
becomes a subtractor.
 XOR(M,B)= B, M= 0 => B inputs are not inverted, C0= 0
 XOR(M,B)= B, M= 1 => B inputs are inverted, C0= 1
21
Arithmetic Micro-operations…

22
Arithmetic Micro-operations….
 The increment operation adds one to a number in a register, e.g.:

0110 => 0111


 Increment MO can be implement with a combinatorial circuit by means of

half-adders connected in cascade

 n-bit binary incrementor requires n half-adders

 Least significant bit must have one input connected to logic-1

 The other inputs receive the number to be incremented or the carry from

the previous stage

 The output carry C4is 1 only after incrementing binary 1111. This causes

23 outputs S0through S3to go to 0


Arithmetic Micro-operations….

24
Arithmetic Micro-operations….
 Each of the arithmetic microoperations can be implemented in one
composite arithmetic circuit
 Basic component is parallel adder.
 Control inputs are used to obtain different types of arithmetic operations

E.g. 4-bit arithmetic circuit:


 4 full-adders constitute the 4-bit adder

 4 multiplexers for choosing operations

 two 4-bit inputs A and B, and 4-bit output D

 two selection inputs S0and S1and input carry Cin

 Output: D= A+ Y+ Cin

25
Arithmetic Micro-operations….
 With S0, S1,and Cin is possible to control the value of Y, and the
operation of the 4-bit adder

26
Logic Micro-operations
 Logic operations specify binary operations for strings of bits stored in
registers and treat each bit separately
 Example: the XOR of R1 and R2 is symbolized by
 P: R1 ← R1 ⊕ R2
 Example: R1 = 1010 and R2 = 1100
 1010 Content of R1
 1100 Content of R2
 0110 Content of R1(R1 ⊕ R2 ) after P = 1
 Symbols used for logical microoperations:
 OR: ∨
 AND: ∧
 XOR: ⊕

27
Logic Micro-operations…..
 The ‘+’ sign has two different meanings: logical OR and summation

 When ‘+’ is in a microoperation, then summation

 When + is in a control function, then OR

 Example: P + Q: R1 ← R2 + R3, R4 ← R5 ∨ R6

 There are 16 different logic operations that can be performed with two

binary variables

28
Logic Micro-operations….

29
Logic Micro-operations…..
Hardware implementation
 The hardware implementation of logic microoperations requires that logic
gates be inserted for each bit or pair of bits in the registers
 All 16 microoperations can be derived from using four logic
gates(AND,OR,XOR,complement)

30
Logic Micro-operations…..
Some applications

 Logic microoperations can be used to change bit values, delete a group of

bits, or insert new bit values into a register

 The selective-set operation sets to 1 the bits in A where there are

corresponding 1’s in B
 1010 A before
 1100 B (logic operand)
 1110 A after selective-set

 A ← A ∨ B (selective set operation performed using OR

microoperation)
31
Logic Micro-operations…..
 The selective-complement operation complements bits in A where there

are corresponding 1’s in B


• 1010 A before
• 1100 B (logic operand)
• 0110 A after selective-complement
• A ←A ⊕ B

 The selective-clear operation clears to 0 the bits in A only where there

are corresponding 1’s in B


• 1010 A before
• 1100 B (logic operand)
• 0010 A after selective-clear
32 • A ←A ∧ B
Logic Micro-operations…..
 The mask operation is similar to the selective-clear operation, except
that the bits of A are cleared only where there are corresponding 0’s in B
1010 A before
1100 B (logic operand)
1000 A after mask operation
A ← A ∧ B
 The insert operation inserts a new value into a group of bits
 This is done by first masking the bits to be replaced and then Oring them
with the bits to be inserted

0110 1010 A before 0000 1010 A before


0000 1111 B (mask) 1001 0000 B (insert)
0000 1010 A after masking 1001 1010 A after insertion
33
Logic Micro-operations…..
 The clear operation compares the bits in A and B and produces an all 0’s
result if the two number are equal
1010 A
1010 B
0000
A ← A ⊕ B (performed using XOR micro operation)

34
Shift Microoperations
 Shift microoperations are used for serial transfer of data

 They are also used in conjunction with arithmetic, logic, and other data

processing operations

 There are three types of shifts: logical, circular, and arithmetic

 A logical shift is one that transfers 0 through the serial input

 The symbols shl and shr are for logical shift-left and shift-right by one

position
 R1 ← shl R1

35
Shift Microoperations….
 The circular shift (aka rotate) circulates the bits of the register around the

two ends without loss of information


 The symbols cil and cir are for circular shift left and right

 The arithmetic shift shifts a signed binary number to the left or right

 To the left is multiplying by 2, to the right is dividing by 2

 Arithmetic shifts must leave the sign bit unchanged

 A sign reversal occurs if the bit in Rn-1 changes in value after the shift

 This happens if the multiplication causes an overflow

 An overflow flip-flop Vs can be used to detect the overflow


36
ϗ Vs = Rn-1 ⊕ Rn-2
Shift Microoperations….
 A bi-directional shift unit with parallel load could be used to implement

this

 Two clock pulses are necessary with this configuration: one to load the

value and another to shift

 In a processor unit with many registers it is more efficient to implement

the shift operation with a combinational circuit

 The content of a register to be shifted is first placed onto a common bus

and the output is connected to the combinational shifter, the shifted


number is then loaded back into the register
37
 This can be constructed with multiplexers
Shift Microoperations….

38
?
Thank you!!!
39

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