NMOrwod AC Marwadi University

LniversityA Department of Computer Engineering

Subject: Fundamental of
Processors (01CEOs09) Aim:To perform Branch Operations.
Experiment No: 07 Date: Enrolment No. 92200 103297

Experiment-7
AIM: Toperform Branch Operations.
THEORY:
There are two types of branches or jumps namely
branches. conditional and unconditional

Unconditional Branch Instructions

The unconditional branches are those in which the
address provided within the instruction. program counter jumps to the label

Conditional Branch Instructions

On the other hand, the conditional branches are
based on some condition, It checks one or more flagthose instructions whose execution is
to a new memory location. There are two types of conditions
and transfers the control
jumps namely Far and Near. In the far
jumps, the program counter jumps to the memory
current code segment whereas in near jumps, the lP locationpoints
which lies outside the
to the memory address
inside the current code segment and that is why the CS
near jumps. The conditional jumps are also near jumps. register remains unchanged in
is: The syntax of these instructions

Opcode LABEL
It is a 2-byte instruction consisting of
1-Byte Opcode and 1-byte Label. Label value is
between 00 and FF. It is sign-extended to 16-bits and added to the contents of IP
register. The target address must be within the -128
conditions are checked depending upon the instruction,toif +127
they
bytes of IP, The flag
are
control is transferred to the menory address pointed by the lP true the program
is not satisfied, then the program register. If the condition
continues in a sequential manner.
List of 8086 Conditional Branch
Instructions
Table below shows the mnemonics' of all the
conditional branches instructions.
InstructionsOperation
JA/NBE Jump if Above/Not Below or Equal Testing Condition
Jump if C=0 andZ=0
|JAE/JNB/JNC|Carry Above or Equal/ Jump if Not Below/jump if No C=0
UB/JNAE Jump if Below/ Jump if Not Above or Equal
C=1
 MMorwodi MarwadiI University
nivctsiy
Department of Computer Engineering

Subject: Fundamental of
Processors (01CEO509) Aim:To perform Branch Operations.
Experiment No: 07 Date: Enrolment No: 92200103297

JBE/JNA Jump if Below or Equal/ Jump if Not Above (Cor Z) =1

JC Jump if Carry C=1
JNC Jump if Not Carry C=0
JCXZ Jump if the CX register=0 CX=0
JE/Z Jump if Equal/]ump if Zero Z=1
JG/JNLE Jump if Greater/Jump if Not Less Than or Equal ((S xor 0) or Z) =
JGE/NL Jump if Greater or Equal/]ump if Not Less Than (S xor0)=0
JL/JNGE Jump if Less Than/Jump if Not Greater Than or Equal (S xor0)=1
JLE/JNG Jump if Less than or Equal/Jump if Not Greater (S xor 0) or Z) =
JNE/JNZ Jump if Not Equal/Jump if Not Zero Z=0
NP/JPO Jump if Not Parity/Jump if Parity Odd P=0
JNS Jump if Not Signed/ump if Positive S-0
JO Jump if Overflow 0=1
JNO Jump if Not Overflow O=0
JP/PE Jump if Parity/ Jump if Parity Even P=1
IS Jump if Signed/ Jump if Negative S=1

These instructions are executed after some other instructions which affects the content
of flag registers. Let's discuss these instructions in detail through examples.
8086 Microprocessor Assembly Comparison Example
The code below compares two numbers and print if number 1 is equal, greater or less
than number 2. This code is implemented using three conditional branches which are
JE, JB and JA.
Assembly Code

JA/JNBE wllcheck the CF and ZF lags. If both are 0, then the IP willjump to the target
address. Also, if both CF and ZF are equal to 1, then the program will continue to execute
sequentially. Moreover, if any one of them is 0 and other is 1, then this instruction will
have no effect of program execution.

Code:
MMarwadi NAAC Marwadi University
Universit A
Department of Computer Engineering

Subject: Fundamental of Aim:Toperform Branch Operations.

Processors (01CEO509)
Exrolment No: 92200103297
Experiment No: 07 Date:

j y Bvno NDI| KUMA NA

32200l032
ORG 100h

-DATk
NuM-4 DB .23H

"
MS8 DB' Egunl humters

.coDE

Moy Ds, Ax,

MoV CH, WoMe

CMP A4,CH.

MoVA, 094
(NT 24
RET
 Morwadi NAAC Marwadi University
Iaierstty
Department of Computer Engineering

Subject: Fundamental of Aim:To perform Branch Operations.

Processors (01CE0509)
Enrolment No: 92200103297
Experiment No: 07 Date:

instruction after JAE instruction, Now replace ADD instruction with CMP instruction. If
AH is greater or equal to CH data, then the program counter will jump to the L1label.

Code:

RET
MoDEL SNAU

-CODE
Mov AH, VAR_4

CMP AH AL
SAE

Output

X 01:Guy Brune NDNUAN

emulator: 3297 P7_2.com :9228e10327
file meth debug siew external virtual deices Virtual drive help
ORG 190h
. NODEL SMALL.
relead step back single step run step delay ms: 100
Load UAR_1 DB BC9H
UAR 2 DB ?AH
reasters |97 90:0114 0790:0114 .coDE
HL 18 MOU AH,VAR_1
AX cg 43 27108: EB 2 MOU AH, L06102h1 N_
HOU AL, (00103h] GNP AH.AL
a2132: C9 291 r CMP AH, AL IAE L1
B2183: 70 122 JNB 0112h ADD AH,AL.
K 00 15 87184: 8A 138 ADD AH, AL RE
a185: 26 38 i 2ADD AL,AN
ADD AL, AH RE

87 08 87108: A9 16g NOF

37139:.03 993 NOP
0114 NOP
G19B: 3A 958
97 90 NOP
a16n: 73 115 NOP
SP FFFE NOP
9000 a710T: 02 G20
37119: EG 224 a NO
0900 07111: G32 NOI
NOP SE
9000
NOI
07 00
i07 90 tCICen sOurce (esel Va debug stack

AF

ashe
 Marwadi AC
Tnietsity MarwadiUniversity
Department of Computer Engineering
Subject: Fundamental of
Processors (01CE0509) Aim:To perform Branch Operations.
Experiment No: 07 Date: Enrolment No: 92200103297

8086 J0 Branch
Instruction:
The code below explains the
behavior of J0
the overflow. If the result is too large to fit instruction. It adds two numbers and
overflow bit to 1. The JO instruction checks the destination register, then it willcheck
in the
transferred to NEXT label which will then display overflow flag. If it is 1,the control willset
emulator screen. If the OF=0, then the sum is message of "0VERFLOW" on thebe
stored in memory. stored in the variable "RESULT" which is
In this example, the two
numbers are 0C9H and 95H. Adding these two
15E resulting into overflow.
after labelNEXT are As OF = 1, therefore after JO numbers give
executed. instruction, the instructions
Code:
) 92oo1032 /by Bnno NgIKU MANA:

MSG DB "OVBRFLow
NUM-a DB -CO
NuMe DB 9SH
"CoDE
ou tx DATh
Mov Ds, Ay.

ADD A4,C.

MoV BLAA
RT
NaxT. .Mov x, opFSSET ss
MOV tt, 09
 Marwadi NAAC
Marwadi University
LniCsIty
Menwedi Cha voa a Gop
Departmentof Computer Engineering
Subject: Fundamental of
Processors (01CE0509) Aim:To perform Branch Operations.
Experiment No: 07 Date: Enrolment No: 92200103297
8086 JNP Branch
Instruction:
The JNP instruction checks the parity flag. If
parity is odd or PF=0, the
instruction checks if parity isprogram
will jump to the label address. The JP counter
Code even or PF=1.
j220o|3

Nom-A PB .0c94
NJM_ 2 DB 9St
CoDE

Mor D5, 4x
Mov At, NUM4

JP NEXT

Mov At, h
WT 2H.

Mov AH, 0t

PEr
 MMorwodi! MAaC Marwadi University
B|\ersii o
Me wad Cheda
Department of Computer Engineering
Subject: Fundamental of
Processors (01CE0509) Aim:To perform Branch Operations.
Experiment No: 07 Date: Enrolment No: 92200103297

Output

D
ep tacençle Ves
FA0B:8 FA00:0N

TNT 921h

NU
HU1 DP 0C?M
NECJLT DB 01 DUPC7)
DATA

4111

nou TEET MECA

21

ICIPen 1Ouce teset

0 emulor serea(15 chars)

8086 JNS Branch Instruction:

There is another instruction that is used to check whether the

result 1s positive or
negative and jumps to the label address depending upon the sign of the result. The JNS
instruction is a jump if the result of the previous instruction is not a signed number or
positive whereas JS instruction is a jump if the previous instruction is a
negative. signed value or

Assembly Code

CRE lo0

- DATA

.CoDE
 NAAC
NMorwadi Marwadi University
lniersity
Mewe Chee a G
|Department of Computer Engineering
Subject: Fundamental of
Processors (01CE0S509) Aim:Toperform Branch Operations.
Experiment No: 07 Date: Enrolment No: 92200103297

The code in example 5 adds two numbers and check if the result is a positive number or
not. If the number is positive, the program stops running otherwise the program wil
jump to the NEXT label in which the result is multiplied with -1 to convert it into a
positive number. Output
O emulator Exp?Sruno_IS.com. X

file math debug view external virtual devices virtual drive help

Load reload step back Single step Step delay ms: 0

regitters 9790:019D |0674:900F

HL
AX CD 34 HDD LBX SIJ,
BX 09 FF g718F: 34 884 " ADD CDN + AL

X 00 95 HDD LB+
82112: Ct 193 1 ORG
109)
ADD [B8 + MODEL SMALL
DX 00 o0 H7113: 78 12 ADD (BX . DAIA
07 00
37E18: S3 173 ADD (BX .coDE
611A XES MOU AX, eDATA
a2118: F6 246 s
790 87119: EB 227 AD + SIJ, AL MOr A8,NUM
SF FFFE 3 195 + SI), 1GU CXNUM_
B?11C: 90 144 ADD CB SLI . JS NET
BF 0000 a 141 RET
PE
ADD TBX
ADD [B8 S I J . AL
NEXI : A
1H
A7?: 90 : 4 ADD [BX
ADD BX
SI}, AL
SI). AL
AUL BL
07 90
DE
ES 07 00 screen sOurce reset aus vars debua slack
analvse

Conclusion: Tm h