Unit II

Logic gates are the fundamental components of all digital circuits and systems. In digital
electronics, there are seven main types of logic gates used to perform various logical
operations. A logic gate is basically an electronic circuit designed by using components
like diodes, transistors, resistors, capacitors, etc., and capable of performing logical
operations. In this article, we will study the definition, truth table, and other related
concepts of logic gates. So let’s start with the basic introduction of logic gates.

What is a Logic Gate?

A logic gate is an electronic circuit designed by using electronic components like diodes,
transistors, resistors, and more. As the name implies, a logic gate is designed to perform
logical operations in digital systems like computers, communication systems, etc.
Therefore, we can say that the building blocks of a digital circuit are logic gates, which
execute numerous logical operations that are required by any digital circuit. A logic gate
can take two or more inputs but only produce one output. The output of a logic gate
depends on the combination of inputs and the logical operation that the logic gate performs.
Logic gates use Boolean algebra to execute logical processes. Logic gates are found in
nearly every digital gadget we use on a regular basis. Logic gates are used in the
architecture of our telephones, laptops, tablets, and memory devices.
Types of Logic Gates
A logic gate is a digital gate that allows data to be manipulated. Logic gates, use logic to
determine whether or not to pass a signal. Logic gates, on the other hand, govern the flow
of information based on a set of rules.
The logic gates can be classified into the following major types:
1. Basic Logic Gates
There are three basic logic gates:
1. AND Gate
2. OR Gate
3. NOT Gate
2. Universal Logic Gates
In digital electronics, the following two logic gates are considered as universal logic gates:
1. NOR Gate
2. NAND Gate
3. Special Logic Gates
The following two are the derived logic gates used in digital systems:
1. XOR Gate
2. XNOR Gate
Let us now discuss each of these types of logic gates in detail one-by-one.
AND Gate
In digital electronics, the AND gate is one of the basic logic gate that performs the logical
multiplication of inputs applied to it. It generates a high or logic 1 output, only when all the
inputs applied to it are high or logic 1. Otherwise, the output of the AND gate is low or
logic 0.
Properties of AND Gate:
The following are two main properties of the AND gate:
 AND gate can accept two or more than two input values at a time.
 When all of the inputs are logic 1, the output of this gate is logic 1.
The operation of an AND gate is described by a mathematical expression, which is called
the Boolean expression of the AND gate.
For two-input AND gate, the Boolean expression is given by,

Z=A.B

Where, A and B are inputs to the AND gate, while Z denotes the output of the AND gate.
We can extend this expression to any number of input variables, such as,

Z=A.B.C.D…
Truth Table of AND Gate:
The truth table of a two input AND gate is given below:

Symbol of AND Gate:

The logic symbol of a two input AND gate is shown in the following figure.

Symbol of Two-Input AND Gate

OR Gate
In digital electronics, there is a type of basic logic gate which produces a low or logic 0
output only when its all inputs are low or logic 0. For all other input combinations, the
output of the OR gate is high or logic 1. This logic gate is termed as OR gate. An OR gate
can be designed to have two or more inputs but only one output. The primary function of
the OR gate is to perform the logical sum operation.
Properties of OR Gate:
An OR gate have the following two properties:
 It can have two or more input lines at a time.
 When all of the inputs to the OR gate are low or logic 0, the output of it is low or logic
0.
The operation of an OR gate can be mathematically described through a mathematical
expression called Boolean expression of the OR gate.
The boolean expression for a two input OR gate is given by,

Z=A+B

The boolean expression for a three-input OR gate is,

Z=A+B+C

Here, A, B, and C are inputs and Z is the output variables. We can extend this boolean
expression to any number of input variables.
Truth Table of OR Gate:
The truth table of an OR gate describes the relationship between inputs and output. The
following is the truth table for the two-input OR gate:

Symbol of OR Gate:
The logic symbol of a two-input OR gate is shown in the following figure.
Symbol of Two-Input OR Gate
NOT Gate
In digital electronics, the NOT gate is another basic logic gate used to perform complement
of an input signal applied to it. It takes only one input and one output. The output of the
NOT gate is complement of the input applied to it. Therefore, if we apply a low or logic 0
output to the NOT gate is gives a high or logic 1 output and vice-versa. The NOT gate is
also known as inverter, as it performs the inversion operation.

Properties of NOT Gate:

 The output of a NOT gate is complement or inverse of the input applied to it.
 NOT gate takes only one output.
The logical operation of the NOT gate is described by its boolean expression, which is
given below.

The bar over the input variable A represents the inversion operation.
Truth Table of OR Gate:
The truth table describes the relationship between input and output. The following is the
truth table for the NOT gate:

Symbol of NOT Gate

The logic circuit symbol of a NOT gate is shown in the following figure. Here, A is the
input line and Z is the output line.
Symbol of NOT the Gate

NOR Gate
The NOR gate is a type of universal logic gate that can take two or more inputs but one
output. It is basically a combination of two basic logic gates i.e., OR gate and NOT gate.
Thus, it can be expressed as,

NOR Gate = OR Gate + NOT Gate

In other words, a NOR gate is an OR gate followed by a NOT gate.

Properties of NOR Gate:

The following are two important properties of NOR gate:
 A NOR gate can have two or more inputs and gives an output.
 A NOR gate gives a high or logic 1 output only when its all inputs are low or logic 0.
Similar to basic logic gates, we can describe the operation of a NOR gate using a
mathematical equation called boolean expression of the NOR gate.
The boolean expression of a two input NOR gate is given below:

We can extend this expression to any number of input variables.

In the above boolean expressions, the variables A and B are called input variables while the
variable C is called the output variable.

Truth Table of NOR Gate:

The following is the truth table of a two-input NOR gate showing the relationship between
its inputs and output:
Symbol of the NOR Gate

NAND Gate
In digital electronics, the NAND gate is another type of universal logic gate used to
perform logical operations. The NAND gate performs the inverted operation of the AND
gate. Similar to NOR gate, the NAND gate can also have two or more input lines but only
one output line.
The NAND gate is also represented as a combination of two basic logic gates namely, AND
gate and NOT gate. Hence, it can be expressed as

Properties of NAND Gate:

The following are the two key properties of NAND gate:
 NAND gate can take two or more inputs at a time and produces one output based on the
combination of inputs applied.
 NAND gate produces a low or logic 0 output only when its all inputs are high or logic
1.
We can describe the expression of NAND gate through a mathematical equation called its
boolean expression. Here is the boolean expression of a two input NAND gate.

In this expression, A and B are the input variables and C is the output variable. We can
extend this relation to any number of input variables like three, four, or more.

Truth Table of NAND Gate:

The truth table is a table of inputs and output that describes the operation of the NAND gate
and shows the logical relationship between them:

Symbol of NAND Gate:

The logic symbol of a NAND gate is represented as a AND gate with a bubble on its output
end as depicted in the following figure. It is the symbol of a two-input NAND gate.
Symbol of NAND Gate

XOR Gate
In digital electronics, there is a specially designed logic gate named, XOR gate, which is
used in digital circuits to perform modulo sum. It is also referred to as Exclusive OR gate
or Ex-OR gate. The XOR gate can take only two inputs at a time and give an output. The
output of the XOR gate is high or logic 1 only when its two inputs are dissimilar.

Properties of XOR Gate:

The following two are the main properties of the XOR gate:
 It can accept only two inputs at a time. There is nothing like a three or more input XOR
gate.
 The output of the XOR gate is logic 1 or high, when its inputs are dissimilar.
The operation of the XOR gate can be described through a mathematical equation called its
boolean expression. The following is the boolean expression for the output of the XOR
gate.

Here, Z is the output variable, and A and B are the input variables.
This expression can also be written as follows:

Truth Table of XOR Gate:

The truth table is a table of inputs and output that describe the relationship between them
and the operation of the XOR gate for different input combinations. The truth table of the
XOR gate is given below:
Symbol of XOR Gate:
The logic symbol of an XOR gate is shown in the following figure.

Symbol of XOR Gate

XNOR Gate
The XNOR gate is another type of special purpose logic gate used to implement exclusive
operation in digital circuits. It is used to implement the Exclusive NOR operation in
digital circuits. It is also called the Ex-NOR or Exclusive NOR gate. It is a combination of
two logic gates namely, XOR gate and NOT gate. Thus, it can be expressed as,

The output of an XNOR gate is high or logic 1 when its both inputs are similar. Otherwise
the output is low or logic 0. Hence, the XNOR gate is used as a similarity detector circuit.
Properties of XNOR Gate:
The following are two key properties of XNOR gate:

 XNOR gate takes only two inputs and produces one output.
 The output of the XNOR gate is high or logic 1 only when it has similar inputs.

The operation of XNOR gate can be described through a mathematical equation called the
boolean expression of XNOR gate. Here is the boolean expression of the XNOR gate.

Here, the A and B are inputs and Y is the output.

Truth Table of XNOR Gate:

The truth table of the XNOR gate is given below. This truth table is describing the
relationship between inputs and output of the XNOR gate.
Symbol of XNOR Gate:
The logic symbol of XNOR gate is shown in the following figure. Here, A and B are inputs
and Y is the output.

Symbol of XNOR gate

Applications of Logic Gates

Logic gates are the fundamental building blocks of all digital circuits and devices like
computers. Here are some key digital devices in which logic gates are utilized to design
their circuits:
 Computers
 Microprocessors
 Microcontrollers
 Digital and smart watches
 Smartphones, etc.
Canonical Form

I.True Form – In Boolean algebra, the Boolean function can be expressed as Canonical
Disjunctive Normal Form known as minterm and some are expressed as Canonical
Conjunctive Normal Form known as maxterm.
In Minterm, we look for the functions where the output results in “1” while in Maxterm we
look for functions where the output results in “0”.
We perform the Sum of minterm also known as the Sum of products (SOP).
We perform Product of Maxterm also known as Product of sum (POS).

II.Standard Form – A Boolean variable can be expressed in either true or complementary

forms. In standard form Boolean function will contain all the variables in either true form
or complemented form while in canonical number of variables depends on the output of
SOP or POS.
A Boolean function can be expressed algebraically from a given truth table by forming a :
 minterm for each combination of the variables that produces a 1 in the function and then
takes the OR of all those terms.
 maxterm for each combination of the variables that produces a 0 in the function and
then takes the AND of all those terms.

Truth table representing minterm and maxterm –

From the above table it is clear that minterm is expressed in product format and maxterm is
expressed in sum format.
Sum of minterms –
The minterms whose sum defines the Boolean function are those which give the 1’s of the
function in a truth table. Since the function can be either 1 or 0 for each minterm, and since
there are 2^n minterms, one can calculate all the functions that can be formed with n
variables to be (2^(2^n)). It is sometimes convenient to express a Boolean function in its
sum of minterm form.

Product of maxterms –
When dealing with Boolean algebra, the product of maxterms is a handy way to express
how combinations of inputs lead to a result of 0. Maxterms basically tell us which
combinations of inputs won’t give us a 1 as an output. They are the opposite of minterms,
which tell us when we get a 1.
Basic Conversion of Logic Gates
1. AND to NAND

The algebraic expression of the AND to NAND Gate conversion

is Y=A’+B‘.

2. OR to NOR

The algebraic expression of the NOR gate is Y=A’.B’.

3. NAND to AND

The algebraic expression of the NAND to AND gate conversion

is Y”=A.B.
After complement, we get the expression of the And gate.

4. NAND to OR

The algebraic expression of the NAND to OR gate is- Y=A+B.

5. NOR to AND

The algebraic expression of the NOR to AND gate is Y=A.B.

6. NOR to NOT

The algebraic expression of the NOR to NOT gate conversion will be the
same as the NOT gate. So the algebraic conversion of the NOT gate
is:- Y=A’

7. NAND to NOT

The algebraic expression of the NAND to NOT gate conversion will be the
same as the NOT gate. So the algebraic conversion of the NOT gate
is:- Y=A’

8. NOR to OR

The algebraic expression of the NOR to OR gate is: A+B

9. NOR to NAND

The algebraic expression of the NOR to NAND gate is A’+B’.

10. NOR to XOR

The algebraic expression of the NOR to XOR gate is (A+(A+B)’)’+(B+

(A+B)’)’

11. NOR to X-NOR

The algebraic expression of the NOR to XNOR gate is- (A+B’). (A’+B)
Advantages of Logic Gates
 Logic gates are easy to understand and work with. Even beginners can
learn how to use basic gates like AND, OR, and NOT. This simplicity
makes it easier for engineers to design digital systems.
 They can be the combined to make more complex circuits. Just like
building with the Lego you can put together different logic gates to
create the bigger and more powerful systems. This is how we make the
things like computer processors and the memory chips.
 Logic gates work very quickly helping computers run fast. They can
switch between 0 and 1 states in tiny fractions of a second. This speed
is why modern computers can do so many calculations so quickly.
Disadvantages of Logic Gates
 Most logic gates can only handle a few inputs at a time. For example, a
typical AND gate has just two inputs. This means that for more
 complex operations, you need to use many gates together, which can
make circuits bigger and more complicated.
 They need a constant power supply to work. The Logic gates are
always “on” and using the electricity even when they are not actively
processing. This is why the computers and smartphones use up the
battery power even when they seem to be doing nothing.
 When many logic gates work together, they can create heat, which can
cause issues. This is why computers need fans or other cooling
systems. Too much heat can make the logic gates work incorrectly or
even damage them. It is also why big data centers need the powerful
air conditioning.

Karnaugh Map(K-Map) method

The Karnaugh map (KM or K-map) is a method of simplifying Boolean
algebra expressions. Maurice Karnaugh introduced it in 1953

The K-map is a systematic way of simplifying Boolean expressions. With

the help of the K-map method, we can find the simplest POS and SOP
expression, which is known as the minimum expression. The K-map
provides a cookbook for simplification.

Just like the truth table, a K-map contains all the possible values of input
variables and their corresponding output values. However, in K-map, the
values are stored in cells of the array. In each cell, a binary value of each
input variable is stored.

The K-map method is used for expressions containing 2, 3, 4, and 5

variables. For a higher number of variables, there is another method used
for simplification called the Quine-McClusky method. In K-map, the
number of cells is similar to the total number of variable input
combinations. For example, if the number of variables is three, the
number of cells is 23=8, and if the number of variables is four, the number
of cells is 24. The K-map takes the SOP and POS forms. The K-map grid is
filled using 0's and 1's. The K-map is solved by making groups. There are
the following steps used to solve the expressions using K-map:

1. First, we find the K-map as per the number of variables.

2. Find the maxterm and minterm in the given expression.
3. Fill cells of K-map for SOP with 1 respective to the minterms.
4. Fill cells of the block for POS with 0 respective to the maxterm.
5. Next, we create rectangular groups that contain total terms in the
power of two like 2, 4, 8, … and try to cover as many elements as
we can in one group.
 6. With the help of these groups, we find the product terms and sum
them up for the SOP form.

2 Variable K-map
There is a total of 4 variables in a 2-variable K-map. There are two
variables in the 2-variable K-map. The following figure shows the structure
of the 2-variable K-map:

o In the above figure, there is only one possibility of grouping four

adjacent minterms.
o The possible combinations of grouping 2 adjacent minterms are
{(m0, m1), (m2, m3), (m0, m2) and (m1, m3)}.

3-variable K-map
The 3-variable K-map is represented as an array of eight cells. In this
case, we used A, B, and C for the variable. We can use any letter for the
names of the variables. The binary values of variables A and B are along
the left side, and the values of C are across the top. The value of the given
cell is the binary values of A and B at left side in the same row combined
with the value of C at the top in the same column. For example, the cell in
the upper left corner has a binary value of 000, and the cell in the lower
right corner has a binary value of 101.
The 4-Variable Karnaugh Map
The 4-variable K-map is represented as an array of 16 cells. Binary values
of A and B are along the left side, and the values of C and D are across the
top. The value of the given cell is the binary values of A and B at left side
in the same row combined with the binary values of C and D at the top in
the same column. For example, the cell in the upper right corner has a
binary value of 0010, and the cell in the lower right corner has a binary
value of 1010
Simplification of boolean expressions using
Karnaugh Map
As we know that K-map takes both SOP and POS forms. So, there are two
possible solutions for K-map, i.e., minterm and maxterm solution. Let's
start and learn about how we can find the minterm and maxterm solution
of K-map.

Minterm Solution of K Map

There are the following steps to find the minterm solution or K-map:

Step 1:

Firstly, we define the given expression in its canonical form.

Step 2:

Next, we create the K-map by entering 1 to each product-term into the K-

map cell and fill the remaining cells with zeros.

Step 3:

Next, we form the groups by considering each one in the K-map.

Notice that each group should have the largest number of 'ones'. A group cannot
contain an empty cell or cell that contains 0.
In a group, there is a total of 2n number of ones. Here, n=0, 1, 2, …n.

Example: 20=1, 21=2, 22=4, 23=8, or 24=16.

We group the number of ones in the decreasing order. First, we have to try to
make the group of eight, then for four, after that two and lastly for 1.

In horizontally or vertically manner, the groups of ones are formed in shape of

rectangle and square. We cannot perform the diagonal grouping in K-map.

The elements in one group can also be used in different groups only when the
size of the group is increased.
The elements located at the edges of the table are considered to be adjacent.
So, we can group these elements.

We can consider the 'don't care condition' only when they aid in increasing the
group-size. Otherwise, 'don't care' elements are discarded.

Step 4:

In the next step, we find the boolean expression for each group. By
looking at the common variables in cell-labeling, we define the groups in
terms of input variables. In the below example, there is a total of two
groups, i.e., group 1 and group 2, with two and one number of 'ones'.
In the first group, the ones are present in the row for which the value of A
is 0. Thus, they contain the complement of variable A. Remaining two
'ones' are present in adjacent columns. In these columns, only B term in
common is the product term corresponding to the group as A'B. Just like
group 1, in group 2, the one's are present in a row for which the value of A
is 1. So, the corresponding variables of this column are B'C'. The overall
product term of this group is AB'C'.

Step 5:

Lastly, we find the boolean expression for the Output. To find the simplified
boolean expression in the SOP form, we combine the product-terms of all
individual groups. So the simplified expression of the above k-map is as follows:

Let's take some examples of 2-variable, 3-variable, 4-variable, and 5-variable K-

map examples.

DO THE 2 & 3 & 4 INPUT VARIABLES K – MAP

PROBLEMS FOR SUM OF PRODUCT

Maxterm Solution of K-Map

To find the simplified maxterm solution using K-map is the same as to find
for the minterm solution. There are some minor changes in the maxterm
solution, which are as follows:
 1. We will populate the K-map by entering the value of 0 to each sum-
term into the K-map cell and fill the remaining cells with one's.
2. We will make the groups of 'zeros' not for 'ones'.
3. Now, we will define the boolean expressions for each group as sum-
terms.
4. At last, to find the simplified boolean expression in the POS form, we
will combine the sum-terms of all individual groups.

Let's take some example of 2-variable, 3-variable, 4-variable and 5-

variable K-map examples

DO THE 2 & 3 & 4 INPUT VARIABLES K – MAP

PROBLEMS FOR PRODUCT OF SUM

Don't Care Condition

The "Don't care" condition says that we can use the blank cells of a K-map
to make a group of the variables. To make a group of cells, we can use the
"don't care" cells as either 0 or 1, and if required, we can also ignore that
cell. We mainly use the "don't care" cell to make a large group of cells.

The cross(×) symbol is used to represent the "don't care" cell in K-map.
This cross symbol represents an invalid combination. The "don't care" in
excess-3 code are 0000, 0001, 0010, 1101, 1110, and 1111 because they
are invalid combinations. Apart from this, the 4-bit BCD to Excess-3 code,
the "don't care" are 1010, 1011, 1100, 1101, 1110, and 1111.
We can change the standard SOP function into a POS expression by
making the "don't care" terms the same as they are. The missing
minterms of the POS form are written as maxterms of the POS form. In the
same way, we can change the standard POS function into an SOP
expression by making the "don't care" terms the same as they are. The
missing maxterms of the SOP form are written as minterm of the SOP
form.

Example 1: Minimize f = m(1,5,6,12,13,14) + d(4) in SOP minimal

form

Solution:

The k-map of the given function in the SOP form is as follows:

So, the minimized SOP form of the function is:

f = BC' + BD' + A'C'D

Example 2: Minimize F(A,B,C,D) = m(0,1,2,3,4,5) +

d(10,11,12,13,14,15) in SOP minimal form

Solution:

The POS form of the given function is:

F(A,B,C,D) = M(6,7,8,9) + d(10,11,12,13,14,15)

The POS K-map for the given expression is:

So, the minimized POS form of the function is:

F = A'(B' + C')

Combinational Logic circuits

The combinational logic circuits are the circuits that contain different
types of logic gates. Simply, a circuit in which different types of logic
gates are combined is known as a combinational logic circuit. The
output of the combinational circuit is determined from the present
combination of inputs, regardless of the previous input. The input
variables, logic gates, and output variables are the basic components of
the combinational logic circuit. There are different types of combinational
logic circuits, such as Adder, Subtractor, Decoder, Encoder, Multiplexer,
and De-multiplexer.

There are the following characteristics of the combinational logic circuit:

o At any instant of time, the output of the combinational circuits

depends only on the present input terminals.
o The combinational circuit doesn't have any backup or previous
memory. The present state of the circuit is not affected by the
previous state of the input.
 o The n number of inputs and m number of outputs are possible in
combinational logic circuits.

The 'n' input variable comes from the external source while the 'm' output
variable goes to the external destination. In many applications, the source
or destinations are storage registers.

Half Adder
The half adder is a basic building block having two inputs and two outputs.
The adder is used to perform OR operation of two single bit binary
numbers. The carry and sum are two output states of the half adder.

Full Adder
The half adder is used to add only two numbers. To overcome this
problem, the full adder was developed. The full adder is used to add three
1-bit binary numbers A, B, and carry C. The full adder has three input
states and two output states i.e., sum and carry.

Half Subtractors
The half subtractor is also a building block of subtracting two binary
numbers. It has two inputs and two outputs. This circuit is used to subtract
two single bit binary numbers A and B. The 'diff' and 'borrow' are the two
output state of the half adder.

Full Subtractors
The Half Subtractor is used to subtract only two numbers. To overcome
this problem, full subtractor was designed. The full subtractor is used to
subtract three 1-bit numbers A, B, and C, which are minuend,
subtrahend, and borrow, respectively. The full subtractor has three
input states and two output states i.e., diff and borrow.
Half Adder
The Half-Adder is a basic building block of adding two numbers as two
inputs and produce out two outputs. The adder is used to perform OR
operation of two single bit binary numbers. The augent and addent bits
are two input states, and 'carry' and 'sum 'are two output states of the
half adder.

Block diagram

Truth Table

In the above table,

1. 'A' and' B' are the input states, and 'sum' and 'carry' are the output states.
2. The carry output is 0 in case where both the inputs are not 1.
3. The least significant bit of the sum is defined by the 'sum' bit.

NOTE : DRAW K – MAP (SUM & CARRY) & GENERATE BOOLEAN

EXPRESSION & DRAW LOGIC GATE

Full Adder
The half adder is used to add only two numbers. To overcome this
problem, the full adder was developed. The full adder is used to add three
1-bit binary numbers A, B, and carry C. The full adder has three input
states and two output states i.e., sum and carry.
Block diagram

Truth Table

In the above table,

1. 'A' and' B' are the input variables. These variables represent the two
significant bits which are going to be added
2. 'Cin' is the third input which represents the carry. From the previous lower
significant position, the carry bit is fetched.
3. The 'Sum' and 'Carry' are the output variables that define the output
values.
4. The eight rows under the input variable designate all possible
combinations of 0 and 1 that can occur in these variables.

NOTE : DRAW K – MAP (SUM & CARRY) & GENERATE BOOLEAN

EXPRESSION & DRAW LOGIC GATE
Half Subtractor
The half subtractor is also a building block for subtracting two binary
numbers. It has two inputs and two outputs. This circuit is used to subtract
two single bit binary numbers A and B. The 'diff' and 'borrow' are two
output states of the half subtractor.

Block diagram

Truth Table

o 'A' and 'B' are the input variables whose values are going to be
subtracted.
o The 'Diff' and 'Borrow' are the variables whose values define the
subtraction result, i.e., difference and borrow.
o The first two rows and the last row, the difference is 1, but the
'Borrow' variable is 0.
o The third row is different from the remaining one. When we subtract
the bit 1 from the bit 0, the borrow bit is produced.

NOTE : DRAW K – MAP (SUM & CARRY) & GENERATE BOOLEAN

EXPRESSION & DRAW LOGIC GATE
Full Subtractor
The Half Subtractor is used to subtract only two numbers. To overcome
this problem, a full subtractor was designed. The full subtractor is used to
subtract three 1-bit numbers A, B, and C, which are minuend, subtrahend,
and borrow, respectively. The full subtractor has three input states and
two output states i.e., diff and borrow.

Block diagram

Truth Table

o A' and' B' are the input variables. These variables represent the two
significant bits that are going to be subtracted.
o 'Borrowin' is the third input which represents borrow.
o The 'Diff' and 'Borrow' are the output variables that define the
output values.
o The eight rows under the input variable designate all possible
combinations of 0 and 1 that can occur in these variables.
NOTE : DRAW K – MAP (SUM & CARRY) & GENERATE BOOLEAN
EXPRESSION & DRAW LOGIC GATE

A magnitude digital Comparator is a combinational circuit that compares

two digital or binary numbers in order to find out whether one binary
number is equal, less than, or greater than the other binary number. We
logically design a circuit for which we will have two inputs one for A and
the other for B and have three output terminals, one for A > B condition,
one for A = B condition, and one for A < B condition.
What is Magnitude Comparator?
Magnitude comparator is a type of Combinational circuit, It Basically
compares two binary numbers and determines their relative magnitude. It
gives output whether one number is greater than the other, or less than or
equal. These comparators are used in digital systems, such as for sorting
networks, and decision-making circuits to handle numerical comparisons
perfectly without any error.

The circuit works by comparing the bits of the two numbers starting from
the most significant bit (MSB) and moving toward the least significant bit
(LSB). At each bit position, the two corresponding bits of the numbers are
compared. If the bit in the first number is greater than the corresponding
bit in the second number, the A>B output is set to 1, and the circuit
immediately determines that the first number is greater than the second.
Similarly, if the bit in the second number is greater than the corresponding
bit in the first number, the A<B output is set to 1, and the circuit
immediately determines that the first number is less than the second.
If the two corresponding bits are equal, the circuit moves to the next bit
position and compares the next pair of bits. This process continues until
all the bits have been compared. If at any point in the comparison, the
circuit determines that the first number is greater or less than the second
number, the comparison is terminated, and the appropriate output is
generated.
If all the bits are equal, the circuit generates an A=B output, indicating
that the two numbers are equal.
There are different ways to implement a magnitude comparator, such as
using a combination of XOR, AND, and OR gates, or by using a cascaded
arrangement of full adders. The choice of implementation depends on
factors such as speed, complexity, and power consumption.
1-Bit Magnitude Comparator
A comparator used to compare two bits is called a single-bit comparator. It
consists of two inputs each for two single-bit numbers and three outputs to
generate less than, equal to, and greater than between two binary
numbers.
The truth table for a 1-bit comparator is given below.

From the above truth table logical expressions for each output can be
expressed as follows.

NOTE : FIND THE KMAP FOR GIVEN CONDITIONS & GENERATE LOGIC
GATES
2-Bit Magnitude Comparator
A comparator used to compare two binary numbers each of two bits is
called a 2-bit Magnitude comparator. It consists of four inputs and three
outputs to generate less than, equal to, and greater than between two
binary numbers.
The truth table for a 2-bit comparator is given below.

NOTE : FIND THE KMAP FOR GIVEN CONDITIONS & GENERATE LOGIC
GATES