Logic Families CS201n

Logic Families
Digital Logic Design, CS-201n

CSE 3rd Sem.
Classification of Logic
Families
Bipolar logic families
• The bipolar families of logic circuits fabricated using

bipolar transistors on the chip.
• In the Bipolar category there are three basic families

called: Diode Transistor Logic (DTL), Transistor
Transistor Logic (TTL) and Emitter Coupled Logic
(ECL).
• DTL uses diodes and transistors while TTL uses

transistors almost exclusively.
Bipolar logic families
• In the Bipolar Saturated logic families, the bipolar
transistors are used as the main device where it is
used as a switch and operated in the saturation or
cut off regions only.
• TTL is an example of saturated bipolar logic.
• In the Unsaturated bipolar logic family, the bipolar

transistors are not driven into hard saturation. This
increases the speed of operation. So unsaturated
bipolar ICs such as Schottky TTL and ECL ae much
faster as compared to TTL.
Unipolar logic families
• The MOS families are unipolar in nature and are
fabricated using MOS Field Effect Transistors
(MOSFETs) only.
• In the MOS category there are three logic families:
• PMOS (p-channel MOSFETs) family.
• NMOS (n-channel MOSFETs) family.
• CMOS (complementary MOSFETs) family.
• PMOS is the oldest and slowest type. NMOS is used for

the LSI (large scale integration) field such as
Microprocessors and Memories etc.
• CMOS which uses a push pull arrangement of n-

channel and p-channel MOSFETs is extensively used
where low power consumption is required such as
pocket calculators etc.
Digital ICs
Digital ICs are classified according to number of

components or gates inside a digital IC as:
• Small Scale integration (SSI) < 10 components.
• Medium Scale integration (MSI) < 100 components.
• Large Scale integration (LSI) > 100 components.
• Very Large Scale integration (VLSI) > 1000

components.
Characteristics of Digital ICs
 Fan out
 Fan in
 Propagation delay
 Power dissipation
 Noise margin/Noise immunity
 Figure of merit (FoM)
 Current and voltage
 Power supply requirement
 Operating temperature range
 Flexibility available.
Characteristics of Digital ICs
 Fan out - is defined as the maximum no. of logic
gates which can be driven by same category gate.
 Higher the fan out higher the current supplying
capacity of a gate.
 Fan in – the no. of inputs of the logic gate.

: for example a two i/p gate will have fan in
equal to 2.
Propagation delay
 The delay time are measured between 50%
voltage level of i/p & o/p waveform.
 There are two delay time- tPHL & tPLH
 tPHL – when o/p goes from high state to low
state.
 tPLH – when o/p goes from low state to high
state.
Power dissipation
• As a result of applied voltage and currents flowing
through the logic ICs some power will be dissipated in
it, in the form of heat.
• This power is in milliwatts.
• Care should be taken to reduce the power dissipation

taking place in the logic IC.
• The power drawn by an IC from the power supply is

given by P = VCC x ICC where ICC is the current drawn
from the power supply.
Power dissipation
• Another importance of power dissipation is that the

product of power dissipation and propagation time
is always a constant.
• Therefore reduction in power dissipation may lead

to increase in propagation delay.
Noise margin / noise immunity
 Noise margin -Noise is an unwanted
electrical disturbance which may induce
some voltage in the connecting wires used
between two gates.
 Noise immunity -The circuit ability to tolerate

noise signal is referred as the noise
immunity.
Figure of merit
• The figure of merit of a logical family is the product of

power dissipation and propagation delay. It is called as
the speed power product. The speed is specified in
seconds (S) and power is specified in watts (W).
Figure of Merit = Propagation delay x Power dissipation
• Practically, the value of Figure of Merit should be as low

as possible.
Current and voltage para.
 VIH = High level input voltage.
 VIL = Low level input voltage.
 VOL= Low level output voltage.
 VOH= High level output voltage.
 IIL = Low level input current.
 IIH = High level input current.
 Power supply requirements.
 The amount of power required by IC is
important to choose proper power supply.
 Operating temperature range-

 Industrial application is 0oC to 70oC
 Military application is -55oC to 125oC
Important logic families are
 TTL-
 It is a transistor transistor logic.
 This is most popular logic family as lot of
functions are available in the family
 The important series are 74xx & 54xx
 It works with power supply of +5v.
The multiple emitter transistor
(a) (b)
Two input TTL-NAND Gate
(a),
Fig. (a)
Two input TTL-NAND Gate
Totem-pole arrangement
 The arrangement of Q3 & Q4 on the o/p side of
a TTL NAND gate is called as the totem -pole
arrangement
Advantages:
 Low propagation delay (In the output HIGH state the

Q3 acts as an emitter follower with low output impedance,
resulting low charging-discharging time for capacitive load)
 Low power dissipation (With Q3 in the circuit, there is
no current through R3 in the output LOW state. So inclusion
of Q3 and D keeps circuit power dissipation low)
 High current sourcing and sinking
capabilities.
TTL Characteristics
 Positive logic- logic 0 = 0v
logic1 = +5v
 Negative logic - logic 0 = +5v

logic1 = 0v
Open collector 2 i/p NAND gate
Comparison
Emitter coupled logic
 When VA and VB = logic ‘0’ = LOW = - 1.7 V.
 Q2 is ON (More F.B. than Q1 and Q3)
 Value of R2 is such that VC of Q2 will be - 0.9 V.
 Then the emitter of Q5 is at, - 0.9 - 0.8 = - 1.7 V.
 So VO2 is LOW (OR operation).
 Similarly, value of R1 is such

that base current of Q4 is very
small and VC of Q1 and Q3 will
be – 0.1 V.
 So emitter of Q4 is at, - 0.1 –
0.8 = - 0.9 V, results in VO1 is
HIGH (NOR Operation).
 When VA or VB or Both = logic ‘1’ = HIGH = - 0.9 V.
 Corresponding transistors are ON (more F.B. than Q2)
and Q2 is OFF then.
 Now the VC of Q1 & Q3 will be - 0.9 V.
 Then the emitter of Q4 is at, - 0.9 - 0.8 = - 1.7 V.
 So VO1 is LOW (NOR operation).
 Similarly, small base current of

Q5 through R2 results in VC of
Q2 = – 0.1 V.
 So emitter of Q5 is at, - 0.1 –
0.8 = - 0.9 V, results in VO2 is
HIGH (OR Operation).
Emitter coupled logic- NOT
gate
ECL Characteristics
Integrated Injection logic (I2L)
Integrated Injection logic (I2L)
Two Input I2L NAND Gate
 I2L Logic Family:

 tpd = 1 ns
 PD = 1 mW
 NM = 0.35 V
 Fan-out = 8 Two Input I2L NOR Gate
 Cost = Very Low.
MOS LOGIC FAMILIES
MOS LOGIC FAMILIES
N-MOS CIRCUIT
N-MOS INVERTER
N-MOS INVERTER
N-MOS INVERTER
N-MOS NAND GATE
N-MOS NAND GATE
 Operation:
N-MOS NOR GATE
N-MOS NOR GATE
 Operation:
P-MOS INVERTER GATE
P-MOS INVERTER GATE
C-MOS
C-MOS INVERTER
C-MOS INVERTER
C-MOS INVERTER
C-MOS NOR GATE
C-MOS NOR GATE
C-MOS NOR GATE
C-MOS NAND GATE
C-MOS NAND GATE
C-MOS NAND GATE
C-MOS
Advantage:
 Low power dissipation.
 High fan out typically 50.
 High noise margin..
 Capable of working over a wide range of supply voltage.
 Switching speed comparable to those of TTL.
 High packaging density since MOS device need less space.
Disadvantage:
 Propagation delay longer than those of TTL (25 TO 100ns).
 Slower than TTL.
 Need protection circuitry (against static charges).
C-MOS
Comparison
Comparison

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Logic Families

Digital Logic Design, CS-201n

• The bipolar families of logic circuits fabricated using

• In the Bipolar category there are three basic families

• DTL uses diodes and transistors while TTL uses

• TTL is an example of saturated bipolar logic.

• In the Unsaturated bipolar logic family, the bipolar

• PMOS is the oldest and slowest type. NMOS is used for

• CMOS which uses a push pull arrangement of n-

Digital ICs are classified according to number of

• Small Scale integration (SSI) < 10 components.

• Medium Scale integration (MSI) < 100 components.

• Large Scale integration (LSI) > 100 components.

• Very Large Scale integration (VLSI) > 1000

 Fan in – the no. of inputs of the logic gate.

• This power is in milliwatts.

• Care should be taken to reduce the power dissipation

• The power drawn by an IC from the power supply is

• Another importance of power dissipation is that the

• Therefore reduction in power dissipation may lead

 Noise immunity -The circuit ability to tolerate

• The figure of merit of a logical family is the product of

Figure of Merit = Propagation delay x Power dissipation

• Practically, the value of Figure of Merit should be as low

 Operating temperature range-

 Low propagation delay (In the output HIGH state the

 Negative logic - logic 0 = +5v

 Similarly, value of R1 is such

 Similarly, small base current of

Two Input I2L NAND Gate

 I2L Logic Family:

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