chapter 23 Digital Systems 543

23.13 Karnaugh maps

for simplifying Here we look at Karnaugh maps and how these can be used to simplify logic
combinational logic expressions. Minimizing logic expressions using Boolean algebra theory can
be quite a tricky process, as it is quite often difficult to tell when the sim-
plest version has been reached. Karnaugh maps are a powerful, widely used,
graphical method of logic simplification that will always give the simplest
sum-of-products form. Karnaugh maps allow expressions with up to four
variables to be handled in a straightforward manner, and can be used with
expressions of up to six variables. A Karnaugh map is a way of rearranging
a truth table so that terms which can be grouped together are therefore
simplified and are more easily identified. Each cell in the Karnaugh map
corresponds to one line in the truth table. The map is, in essence, nothing
more than the truth table redrawn.
The main stages to creating a logic expression using a Karnaugh map are:
1. Draw the empty Karnaugh map.
2. Fill in the 1s and 0s. (The information could come from different sources,
i.e. from a logic expression or a truth table.)
3. Draw the loops on the Karnaugh map.
4. Create the expression for each loop to give the entire logic expression.
We will consider each of these stages here and then look at some complete
examples.

(a) Creating an empty Karnaugh map

The number of inputs defines how the empty Karnaugh map should be
drawn. For two variables, A and B, there are four possible states. A two-­
variable Karnaugh map therefore has four cells as shown in Fig. 23.22. These
four cells are the equivalent of a truth table (Table 23.7), where the input

Fig. 23.22 Two-variable A

Karnaugh map B
1
0

0 1
0

2 3
1

Table 23.7   Truth table for two

variables. Binary code for inputs B A Output Binary code
are shown in the rightmost
column 0 0 002 = 010
0 1 012 = 110
1 0 102 = 210
1 1 112 = 310
544 section 2 ELECTRONIC ENGINEERING

variables of the function are given on the outside of the table (A and B for
this case), and the result of the function is given in the appropriate cell of the
Karnaugh map. The small numbers in the top left corner of each cell show
the binary code for that cell. Sometimes you will be given inputs in terms
of the binary code. The input on the left (in this case B) is used as the most
significant bit when calculating the binary code. Where binary numbers have
A as the least significant bit and B, C and D rising powers of 2 it is easier to
enter variables into a Karnaugh map if they are set up as shown here with D,
C, B and A going from left to right. However, if you prefer to use A, B, C and
D from left to right you will still get the correct answers; both approaches
are correct and it is a matter of personal preference. It is useful to have the
binary code numbers there as a convenient way of referring to each cell. Each
of the cells corresponds to one state from the function’s truth table. Each of
the cells corresponds to one minterm – a minterm is the ANDing of one
combination of all of the inputs of a function.
The appropriate output of the function to be simplified can then be entered
in each cell. Karnaugh maps for three (Fig. 23.23) and four (Fig. 23.24) varia-
bles have 8 and 16 cells respectively. For five or six variables, three-dimensional
maps or map-entered variables have to be used.

Fig. 23.23 Three-variable A

Karnaugh map CB 0 1

0 1
00

2 3
01

6 7
11

10 4 5

BA
C 00 01 11 10

0 1 3 2
0

4 5 7 6
1
 chapter 23 Digital Systems 545

Fig. 23.24 Four-variable BA

Karnaugh map
DC 00 01 11 10

0 1 3 2
00

4 5 7 6
01

12 13 15 14
11

8 9 11 10
10

(b) Filling in the Karnaugh map

Each cell of the Karnaugh map is filled with a 1 or a 0 signifying the output
for that cell. The information supplied enabling you to fill in the 1s and 0s
for the output in the Karnaugh map could be supplied in various formats.
For example:
• by specifying the binary numbers that correspond to an output of 1;
• from a logic expression;
• from a truth table;
• squares containing logic 0 terms may be left blank.

(c) Filling in a Karnaugh map given the binary code numbers

The output information may be supplied by giving the binary cell numbers
for an output of 1 and stating what the input variables are.

Example 23.6 Fill out the Karnaugh map given G = 1, 2, 3 with input variables BA.
First look at what the question tells us. G is the name for the output in
this case. We are told that there are two inputs, B and A. This specifies the
form of the Karnaugh map, shown in Fig. 23.22. The binary cell numbers
have been shown. Make sure you understand how to get these numbers; they
come from the input variables A and B in this case.
The numbers in the statement G = 1, 2, 3 tell us where in the Karnaugh
map logical 1s occur. If we fill in 1s in the specified cells (corresponding to
the numbers 012, 102, 112) and 0s in the other cells we get the Karnaugh map
shown in Fig. 23.25. You may have noticed that this is the Karnaugh map for
the OR function.
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Fig. 23.25 Completed A

Karnaugh map 0 1
B
0 1
0 0 1

2 3
1 1 1

Example 23.7 Fill out the Karnaugh map given F = 0, 5, 6, 8, 12, 13 with input
variables DCBA.
What is this problem specification? F is the name for the output in this
case. We are told that there are four inputs, D, C, B and A. This specifies the
form of the Karnaugh map, shown in Fig. 23.24. The binary cell numbers
have been shown. Again, make sure you understand how to get these numbers.
The numbers in the statement F = 0, 5, 6, 8, 12, 13 tell us where in the
Karnaugh map logical 1s occur (by converting the numbers to their binary
form). If we fill in 1s in the specified cells and 0s in the other cells we get the
Karnaugh map shown in Fig. 23.26.

Fig. 23.26 Completed Karnaugh BA

map for F = 0, 5, 6, 8, 12, 13
DC 00 01 11 10
with inputs DCBA
0 1 3 2
00 1 0 0 0

4 5 7 6
01 0 1 0 1

12 13 15 14
11 1 1 0 0

8 9 11 10
10 1 0 0 0

(d) Filling in a Karnaugh map given a logic expression

Sometimes the information required to fill out the Karnaugh map will be
given in terms of a logic expression, where the idea of using the Karnaugh
map would be to find a simpler logic expression. When you are given a logic
expression (for instance, F = A # B + A # B + A # B), the expression tells
us what inputs give an output of 1.
When a line is present over an input this means the input is 0; with no
line the input is 1.
 chapter 23 Digital Systems 547

Example 23.8 Given the following logic expression create and fill out a Karnaugh
map:

F = A#B + A#B + A#B

The expression given above tells us we are looking at using a two-input
Karnaugh map with inputs A and B (Fig. 23.22), and the individual product
terms in the expression tell us which cells have a 1 in them.
For instance, in the expression for F given here, this can be translated as
having outputs of 0 for all combinations of inputs for A and B, except when
A = 0 and B = 1 1A # B2, when A = 1 and B = 0 1A # B2, and when
A = 1 and B = 1 1A # B2; this is the same as the function shown in the
Karnaugh map in Fig. 23.25. You may have noticed that this is the Karnaugh
map for the OR function, i.e. A + B.

Example 23.9 Given the following logic expression create and fill out a Karnaugh
map:

G = A # B#C#D + A#B # C#D + A#B # C # D + A # B # C # D

+ A#B#C # D + A#B#C#D + A# B#C#D
+ A#B#C#D + A# B#C#D
The expression given above tells us we are looking at using a four-input
Karnaugh map with inputs A, B, C and D (Fig. 23.24), and the individual
product terms in the expression tell us which cells have a 1 in them.
For instance, in the expression for G given here, this can be translated as hav-
ing outputs of 0 for all combinations of inputs for A, B, C and D, except for the
nine inputs given. A # B # C # D tells us there is a 1 when A = 1, B = 0, C = 0
and D = 0. A # B # C # D tells us there is a 1 when A = 1, B = 1, C = 0 and
D = 0. A # B # C # D tells us there is a 1 when A = 0, B = 0, C = 1 and
D = 0 and so on. The resulting Karnaugh map can be seen in Fig. 23.27.

Fig. 23.27 Karnaugh map BA

for four specified inputs 00 01 11 10
DC
0 1 3 2
00 0 1 1 0

4 5 7 6
01 1 1 1 1

12 13 15 14
11 0 0 0 1

8 9 11 10
10 1 0 0 1
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Plotting a Karnaugh map from a truth table for a function involves plot-
ting a ‘1’ in the map if a particular minterm is included in the truth table, i.e.
a ‘1’ is plotted for each map square where X = 1.

Example 23.10 Given the truth table for the function G in Table 23.8, fill in the cells
of the Karnaugh map.

Table 23.8   Truth table for

function G A B C D G

0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 0
0 1 0 0 0
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
1 0 0 1 0
1 0 1 0 1
1 0 1 1 0
1 1 0 0 1
1 1 0 1 0
1 1 1 0 1
1 1 1 1 0

Considering the inputs in the order DCBA, the truth table is shown again
in Table 23.9 with binary code so that the cells can be matched with the
resulting Karnaugh map shown in Fig. 23.27.

Table 23.9   Truth table for

function G A B C D G Binary code DCBA

0 0 0 0 0 0
0 0 0 1 1 8
0 0 1 0 1 4
0 0 1 1 0 12
0 1 0 0 0 2
0 1 0 1 1 10
0 1 1 0 1 6
0 1 1 1 1 14
1 0 0 0 1 1
1 0 0 1 0 9
1 0 1 0 1 5
1 0 1 1 0 13
1 1 0 0 1 3
1 1 0 1 0 11
1 1 1 0 1 7
1 1 1 1 0 15
 chapter 23 Digital Systems 549

(e) Creating loops in Karnaugh maps

Each cell of a Karnaugh map must have the appropriate output, for the
function being represented, entered into it. When all the values are entered
all of the 1s present must be grouped together according to the following
rules:
• Groups must contain 2n adjacent cells, each containing a 1.
• The groups should be made as large as possible, while remaining integer
powers of 2.
• The groups have to be square or rectangular.
• The larger the groups chosen, the simpler the function, as with each
increase of power of 2 in the size of the group, the group becomes depend-
ent on one less variable. So the minimal form is obtained with the largest
possible groups that are integer power of 2.
• All cells containing a 1 must be included in at least one group.
• The groups may overlap, so one cell may be included in several groups,
but any group that has all its elements included in other groups is not
required.
• There may be several correct minimal forms for a given logic function,
dependent upon the particular groupings that are chosen.
The edges of a Karnaugh map are adjacent to each other because of the
binary code used for labelling the cells. This means that groups can join from
the left side to the right side and from the top to the bottom.
Using these rules the minimal form of a logic expression can be formed.
The inverse of a function can be found using the same method, but grouping
the 0s instead of the 1s.

Example 23.11 Consider the Karnaugh map shown in Fig. 23.17. Illustrate a possible
set of loops.
A typical set of loops can be seen in Fig. 23.28.

Fig. 23.28 A Karnaugh map for BA

four inputs 00 01 11 10
DC
0 1 3 2
00 0 1 1 0

4 5 7 6
01 1 1 1 1

12 13 15 14
11 0 0 0 1

8 9 11 10
10 1 0 0 1
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(f) Going from the loops to a logic expression

Once the loops have been assigned a logic expression can be created. This is
done one loop at a time. For each loop write down the inputs that describe
that specific loop.

Example 23.12 Consider the loops shown in Fig. 23.28. We will look at generating the
expression.
Consider the four loops one at a time, as shown in Fig. 23.29, and calcu-
late the logic expression for each loop.

Fig. 23.29 Karnaugh map with BA

identified loops 00 01 11 10
DC
Loop 1
0 1 3 2
00 0 1 1 0

4 5 7 6
01 1 1 1 1 Loop 2

12 13 15 14 Loop 3
11 0 0 0 1

8 9 11 10
10 1 0 0 1

Loop 4

Loop 1 is A # D, loop 2 is C # D, loop 3 is A # B # D and loop 4 is A # C # D.

Finally we create the simplified logic expression by ORing the individual
expressions giving the expression
A#D + C#D + A#B#D + A#C#D

23.14 Timing diagrams

So far, most of this chapter has assumed steady input conditions. In the
sections dealing with bistable circuits and registers we have inferred that
the inputs might vary. In practice, most digital systems are responding to a
digitally varied set of inputs.
If an input signal is 1 then it is said to be HIGH and if it is 0 then the
input is LOW. Let us consider a simple AND gate, as shown in Fig. 23.30,
with varying inputs to A, B and C. In this example we wish to determine the
output waveform.
The output waveform can only be HIGH when all three input signals are
HIGH, hence we can draw the output waveform as shown.
A similar output waveform can be derived for an OR gate as shown in
Fig. 23.31.
 chapter 23 Digital Systems 551

Fig. 23.30 AND gate timing

diagram A
A
B F
C
B

Fig. 23.31 OR gate timing

diagram A
A
B F
C
B

23.15 Combinational
and sequential In the previous sections the logic circuits have had the outputs as a function
logic circuits only of the inputs; these are termed combinational logic circuits. If the input
state of a combinational circuit is known, then the output is also wholly
determined.
A sequential logic circuit differs from a combinational logic circuit in that
the outputs depend not only upon the inputs applied to the circuit, but also
on the previous state of the circuit.
For sequential circuits some means is required for defining when the cir-
cuit moves from one state to the next. This is termed timing and is usually
provided by a signal input called a clock. A clock input is usually a square,
rectangular or pulse waveform which provides a regular timing signal to
control when changes occur. Additionally, a sequential logic circuit must
provide some means for storing the previous state of the circuit. This stor-
age element is called a memory or register. Basic memory elements can be
constructed from the basic combinational logic elements already covered
connected together using positive feedback. These sequential logic circuits
are also termed state machines, because they progress from one state to the
next as timed by the clock input.

23.16 Synchronous
and An important distinction is made between synchronous and asynchronous
asynchronous sequential circuits.
sequential circuits A synchronous logic circuit is one in which all the outputs change at the
same time, in step with each other (i.e. they are synchronized). This timing
is usually provided by one edge of the clock signal.