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Department of Electronics and Communication Skill Assessment-II

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27 views14 pages

Department of Electronics and Communication Skill Assessment-II

Uploaded by

roghithjaya
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Department of Electronics and Communication

Skill Assessment-II

Subject Code Subject Name Submission Date

19EC526 Verilog HDL 19/11/2024

Name of the Faculty Dr. Arunkumar K


Name of the Student

Register Number

Department
Slot Name 4L4-2
Actual Submission Date

Marks Obtained
ABSTRACT

This project presents the design and implementation of a digital clock with an integrated
alarm system using Verilog Hardware Description Language (HDL). The design includes a
modular approach to implement a 24-hour timekeeping system, with second, minute, and
hour counters. The alarm functionality allows the user to set a specific time at which the
alarm activates.

The clock module uses a clock divider to derive a 1 Hz signal from a higher-frequency clock
input, ensuring accurate timekeeping. The counters are implemented using registers and
combinational logic for incrementing and resetting upon overflow. The alarm module
monitors the current time and triggers an output signal when the set time matches the
current time. Additional features, such as alarm enable/disable and reset functionality, are
included for flexibility.

This design is synthesized for implementation on Field-Programmable Gate Arrays (FPGAs)


or Application-Specific Integrated Circuits (ASICs). It provides an efficient, reliable, and
scalable solution for applications requiring precise timekeeping and alarm mechanisms.
CICUIT DESIGN

Explanation:

1. Clock Counter:
a. Increments seconds, minutes, and hours sequentially.
b. Resets on a reset signal.
2. Alarm Setting:
a. The alarm hours and alarm minutes registers can be
set externally to configure the desired alarm time.
3. Alarm Comparator:
a. Compares the current time with the alarm setting.
b. Activates the alarm signal when a match is found.
4. Clock Tick Generation:
a. Generates clock ticks for seconds, minutes, and hours using a
generate-for loop.
b. These ticks are used to increment the appropriate counters.

5. Reset Logic: Implement a robust reset mechanism to initialize the


clock and alarm settings.

6. Alarm Silence: Incorporate a mechanism to silence the alarm, such as


a push-button or a timer-based deactivation.

7. Real-Time Clock (RTC) Integration: For more accurate


timekeeping, consider integrating an RTC module.

8. Testbench: Create a comprehensive testbench to verify


the functionality of the clock with alarm.
BLOCK DIAGRAM
FLOW CHART
VERILOG CODE
module Aclock(
input reset,
input clk,
input [1:0] H_in1,
input [3:0] H_in0,
input [3:0] M_in1,
input [3:0] M_in0,
input LD_time,
input LD_alarm,
input STOP_al,
input AL_ON,
output reg Alarm,
output [1:0] H_out1,
output [3:0] H_out0,
output [3:0] M_out1,
output [3:0] M_out0,
output [3:0] S_out1,
output [3:0] S_out0),
reg clk_1s;
reg [3:0] tmp_1s;
reg [5:0] tmp_hour, tmp_minute, tmp_second;
reg [1:0] c_hour1,a_hour1;
reg [3:0] c_hour0,a_hour0;
reg [3:0] c_min1,a_min1;
reg [3:0] c_min0,a_min0;
reg [3:0] c_sec1,a_sec1;
reg [3:0] c_sec0,a_sec0;
function [3:0] mod_10;
input [5:0] number;
begin
mod_10 = (number >=50) ? 5 : ((number >= 40)? 4 :((number >= 30)? 3 :((number >= 20)?
2 :((number >= 10)? 1 :0))));
end
endfunction
always @(posedge clk_1s or posedge reset )
begin
if(reset) begin
a_hour1 <= 2'b00;
a_hour0 <= 4'b0000;
a_min1 <= 4'b0000;
a_min0 <= 4'b0000;
a_sec1 <= 4'b0000;
a_sec0 <= 4'b0000;
tmp_hour <= H_in1*10 + H_in0;
tmp_minute <= M_in1*10 + M_in0;
tmp_second <= 0;
end
else begin
if(LD_alarm) begin
a_hour1 <= H_in1;
a_hour0 <= H_in0;
a_min1 <= M_in1;
a_min0 <= M_in0;
a_sec1 <= 4'b0000;
a_sec0 <= 4'b0000;
end
if(LD_time) begin
tmp_hour <= H_in1*10 + H_in0;
tmp_minute <= M_in1*10 + M_in0;
tmp_second <= 0;
end
else begin
tmp_second <= tmp_second + 1;
if(tmp_second >=59) begin
tmp_minute <= tmp_minute + 1;
tmp_second <= 0;
if(tmp_minute >=59) begin
tmp_minute <= 0;
tmp_hour <= tmp_hour + 1;
if(tmp_hour >= 24) begin
tmp_hour <= 0;
end
end
end
end
end
end
always @(posedge clk or posedge reset)
begin
if(reset)
begin
tmp_1s <= 0;
clk_1s <= 0;
end
else begin
tmp_1s <= tmp_1s + 1;
if(tmp_1s <= 5)
clk_1s <= 0;
else if (tmp_1s >= 10) begin
clk_1s <= 1;
tmp_1s <= 1;
end
else
clk_1s <= 1;
end
end
always @(*) begin

if(tmp_hour>=20) begin
c_hour1 = 2;
end
else begin
if(tmp_hour >=10)
c_hour1 = 1;
else
c_hour1 = 0;
end
c_hour0 = tmp_hour - c_hour1*10;
c_min1 = mod_10(tmp_minute);
c_min0 = tmp_minute - c_min1*10;
c_sec1 = mod_10(tmp_second);
c_sec0 = tmp_second - c_sec1*10;
enD
assign H_out1 = c_hour1;
assign H_out0 = c_hour0;
assign M_out1 = c_min1;
assign M_out0 = c_min0;
assign S_out1 = c_sec1;
assign S_out0 = c_sec0;
always @(posedge clk_1s or posedge
reset) begin
if(reset)
Alarm <=0;
else begin
if({a_hour1,a_hour0,a_min1,a_min0,a_sec1,a_sec0}=={c_hour1,c_hour0,c_min1,c_min0,c_sec
1,c_sec0})
begin / if(AL_ON) Alarm <= 1;
end
if(STOP_al)
Alarm <=0;
end
end
OUTPUT
APPLICATION

1. Consumer Electronics

 Digital Alarm Clocks: Used in personal clocks to set alarms for waking up or
reminders.
 Smart Home Devices: Integrated into smart appliances like coffee makers or
thermostats to schedule tasks.

2. Industrial Automation

 Timing Control Systems: Used in machinery to trigger events at specific times,


such as starting or stopping processes.
 Scheduled Alerts: Alarms can notify operators about maintenance or specific events.

3. Embedded Systems

 Microcontroller-Based Systems: Provides timekeeping and alerting functionalities


in embedded devices like IoT systems.
 Real-Time Systems: Ensures timely operations in systems like automotive
dashboards or factory monitoring equipment.

4. Healthcare and Medical Devices

 Medication Reminders: Used in medical devices to alert patients for taking


medicines.
 Patient Monitoring: Triggers alarms during critical situations or time-based alerts
for caregivers.

5. Educational Tools

 Learning Modules: Useful for teaching digital design and Verilog HDL concepts in
academic settings.
 Simulation Models: A practical example for students to explore time-based event
generation and hardware design.
6. Test and Measurement Equipment

 Scheduled Testing: Triggers tests at precise intervals for validation in hardware


test benches.
 Data Logging: Supports timed data collection in instrumentation systems.

7. Military and Aerospace

 Mission Control Systems: Used to generate alarms for scheduled actions during
missions.
 Navigation Systems: Provides precise timekeeping and reminders in aviation and
maritime applications.

8. Communication Systems

 Network Synchronization: Helps maintain timing consistency in distributed


networks.
 Scheduled Data Transfers: Triggers alarms for initiating data transmissions at
specific intervals.

9. Automotive Applications

 Vehicle Systems: Embedded in dashboards for timekeeping and alert generation,


such as service reminders.
 Driver Assistance: Alerts drivers to take breaks during long trips.

10. Home Automation Systems

 Lighting Control: Turns lights on/off based on schedules.


 Energy Management: Alarms or timers to optimize energy usage, such as HVAC
scheduling.
CONCLUSION
The design and implementation of a clock with an alarm generator using Verilog HDL
demonstrate the practicality and versatility of digital design in modern embedded and
hardware systems. By leveraging the modularity and flexibility of Verilog, the clock
successfully integrates precise timekeeping and alarm functionalities. The system can serve
as a foundation for a wide range of applications, from consumer electronics to industrial
automation and real-time systems.

The Verilog-based implementation offers scalability, allowing for enhancements such as


additional alarms, user interfaces, or integration with external devices. The design is also
well-suited for FPGA or ASIC deployment, ensuring real-time performance and low power
consumption. Overall, this project underscores the importance of HDL in developing
efficient, reliable, and customizable digital systems, catering to diverse practical
applications in everyday life and specialized industries.

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