Gate Level Minimization

Unit-II
Module-IV
Gate Level Minimization

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Mikhail Osipovich Dolivo-Dobrovolsky (2 January 1862 –
15 November 1919) was a Russian engineer, electrician, and

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inventor. He was born in Gatchina near Saint Petersburg,
into a family of mixed origins, through the connection be-
tween a Polish noble of his grandfather’s family originating

c
from Mazowsze and a Russian noble family. He emigrated to
Germany because of his political view persecution after the

e
assassination of Alexander II of Russia (1881). He studied at
the Darmstadt University of Technology (TH Darmstadt) in

p
Germany. From 1887 he worked for AEG.

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The K-map method, four-variable map, five-variable map, product of sums
simplification, don’t-care conditions, Quine-McCluskey method, NAND and
NOR implementation, Exclusive-OR function.

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Digital System Design

2.0 OBJECTIVES

 To understand the importance of K-map method in getting a simplified expression.

 To understand the SOP and POS forms.
 To understand using don’t care conditions in K-map.
 To understand the minimization of functions using NAND and NOR implementation.

2.1 KARNAUGH MAP MINIMIZATION

In previous, we have simplified the Boolean functions using Boolean algebra or postulates and
theorems. The postulates method becomes more complicated if the number of terms or variables

m
increased in the given function. It is a time consuming process and we have to re-write the
simplified expressions after each step. Hence another technique is needed to simplify the bool-

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ean expression.To overcome this difficulty, Karnaugh introduced a method for simplification of

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Boolean functions in an easy way. This method is known as Karnaugh map method or K-map
method. It is a graphical method, which consists of 2 n cells for ‘n’ variables.
2.1.1 Karnaugh Map(K-Map)

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Karnaugh map gives us a systematic approach for simplifying a Boolean expression. This K-map
method was first proposed by veitch and modified by Karnaugh. Hence it is also known as veitch

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n
diagram. K-map contains boxes called cells. A ‘n’ variable K-map contains 2 boxes.The adja-
cent cells are differed only in single bit position.K-Map method is most suitable for minimizing

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Boolean functions of 2 variables to 5 variables. Now, let us discuss about the K-Maps for 2 to 5
variables one by one.
2.1.1.1 One Variable K-map

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A one variable K-map contains 21  2cells .

A 0

A 1
0

1
A
A 0 A

A 1 A
0

1
A
A 0

A 1
m0

m1
0

Figure-2.1: One variable k-map Figure-2.2: One variable k-map for SOP or
minterms
A A
A 0 A A 0 M0
0 0

A 1 A A 1 M1
1 1

Figure-2.3: One variable k-map for POS or maxterms

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 Gate Level Minimization
2.1.1.2 Two-variables K-map
A two variable k-map contains 2 2  4cells .
The number of cells in 2 variable K-map is four, since the number of variables is two. The
following figure shows 2 variable K-Map.There is only one possibility of grouping 4 adjacent min
terms.The possible combinations of grouping 2 adjacent min terms are {(m0, m1), (m2, m3), (m0,
m2) and (m1, m3)}.
B B
AB 0B 1B A 1B
A
0B 0B 1B
A 0 A0 AB AB A0 m0 m1
0 1 0 1 0 1
A 1 A1 AB AB A1 m2 m3

m
2 3 2 3 2 3

Figure-2.4: Two variables k-map Figure-2.5: Two variables k-map for SOP or minterms
B
AB 0B 1B

A 0 A+B 0 A+B 1
A 0 B 1B

r
A 0 M0
0
M1
u
1

t
A 1 A+B A+B A1 M2 M3
2 3 2 3

c
Figure-2.6: Two variable k-map for POS or maxterms
2.1.1.3 Three Variable k-map

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A three variable k-map contains 2 3  8cells. The number of cells in 3 variable K-map is eight,
since the number of variables is three. The following figure shows 3 variable K-Map.

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There is only one possibility of grouping 8 adjacent min terms.

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The possible combinations of grouping 4 adjacent min terms are {(m0, m1, m3, m2), (m4,
m5, m7, m6), (m0, m1, m4, m5), (m1, m3, m5, m7), (m3, m2, m7, m6) and (m2, m0, m6, m4)}.
The possible combinations of grouping 2 adjacent min terms are {(m0, m1), (m1, m3), (m3,
m2), (m2, m0), (m4, m5), (m5, m7), (m7, m6), (m6, m4), (m0, m4), (m1, m5), (m3, m7) and (m2,
m6)}.
If A=0, then 3 variable K-map becomes 2 variable K-map.
BC BC BC BC BC
A 00 01 11 10
A0 0 1 3 2

A1 4 5 7 6

Figure-2.7: Three variable k-map

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Digital System Design
BC
BC BC BC BC BC BC BC BC
00 01 11 10 A 00 01 11 10
A 0 ABC ABC ABC ABC A 0 m 0 m1 m3 m2
0 1 3 2
A 1 ABC ABC ABC ABC A 1 m4 m5 m7 m6
4 5 7 6

Figure-2.8: Three- variable k-map for SOP or minterms

BC
A B+C B+C B+C B+C BC
A 00 01 11 10
A A+B+C A+B+C A+B+C A+B+C
0 M 0 M1 M3 M2

m
0 1 3 2
A A+B+C A+B+C A+B+C A+B+C 1 M 4 M5 M7 M6
4 5 7 6

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Figure-2.9: Three variable k-map for POS or maxterms

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2.1.1.4 Four Variable k-map
A 4-variable k-map contains 2 4  16 cells . The number of cells in 4 variable K-map is sixteen,

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since the number of variables is four. The following figure shows 4 variable K-Map.

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There is only one possibility of grouping 16 adjacent min terms.

CD
Gray code sequence

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AB CD CD CD CD
00 01 11 10

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AB 00 0 1 3 2
AB 01 4 5 7 6
AB 11 12 13 15 14

AB
CD
S CD
00
CD
01
AB 10 8 9 11 10
Gray code sequence
Figure-2.10: Four variable k-map
CD
11
CD
10 AB
CD CD
00
CD
01
CD
11
CD
10
AB ABCD ABCD ABCD ABCD AB m m1 m3 m2
0
00 0 1 3 2
00 0 1 3 2
AB ABCD ABCD ABCD ABCD AB m4 m5 m7 m6
01 4 5 7 6 01 4 5 7 6
AB ABCD ABCD ABCD ABCD AB m12 m13 m15 m14
11 12 13 15 14 11 12 13 15 14
AB ABCD ABCD ABCD ABCD AB m8 m9 m11 m10
10 8 9 11 10
10 8 9 11 10

Figure-2.11: Four variable k-map for SOP or minterms

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 Gate Level Minimization

CD C+D C+D C+D C+D

AB
A+B A+B+C+D A+B+C+D A+B+C+D A+B+C+D
0 1 3 2

A+B A+B+C+D A+B+C+D A+B+C+D A+B+C+D

4 5 7 6

A+B A+B+C+D A+B+C+D A+B+C+D A+B+C+D

12 13 15 14

A+B A+B+C+D A+B+C+D A+B+C+D A+B+C+D

8 9 11 10
CD
AB 00 01 11 10

00

01
M0

M4
4
0
M1

M5
1

5
M3

M7
3

7
M2

u
M6
2

m 6

r
M12 M13 M15 M14
11 12 13 15 14

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M8 M9 M11 M10
10 8 9 11 10

c
Figure-2.12: Four variable k-map for POS or maxterms
It is important to note that when we move from one cell to the next along any row or

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column, only one variable in the product term or sum term changes.
2.1.2 Representing Standard SOP or Minterms or k-map

with zeros.

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A Boolean expression in the SOP form can be plotted on the k-map by planning a ‘l’ in each cell
corresponding to a term (Minterm) in the sum of products expression. Remaining cells are filled

Example-1: Plot the Boolean expression F  AB C  ABC  A BC , in K-map.

Sol. Let FA , B, C   ABC  ABC  A BC
ABC  m 6  ABC  m 3  A BC  m1
We can write the given expression as FA, B, C    m1, 3, 6
ABC

BC BC BC BC BC
A 00 01 11 10
1 1 ABC
A 0 0 1 3 2

1 ABC
A 1 4 5 7 6

Figure-2.13: K-map representation for given function

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Digital System Design

Example-2: Plot the boolean expression Y  AB CD  A BC D  ABC D  A BCD .

Sol. Let Y A , B, C, D   ABCD  A BCD  ABCD  A BCD
ABCD  m 5  A BCD  m10  ABCD  m 6  A BCD  m11
We can write the given expression as, Y A, B, C, D    m 5, 6, 10, 11
ABCD

CD CD CD CD CD
AB
00 01 11 10

AB 00 0 0 0 0
0 1 3 2

AB 01

AB 11
0

0
4
1

0
5
0

0
7
1

0
6
ABCD

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r
12 13 15 14

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AB 10 0 0 1 1 ABCD
8 9 11 10

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Figure-2.14: K-map representation for given function
2.1.3 Representing Standard POS or Maxterm on k-map
A Boolean expression inthe POS form can be plotted on the k-map by placing a ‘0’ in each cell
ABCD

with 1’s.

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corresponding to a term (Maxterm) in the product of sum expression. Remaining cells are filled


Example-3: Plot the expression Y  A  B  C A  B  C A  B  C A  B  C 
Sol. The given expression can be plotted using a 3 variable k-map.
A  B  C  M 2  A  B  C  M3  A  B  C  M6  A  B  C  M 0
  

The given expression can also be written as, YA, B, C, D   M0, 2, 3, 6

A+B+C
A+B+C
BC BC BC BC BC
A
00 01 11 10

A 0 0 1 0 0
A+B+C
0 1 3 2

A 1 1 1 1 0 A+B+C
4 5 7 6

Figure-2.15: K-map for function

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 Gate Level Minimization
Example-4: Plot the expression in k map
  
Y  ABCD ABCD A BC D ABCD ABCD   
Sol. The given expression can be plotted using a 4 variable k-map.
A  B  C  D  M1 ; A  B  C  D  M7

A  B  C  D  M 2 ; A  B  C  D  M15 ; A  B  C  D  M14
We can write the given expression as, YA, B, C, D   M1, 2, 7, 14, 15
(A+B+C+D)
CD
AB 00 01 11 10

00

01
1

1
0
0

1
1
1

0
3
0

1
2

u m
(A+B+C+D)

(A+B+C+D)

11 1
4

12
1
5

13
0
7

15
0

t
6

14r (A+B+C+D)

10 1
8
1

e c 9
1
11
1

Figure-2.16: K-map for given function Y

10

(A+B+C+D)

0
1
p
2.1.4 Representing the Truth table on K-map

S A B
0 0
0 0
C
0
1 0
Z
1
A
BC BC
00

1
BC
01

0
BC
11
0
BC
10
0
A 0
0 1 3 2
2 0 1 0 0
3 0 1 1 0 A 1 0 1 1 0
4 1 0 0 0 4 5 7 6

5 1 0 1 1
6 1 1 0 0
7 1 1 1 1
Table-2.1: Truth table (3 variable) Figure-2.17: K-map for given table

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Digital System Design

A B C D Z
0 0 0 0 0 1
CD CD CD CD CD
AB 1 0 0 0 1 0
00 01 11 10
2 0 0 1 0 0
00 1 0 0 0
AB 3 0 0 1 1 0
0 1 3 2
4 0 1 0 0 0
01 0 1 0 0
5 0 1 0 1 1
AB 4 5 7 6
6 0 1 1 0 0
11 1 0 0 0
7 0 1 1 1 0
AB 12 13 15 14

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8 1 0 0 0 1
10 1 1 0 0
9 1 0 0 1 1
AB 8 9 11 10

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10 0 0 0 0 0
11 1 0 1 1 0

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12
13 1
14
1 1

1 1
1
0
0
1
0 1
1
0 0
0

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Figure-2.18: K-map for given truth table

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15 1

The Z value can be easily represented on k-map, by just converting the binary equivalent
input to decimal.
1 1 1 0
Table-2.2: Truth table (4 variable)

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2.1.5 Grouping two Adjacent Ones (Pair)
In a K map, if 2 adjacent cells have logic 1, then those two cells are mapped and it can be called
as pair. The k-map shown in figure 2.19 contains a pair of l’s that are horizontally adjacent. The
first represents A BC and the second represents ABC . In these two terms only the variable ‘B’
appears in both normal and complement form. Thus these two terms can be combined to give a
resultant that eliminates the variable ‘B’. Let us see some examples.
BC BC BC BC
BC
A 00 01 11 10
AC
A 0 0 1 1 0
0 1 3 2

A 1 0 0 0 0
4 5 7 6

Figure-2.19: K-map contains in horizontally adjacent

Y  A BC  ABC  AC B  B  AC . 
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 Gate Level Minimization

BC BC BC BC
BC
A 00 01 11 10

A 0 0 1 0 0
0 1 3 2

A 1 0 1 0 0
4 5 7 6

BC
Figure-2.20: K-map contains a pair of 1’s in vertically adjacent
 
Y  A BC  A BC  A  A BC  BC
BC BC BC BC
BC

m
A 00 01 11 10

A 0 1 0 0 1

A 1 0 0 0

r
0

u
c
AC

t
Figure-2.21: K-map contains ia pair of 1’s at corner adjacent cells

Y  A BC  ABC  AC B  B  A C 

p AB
CD CD
00
e
In the k-map shown in figure 2.21 the left most column and the right most column are
considered to be adjacent because they differ by one variable.
CD
01
CD
11
CD
10

S
AB 00 0 0 1 0
0 1 3 2

AB 01 0 0 0 0
4 5 7 6
BCD
AB 11 0 0 0 0
12 13 15 16

AB 10 0 0 1 0
8 9 11 10

Figure-2.22: Example for pair in 4 variable K-map


Y  A BCD  A BCD  BCD A  A  BCD 
In the k-map shown in figure 2.22 the two l’s from top row and bottom row of same column
are combined to eliminate variable ‘A’. Since the top row and bottom row are considered to be
adjacent.
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Digital System Design

BC BC BC BC BC
A 00 01 11 10 AB

A 0 1 1
0 1 3 2

A 1 1
4 5 7 6

BC
Figure-2.23
Y  ABC  ABC  ABC  ABC
   

m
Y  AB  C  C  BC A  A  AB  BC
BC BC BC BC BC
A 00 01 11 10

u
AB

A 0 0 0 1 1

A 1 0
0

4
1
1

5
1
3

t r 2

6
Pair
not
needed

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Y  ABC  ABC  A BC  ABC  AB C  C  AC B  B
AC
Figure-2.24
   

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 AB  AC
In figure 2.24 two pairs are enough to indicate all l’s present in the k-map. In such cases
third pair is not required.

A
BC
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Grouping Four Adjacent Ones (Quad)

BC
00
BC
01
BC
11
BC
10
AB
CD

AB
00
CD
00

0
0
CD
01

1
1
CD
11

0
3
CD
10

0
2

AB 0 1 0 0
01
A 0 1 1 1 1 4 5 7 6

0 1 3 2 AB 0 1 0 0
11 12 13 15 14
A 1
4 5 7 6 AB 0 1 0 0
10
8 9 11 10

CD
Figure-2.25 Figure-2.26: Grouping 4 adjacent ones in K-map

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 Gate Level Minimization
In k-map 4 adjacent l’s can be grouped. Then such group is known as quad (or) square.
Figure 2.25 shows the grouping of 4 adjacent horizontal l’s and figure 2.26 shows the grouping of
4 adjacent vertical l’s.

CD CD CD CD CD
AB 00 01 11 10
CD CD CD CD CD
AB 00 01 11 10 AB
1 0 0 1
AB 00 0 1 3 2
0 0 0 0
00 0 1 3 2
BD AB 1 0 0 1
AB 0 1 1 0 01 4 5 7 6
01 4 5 7 6
AB 0 0 0 0

m
AB 0 1 1 0 11 12 13 15 14
11 12 13 15 14
AB 0 0 0 0

u
AB 0 0 0 0 10
10 8 9 11 10
8 9 11 10

Figure-2.27
AD

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Figure-2.28: Shows the grouping of four l’s in a square
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In the k-map shown in figure 2.29, the corner terms are adjacent. Hence they can be
grouped as a square.

AB
CD CD
00
CD
01
AB
CD
11

e c
CD
10

p
1 0 0 1
00 0 1 3 2

AB

S
0 0 0 0
01 4 5 7 6

AB BD
0 0 0 0
11 12 13 15 14

AB
1 0 0 1
10
8 9 11 10

Figure-2.29: Corner terms are adjacent in K-map

Y  A BC D  A BC D  A BC D  A BC D
 
 A BD C  C  A BD C  C  
 A BD  A BD
 
 B D A  A  BD
Figure 2.30 shows overlapping square groups.
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Digital System Design

CD CD CD CD CD
AB 00 01 11 10
AB
00 0 1 3 2

AB 1 1 1 1
01 AB
4 5 7 6

AB BC
1 1 1
11 12 13 15 14

AB BD
10
8 9 11 10

Figure-2.30: Overlapping square groups in K-map

Hence Y  AB  BC  BD
2.1.6 Grouping Eight Adjacent Ones(octet)
CD CD CD CD CD CD CD

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CD
m CD

r
CD
AB 00 01 11 10 AB 00 01 11 10

t
AB 0 0 0 0 AB 0 1 1 0
00 0 1 3 2 00 0 1 3 2

c
AB 0 0 0 0 AB 0 1 1 0
01 4 5 7 6
01 4 5 7 6

AB
11
AB
10

p
1

1
12

8
1

1
13

9
1

1 e
15

11
1
1
14

10
AB
11
AB
10
0

0
12

8
1

1
13

9
1
1
15

11
0

0
14

10

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Y=A Y=D
Figure-2.31 Figure-2.32
CD CD CD CD CD CD CD CD CD CD
AB 00 01 11 10 AB 00 01 11 10
AB 1 1 1 1 AB 1 0 0 1
00 0 1 3 2
00 0 1 3 2

AB 0 0 0 0 AB 1 0 0 1
01 4 5 7 6
01 4 5 7 6

AB 0 0 0 0 AB 1 0 0 1
11 12 13 15 14
11 12 13 15 14

AB 1 1 1 1 AB 1 0 0 1
10 10
8 9 11 10 8 9 11 10

Y=B Y=D
Figure-2.33 Figure-2.34

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 Gate Level Minimization

Y  A BC D  A BCD  ABCD  ABCD  ABCD  ABCD  A BCD  A BCD

    
 A BD C  C  ABD C  C  ABD C  C  A BD C  C   
 
 A BD  ABD  ABD  A BD  A  A BD  A  A BD  

 BD  BD  B  B D  D 
2.1.7 Simplification of SOP Expression or Minterms using K-map
If we consider the combination of inputs for which the Boolean function is ‘1’, then we will get
the Boolean function, which is in standard sum of products form after simplifying the K-map.
Similarly, if we consider the combination of inputs for which the Boolean function is ‘0’,
then we will get the Boolean function, which is in standard product of sums form after simpli-
fying the K-map.
 We have studied how combination of pairs, quads and octects on a k-map can be used to
simplify the expression.

u m
 An octet of 1s eliminates three variables, a quad of 1’s eliminates two variables and a pair
of 1’s eliminates, 1 variable. Each group gives us a product term and summation of all
product terms gives us a simplified boolean expression.

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Follow these Rules for Simplifying K-maps in Order to Get Standard Sum of Products
Form
1. Select the respective K-map based on the number of variables present in the Boolean
function.

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2. If the Boolean function is given as sum of min terms form, then place the ones at respective
min term cells in the K-map. If the Boolean function is given as sum of products form, then
place the ones in all possible cells of K-map for which the given product terms are valid.
3. Check for the possibilities of grouping maximum number of adjacent ones. It should be

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powers of two. Start from highest power of two and upto least power of two. Highest
power is equal to the number of variables considered in K-map and least power is zero.
4. Each grouping will give either a literal or one product term. It is known as prime implicant.

S
The prime implicant is said to be essential prime implicant, if atleast single ‘1’ is not covered
with any other groupings but only that grouping covers.
5. Note down all the prime implicants and essential prime implicants. The simplified Boolean
function contains all essential prime implicants and only the required prime implicants.
The Procedure for Simplyfying a Boolean Expression is as Follows
1. Plot the k-map and place 1’s in those cells corresponding to the 1’s in the truth table or
minterms in the sop expression. Place 0’s to other cells.
2. Encircle the 1’s which are not adjacent to any other 1’s (Encircle the isolated 1’s).
3. Check for those 1’s which are adjacent to only one other ‘1’ and encircle such pairs.
4. Check for quads and octets of adjacent 1’s even if it contains some 1’s that have already
been encircled. While doing this make sure that there is minimum number of groups.
5. Make sure that all 1’s are grouped or encircled.
6. Form the simplified expression by summing product terms of all the groups.

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Digital System Design
Implicants: Implicant is a product/minterm term in Sum of Products (SOP) or sum/maxterm
term in Product of Sums (POS) of a Boolean function. E.g., consider a boolean function, F = AB
+ ABC + BC. Implicants are AB, ABC and BC.
Prime Implicants: Each group in k-map gives us a product term and summation of all product
terms gives us a Boolean expression. Therefore each product term implies the function and
hence such product term is an implicant of the function. All the implicants of a function is termed
as the prime implicants.
Essential Prime Implicants: These are those subcubes(groups) which cover atleast one minterm
that can’t be covered by any other prime implicant. Essential prime implicants(EPI) are those
prime implicants which always appear in final solution.While grouping the k-map, some cells may
appear in only one prime implicant group and these cells are called as essential cells and corre-
sponding prime implicants are called essential prime implicants.
Redundant Prime Implicants: The prime implicants for which each of its minterm is covered

m
by some essential prime implicant are redundant prime implicants(RPI). This prime implicant
never appears in final solution.
Selective Prime Implicants: The prime implicants for which are neither essential nor redun-

u
dant prime implicants are called selective prime implicants(SPI). These are also known as non-
essential prime implicants. They may appear in some solution or may not appear in some solution.
Example-5: Minimize the expression, Y  A BC  ABC  ABC  ABC  ABC .
Sol. Y  A BC  ABC  ABC  ABC  ABC
Y  001  011  010   111  110   m 1, 2, 3, 6, 7 

t r
c
Step-1: Plot the k-map
A BC BC BC BC BC A BC BC BC BC BC
00 01 11 10 00 01 11 10

A 0

A 1

p
0

0
0

4
0
1
1

5
1

1 e
3

7
1

1
2

6
A 0

A 1
0

0
0

4
0
1
1

5
1

1
3
1

1
2

S
7

Figure-2.35 Figure-2.36
Step-2: There are no isolated l’s.
Step-3: ‘l’ in the cell ‘l’ is adjacent only to ‘l’ in the cell ‘3’. So this pair can be encircled as
shown in figure 2.36.
Step-4: There is no octet, but there is a quad cells 3, 2, 7 and 6 form a quad.
AC

A BC BC BC BC BC
00 01 11 10

A 0 0 1 1 1
0 1 3 2

0 0 1 1 B
A 1
4 5 7 6

Figure-2.37
102
 Gate Level Minimization
Step-5: All l’s are grouped.
Step-6: The simplified expression is Y  AC  B
Example-6: Minimize the expression using k-map
Y  A BC D  ABCD  ABC D  ABCD  ABC D  A BCD  AB C D
Sol. Y  A BC D  ABCD  ABC D  ABCD  ABC D  A BCD  AB C D
Y  0000   0111  0110   1111  1110   1011  1010   m0, 7, 6, 15, 14, 11, 10 
Step-1: Plot the k-map.
CD CD CD CD CD
AB CD CD CD CD CD
00 01 11 10 AB
00 01 11 10
AB 00 1 0 0 0
3 AB 00 1 0 0 0

m
0 1 2
0 1 3 2

AB 01 0 0 1 1
AB 01 0 0 1 1
4 5 7 6

u
4 5 7 6

AB 11 0 0 1 1

r
12 13 15 14 AB 11 0 0 1 1
12 13 15 14
0 0 1 1

t
AB 10
8 9 11 10 AB 10 0 0 1 1
8 9 11 10

c
Figure-2.38 Figure-2.39
Step-2: l in the cell 0 is the only isolated l. So encircle it.

AB
CD

p
CD
00
CD
01
CD
11 e
Step-3: l in the cell ll is adjacent only to l in this cell 15 so this pair can be encircled as shown in
figure 2.40.
CD
10 AB
CD CD
00
CD
01
CD
11
CD
10

S
AB 00 1 0 0 0 1 0 0 0
0 1 3 2
AB 00
0 1 3 2

AB 01 0 0 1 1 0 0 1 1
AB 01
4 5 7 6 4 5 7 6

AB 11 0 0 1 1 AB 11 0 0 1 1
12 13 15 14 12 13 15 14

0 0 1 1 AB 10 0 0 1 1
AB 10
8 9 11 10
8 9 11 10

Figure-2.40 Figure-2.41
Step-4: There is no octet, but there be a quad cells 7,6,15 and 14 form a quad.
Step-5: All 1’s are grouped.
Step-6: The simplified expression is, Y  A BC D  BC  AC

103
Digital System Design

Example-7: Simplify the Boolean function

F   m 0,1,2,4,5,6,8,9,12,13 using k-map and obtain the minimum Sop form.
Sol. Step-1: Plot the k-map.
CD CD CD CD CD
CD CD CD CD CD AB
AB 00 01 11 10
00 01 11 10
AD
AB 00 1 1 0 1
AB 00 1 1 0 1
0 1 3 2
0 1 3 2

AB 01 1 1 0 1
AB 01 1 1 0 1
4 5 7 6
4 5 7 6

AB 11 1 1 0 0
AB 11 1 1 0 0 12 13 15 14
12 13 15 14

m
AB 10 1 1 0 0
AB 10 1 1 0 0 8 9 11 10
8 9 11 10
C

Step-2:
Step-3:
Figure-2.42
There are no isolated l’s.
There are no l’s which are adjacent to only one other ‘l’.
Figure-2.43

r u
t
Step-4: There is one octet and one quad cells 0,1,4,5,12,13,8 and 9 form a octet, where the cells
0,4,2 and 6 form a quad.

c
Step-5: All l’s are grouped.
Step-6: The simplified boolean expression is Y  A D  C

e
Example-8: Simplify the boolean expression
Y  A BCD  ABCD  ABC D  ABC D  ABCD  ABCD  ABCD  AB CD

AB
CD
p
Sol. Y  A BCD  ABCD  ABCD  ABC D  ABCD  ABCD  ABCD  ABCD
Y  0001  0101  0110   1100   0111  1111  1011
 m1, 5, 6, 12, 13, 7, 15, 11   M 0, 2, 3, 4, 7, 8, 9, 10, 14, 

S
Step-1: Plot the k-map
CD CD CD CD AB
CD CD
00
CD
01
CD
11
CD
10
00 01 11 10
ACD
AB 00 0 1 0 0
AB 00 0 1 0 0
0 1 3 2
0 1 3 2

AB 01 0 1 1 1 ABC
AB 01 0 1 1 1
4 5 7 6
4 5 7 6

AB 11 1 1 1 0
AB 11 1 1 1 0 12 13 15 14
12 13 15 14 ACD
AB 10 0 0 1 0
AB 10 0 0 1 0 8 9 11 10
8 9 11 10

ABC
Figure-2.44 Figure-2.45
104
 Gate Level Minimization

Step-2: There are no isolated l’s.

Step-3: ‘l’ in the cell ‘l’ is adjacent only to ‘l’ in the cell ‘5’, ‘1’ in the cell ‘6’ is adjacent only to
‘1’ in the cell ‘7’ ‘1’ in the cell ‘11’ is adjacent only to ‘1’ in the cell ‘15’ and ‘1’ in the cell
‘12’ is adjacent to ‘1’ in the cell ‘13’.
Step-4: There are no octet. But there is a quad cells 5,7,13 and 15 form a quad. Since all 1’s in
the quad have already grouped. The quad is ignored.
Step-5: All 1’s are grouped.
Step-6: The simplified boolean expression is Y  A CD  ABC  ACD  ABC
Example-9: Reduce the following four variable function to its minimum SOP from.

m
Y  ABC D  ABCD  A BCD  A BCD  A BC D  ABC D  A BCD  A BCD
Sol. Y  ABC D  ABCD  A BCD  A BCD  A BC D  ABC D  A BCD  A BCD
Y  0010   1110   1010   1011  1000   1100   0011  0000 
 m 2, 14, 10, 11, 8,12, 3, 0 
Step-1: Plot the K-map.

r u
t
BD
CD CD CD CD CD
AB CD CD CD CD CD
00 01 11 10

c
AB
00 01 11 10
AB 00 1 0 1 1
1 0 1 1

e
0 1 3 2 AB 00
0 1 3 2

AB 01 0 0 0 0
0 0 0 0

p
4 5 7 6 AB 01 BC
4 5 7 6

AB 11 1 0 0 1
AB 11 1 0 0 1

S
12 13 15 14 AD
12 13 15 14

AB 10 1 0 1 1
AB 10 1 0 1 1
8 9 11 10
8 9 11 10

Figure-2.46 Figure-2.47
Step-2: There are no isolated 1’s.
Step-3: There are no 1’s which are adjacent to only one other ‘1’.
Step-4: There are 3 quads. Cells 0,2,8, 10 from a quad, cells 12,8,14,10 from a quad and cells
3,2,11,10 from a quad.
Step-5: All 1’s are grouped.

Step-6: The simplificed boolean expression is, Y  BC  BD  A D

105
Digital System Design

Example-10: Reduce the following function using K-map.

F( w , x , y, z )   m(0, 1, 4, 8, 9, 10)
Sol.
Step-1: Plot the K-map
yz yz yz yz yz yz yz yz yz yz
wx wx
00 01 11 10 00 01 11 10

wx 00 1 1 0 0 wx 00 1 1 0 0
0 1 3 2 0 1 3 2

wx 01 1 0 0 0 wx 01 1 0 0 0

m
4 5 7 6 4 5 7 6

wx 11 0 0 0 0 wx 11 0 0 0 0

u
12 13 15 14 12 13 15 14

1 1 0 1 1 1 0 1

r
wx 10 wx 10
8 9 11 10 8 9 11 10

Figure-2.48
Step-2: There are no isolated 1’s.

c t
Step-3: ‘1’ in the cell ‘4’ is adjacent only to ‘1’ in the cell ‘0’ and ‘1’ in the cell ‘10’ is adjacent
Figure-2.49

p wx
e
only to ‘1’ in the cell ‘8’. So this two pair can be encircled as shown in figure 2.49.
Step-4: There is no octet. But there is a quad. Cells 0,1,8,9 from a quad.
yz yz yz yz yz

S
00 01 11 10

wx 00 1 1 0 0
0 1 3 2
wxy
wx 01 1 0 0 0
4 5 7 6

0 0 0 0 xy
wx 11
12 13 15 14
wxz
wx 10 1 1 0 1
8 9 11 10

Figure-2.50
Step-5: All 1’s are grouped.
Step-6: The simplified Boolean expression is Y  W Y Z  W X Z  X Y

106
 Gate Level Minimization
Example-11: Simplify the following expression using K-map method.
Y   m7, 9, 10, 11, 12, 13, 14, 15 
Sol. Let Y   m 7, 9, 10, 11, 12, 13, 14, 15 
Step-1: Plot the K-map.
CD CD CD CD CD CD CD CD CD CD
AB AB
00 01 11 10 00 01 11 10

AB 00 0 0 0 0 AB 00 0 0 0 0
0 1 3 2 0 1 3 2

AB 01 0 0 1 0 AB 01 0 0 1 0
4 5 7 6 4 5 7 6

1 1 1 1 1 1 1 1

m
AB 11 AB 11
12 13 15 14 12 13 15 14

AB 10 0 1 1 1 AB 10 0 1 1 1

u
8 9 11 10 8 9 11 10

Figure-2.51 Figure-2.52
Step-2: There are no isolated 1’s.
Step-3: ‘1’ in The cell ‘7’ is adjacent only to ‘1’ in the cell ‘15’.
CD CD CD CD

t
CDr
c
AB
00 01 11 10

0 0 0 0

e
AB 00
0 1 3 2

AB 01 0 0 1 0

p
BCD
4 5 7 6

AB 11 1 1 1 1

S
12 13 15 14
AC
AB 10 0 1 1 1
8 9 11 10

AB AD
Figure-2.53
Step-4: There is no octet. But there are theree quads. Calls 12,13,14,15 form a quad. Cells
9,11,13,15 form a quad and cells 10,11,14,15 from a quad as shown in figure 2.53.
Step-5: All 1’s are grouped.
Step-6: The simplified boolean expression Y  AB  AD  AC  BCD
2.1.8 Simplification of POS Expression or Maxterms using K- map
The simplification of POS expression using K-map is similar to simplification of SOP expression
The only difference is instead of making the groups of ones, we have to make group of zeros.
The procedure for simplifying a POS Boolean expression is as follows.

107
Digital System Design
1. Plot the k- map and place 0’s in those cells corresponding to the 0’s in the truth table or
Maxterms in the POS expression.
2. Encircle the 0’s which are not adjacent to any other 0’s. (Encircle the isolated 0’s).
3. Check for those 0’ which are adiacent to any other 0’ and encircle such pairs.
4. Check for quads and octets of adjacent 0’s even if it contains some 0’s that have already
been encircled. While doing this make sure that there are minimum number of groups.
5. Make sure that all 0’s are grouped or encircled.
6. Form the simplificd SOP expression for output by summing product terms of all the groups.
Then find output by Demogan’s theorem or we can directly write the output equation in
SOP form.
Follow these Rules for Simplifying K-maps in Order to Get Standard Product of Sums
Form

m
1) Select the respective K-map based on the number of variables present in the Boolean
function.
2) If the Boolean function is given as product of Max terms form, then place the zeroes at

u
respective Max term cells in the K-map. If the Boolean function is given as product of sums
form, then place the zeroes in all possible cells of K-map for which the given sum terms are valid.

t r
3) Check for the possibilities of grouping maximum number of adjacent zeroes. It should be
powers of two. Start from highest power of two and upto least power of two. Highest
power is equal to the number of variables considered in K-map and least power is zero.
4) Each grouping will give either a literal or one sum term. It is known as prime implicant. The

c
prime implicant is said to be essential prime implicant, if atleast single ‘0’ is not covered with
any other groupings but only that grouping covers.
5) Note down all the prime implicants and essential prime implicants. The simplified Boolean

 e
function contains all essential prime implicants and only the required prime implicants.
Example-12: Minimize the below expression by using k-map,

p 
Y  A  B  C A  B  C A  B  C A  B  C A  B  C 
Sol. Step-1: Plot the k-map
 

A
S
A  B  C  M ; A  B  C  M ; A  B  C  M ;

BC BC
00
1

A  B  C  M ; A  B  C  M
4

BC
01
BC
11
BC
10
3

0
The given expression can also be written as Y   M (0,1,3,4,7).

A
BC BC
00
7

BC
01
BC
11
BC
10

A 0 0 0 0 A 0 0 0 0
0 1 3 2 0 1 3 2

A 1 0 0 A 1 0 0
4 5 7 6 4 5 7 6

Figure-2.54 Figure-2.55
Step-2: There are no isolated 0’s.
Step-3: ‘0’ in the cell ‘7’ is adjacent only to ‘0’ in the cell ‘3’ and ‘0’ in the cell ‘4’ is adjacent
only to ‘0’ in the cell ‘0’. So this two pair can be encircled as shown in figure 2.55.
108
 Gate Level Minimization
Step-4: There are no octets or quads.
Step-5: Here the ‘0’ in the ‘1’ is not yet encircled. This ‘0’ can either form a pair with cell ‘3’ or
cell ‘0’.
BC BC BC BC BC
A 00 01 11 10

A 0 0 0 0
0 1 3 2

A 1 0 0
4 5 7 6

BC AB BC

Step-6: Let Y  BC  A B  BC
Figure-2.56

Therefore by demorgan’s law the simplified boolean expression can be written as

Y  BC  A B  BC  Y  B  C   A  B B  C  
u m
Example-13: Minimize the following expression in the POS form.
 
Y  ABC D ABC D ABCD ABCD   
A  B  C  DA  B  C  DA  B  C  DA  B  C  D
t r
Sol. Step-1: Plot the k-map
A  B  C  D  M ; A  B  C  D  M ;
12

A  B  C  D  M ; A  B  C  D  M ;
14

A  B  C  D  M ; A  B  C  D   M ;
e c 6

p
15 0

A  B  C  D  M ; A  B  C  D  M ;
8 13
The expression can also be written as

AB

AB 00
S
Y   M 0,6,7,8,12,13,14,15
CD CD
00

0
0
CD
01

1
CD
11

3
CD
10

2
AB

00
CD
00

0
0
01

1
11

3
10

AB 01 0 01 0 0
0
4 5 7 6 4 5 7 6

AB 11 0 0 0 0 11 0 0 0 0
12 13 15 14 12 13 15 14

AB 10 0 10 0
8 9 11 10 8 9 11 10

Figure-2.57
Figure 2.57 Figure-2.58
109
Digital System Design

Step-2: There are no isolated 0’s.

Step-3: ‘0’ in the cell ‘0’ is adjacent only to ‘0’ in the cell ‘8’. So, this forms a pair.
Step-4: There is no octet. But there are two quads cells 7,6,14,15 form a quad. cells 12,13,14,15
form another quad.
CD
AB
00 01 11 10
BCD
AB 00 0
0 1 3 2

AB 01 0 0 BC

AB 11 0
4

12
0
5

13
0
7

15
0
6

14

u m
AB

AB 10 0
8 9

Figure-2.59

t r 11 10

c
Step-5: All 0’s are grouped.
Step-6: Let Y  BC  AB  BC D

e

By demorgan’s Law Y  B  C A  B B  C  D  
Example-14: Simplify the following function using k-map

Sol.

p
FA, B, C, D    M 0,2,3,8,9,12,13,15 

Step-1: Plot the k-map

AB

AB 00
S
CD CD
00

0
0
CD
01

1
CD
11

0
3
CD
10

0
2
AB

AB 00
CD CD
00

0
0
CD
01

1
CD
11

0
3
CD
10

0
2

AB 01 AB 01
4 5 7 6 4 5 7 6

AB 11 0 0 0 AB 11 0 0 0
12 13 15 14 12 13 15 14

AB 10 0 0 AB 10 0 0
8 9 11 10 8 9 11 10

Figure 2.60
Figure-2.60 Figure 2.61
Figure-2.61

110
 Gate Level Minimization
Step-2: There are isolated 0’s.
Step-3: The ‘0’ in cell 3 is adjacent only to ‘0’ in cell ‘2’. The ‘0’ in cell 15 is adjacent only to ‘0’
in cell 13. So this two pair can be encircled as shown in figure 2.61.
Step-4: There is no octet. But there is a quad. The cells 12, 13, 8 and 9 form a quad.
CD CD CD CD CD CD CD CD CD CD
AB AB
00 01 11 10 00 01 11 10

00 0 0 0 00 0 0 0
0 1 3 2 0 1 3 2 ABD
ABC
01 01
4 5 7 6 4 5 7 6

m
11 0 0 0 11 0 0 0 ABD
12 13 15 14 12 13 15 14
AC
10 0
8
0

Figure-2.62
9 11 10
10

Figure-2.63
0

r
8
0
9

u 11 10

t
Step-5: The ‘0’ in cell ‘0’ can either form a pair with cell ‘8’ or cell ‘2’.
Step-6: Let F  A B D  A BC  A C  ABD
F  A BD  A BC  A C  ABD

c 
By Demorgan’s Law F  A  B  D  A  B  C A  C A  B  D

e
 
Example-15: Given F = (1, 5, 6, 7, 11, 12, 13, 15), find number of implicant, PI, EPI, RPI
and SPI.


S p 2 1
1

1
1
1
5

1
1
1 4
No. of implication = 8
PI = (1, 2, 3, 4, 5)
EPI = (1, 2, 3, 4)
RPI = (5)
1

3
F= 1 + 2+ 3+ 4
Figure-2.64
No. of Implicants = 8
No. of Prime Implicants(PI) = 5
No. of Essential Prime Implicants(EPI) = 4
No. of Redundant Prime Implicants(RPI) = 1
No. of Selective Prime Implicants(SPI) = 0
111
Digital System Design

2.1.9 Don’t Care Conditions in Logic Design

The unspecified outputs in the truth table of an incompletete boolean function are called don’t
care conditions.Min terms or max terms are written for the specified outputs and the unspecified
outputs are grouped as don’t care terms.
In some logic circuits, certain input conditions never occur, therefore the outputs of such
inputs are indicated by ‘x’ or don’t care outputs.
A Don’t Care cell can be represented by a cross(X) in K-Maps representing a invalid
combination. For example, in Excess-3 code system, the states 0000, 0001, 0010, 1101, 1110 and
1111 are invalid or unspecified. These states are called don’t cares.
The “Don’t Care” conditions allow us to replace the empty cell of a K-Map to form a
grouping of the variables which is larger than that of forming groups without don’t cares. While
forming groups of cells, we can consider a “Don’t Care” cell as 1 or 0 or we can also ignore that

A B C D
0 0 0 0

u m
cell. Therefore, “Don’t Care” condition can help us to form a larger group of cells.
Consider the following truth table.

0
0
0
0
1
1
1
0
1
1

t
0
1 r
e c 1
1
1 1 0 X
1 1 1 X
0
0
0
1
0
X

S p Table-2.3: Truth table indication dont care conditions

The Boolean function for the above truth table can be written as
Z   m1,3  d 5,6,7 
Here 1,3 are minterms d 5,6,7  represents don’t cares.
The k-map for above truth table can be plotted as shown in figure 2.65.

A BC BC BC BC BC
00 01 11 10
Z=C
A 0 0 1 1 0
0 1 3 2

Don't care as X
A 1 0 X X X
4 5 7 6

Don't cares as 1's

Figure-2.65: Truth table indication dont care conditions in K-map

112
 Gate Level Minimization
Note: A don’t care can be considered as ‘0’ or ‘1’ in order to produce the most simplified output
expression.
If we consider the don’t cares present in the cell 5,6,7 and 0’s. we get the output expression
as Z  AC .
If we consider the don’t cares present in the cell 5,6,7 and 1’s. We get the output expression
as Z  C  AB .
But if we consider the don’t cares present in cells 5,7 and ‘1’ and cell ‘6’ as ‘0’. We get the
most simplified expression Z  C .
Significance of “Don’t Care” Conditions: Don’t Care conditions has the following signifi-
cance in designing of the digital circuits.
1. Simplification of the Output: These conditions denotes inputs that are invalid for a given
digital circuit. Thus, they can be used to further simplify the boolean output expression of a

m
digital circuit.
2. Reduction in Number of Gates Required: Simplification of the expression reduces the
number of gates to be used for implementing the given expression. Therefore, don’t cares

3.
make the digital circuit design more economical.

r u
Reduced Power Consumption: While grouping the terms long with don’t cares reduces
switching of the states. This decreases the memory space that is required to represent a

t
given digital circuit which in turn results in less power consumption.
4. Represent Invalid States in Code Converters: These are used in code converters. For

c
example- In design of 4-bit BCD-to-XS-3 code converter, the input combinations 1010,
1011, 1100, 1101, 1110, and 1111 are don’t cares.

e
5. Prevention of Hazards in Digital Circuits: Don’t cares also prevents hazards in digital
systems.
Example-16: Simplify the boolean expression Fw , x , y, z    m 1, 3, 7.11,15  which has

‘X’.
wx
yz
S
yz
00
p
the don’t care condition d w , x , y, z    0,2,4  .
Sol. The minterms given in Fw , x , y, z  are marked as 1’s and the don’t cares as marked as

yz
01
yz
11
yz
10
wx
yz yz
00
yz
01
yz
11
yz
10

wx 00 X 1 1 X wx 00 X 1 1 X wx
0 1 3 2 0 1 3 2

wx 01 X 0 1 0 wx 01 X 0 1 0
4 5 7 6 4 5 7 6
yz
wx 11 0 0 1 0 wx 11 0 0 1 0
12 13 15 14 12 13 15 14

wx 10 0 0 1 0 wx 10 0 0 1 0
8 9 11 10 8 9 11 10

Figure-2.66 Figure-2.67
113
Digital System Design

To form a quad with cells 0, 1, 3 and 2 the don’t cares in cell ‘0’ and ‘2’ are considered as
1’s. The remaining don’t cares are considered as 0’s.
The simplified expression is F  w x  yz
Example-17: Minimize the following function using k-map technique.
F  w , x , y, z    m0,7,8,9,10,12    d 2,5,13
Sol.
yz yz yz yz yz yz yz yz yz yz
wx wx
00 01 11 10 00 01 11 10

wx 00 1 0 0 X wx 00 1 0 0 X
0 1 3 2 0 1 3 2

wx 01

wx 11
0

1
4

X
X
5
1

0
7
0

0
6
wx 01

wx 11
0

1
4
X

X
5
1

u
0
m 7
0

0
6
wxz

wy

wx 10 1
12

8
1
13

9
0
15

11
1
14

10
wx 10

t r
1
12

8
1
13

9
0
15

11
1
14

10
xz

Figure 2.67
Figure-2.68

c
In this problem, all the don’t cares are considered as 1’s.
Therefore the simplified expression is
F  x z  w xz  w y
e
Figure-2.69
Figure 2.68

Sol.
A BC BC
00
p
Example-18: Minimize the following function using k-map technique.
FA , B, C    m 0,1,3,7    d 2,5

S BC
01
BC
11
BC
10
A BC BC
00
BC
01
BC
11
BC
10

A 0 1 1 1 X A 0 1 1 1 X A
0 1 3 2 0 1 3 2
C
A 1 0 X 1 0 A 1 0 X 1 0
4 5 7 6 4 5 7 6

Figure-2.70 Figure 2.70

Figure-2.71
To form quads both the don’t cares are considered as 1’s.
FA , B, C   A  C
Example-19: Simplify the following function using k-map technique.
FA , B, C, D    m 5,6,7,12,13   d 4,9,14,15

114
 Gate Level Minimization
Sol.
CD CD CD CD CD CD
AB AB CD CD CD CD
00 01 11 10 00 01 11 10

AB 00 0 0 0 0 AB 00 0 0 0 0
0 1 3 2 0 1 3 2

AB 01 X 1 1 1 AB 01 X 1 1 1
4 5 7 6 4 5 7 6

AB 11 1 1 X X AB 11 1 1 X X
12 13 15 14 12 13 15 14

m
AB 01 0 X 0 0 AB 01 0 X 0 0
8 9 11 10 8 9 11 10

Figure-2.72 Figure-2.73
To form an octet of cells 4,5,7,6,12,13,14 and 15, the don’t cares 4, 15 are considered as 1’s
and the don’t care in cell ‘9’ is considered as ‘0’.
Therefore the simplified Boolean expression is F(A, B, C, D)=B

r u
Example-20: Simply the boolean function uisng k-map techique.

Sol.
Fw , x , y, z    m 0,1,4,8,9,10  which has the don’t care conditions d(2, 11).

c t
e
yz yz yz yz yz yz yz yz yz yz
wx wx
00 01 11 10 00 01 11 10

p
wx 00 1 1 0 X wx 00 1 1 0 X
0 1 3 2 0 1 3 2
wyz

S
wx 01 1 0 0 0 wx 01 1 0 0 0
4 5 7 6 4 5 7 6

wx 11 0 0 0 0 wx 11 0 0 0 0
12 13 15 14 12 13 15 14

1 1 X 1 wx 10 1 1 X 1 wx
wx 10
8 9 11 10 xy 8 9 11 10

Figure-2.74 Figure-2.75
The don’t cares in cell ‘11’ is considered as ‘1’. So that cell 8,9,10 and 11 form a quad. The
don’t care in cell ‘2’ is considered as ‘0’.

Therefore the simplified expression if Fw , x , y, z   x y  w x  w yz

Example-21: Minimize the Boolean function using k-map technique
Fw , x , y, z    m 1,2,3,5,9,12,14,15  which has the don’t care conditions d(4,8,11).
Sol.

115
Digital System Design

yz yz yz yz yz yz yz
wx
yz wx yz yz
00 01 11 10 00 01 11 10

0 1 1 1 wxy
wx 00 0 1 1 1 wx 00
0 1 3 2 0 1 3 2
wyz
wx 01 X 1 0 0 wx 01 X 1 0 0
4 5 7 6 4 5 7 6
wxz
wx 11 1 0 1 1 wx 11 1 0 1 1 wxy
12 13 15 14 12 13 15 14

wx 10 X 1 X 0 wx 10 X 1 X 0
xz
8 9 11 10 8 9 11 10

Figure-2.76 Figure-2.77
The don’t care at cell ‘11’ is considered as ‘1’, so that cells 1,3,9,11 forms a quad. The
simplified expression is F  w xy  w yz  wxy  xz  wx z
Example-22: Reduce FA, B, C, D    m0,1,2,5,8,9,10 in sum of products and product of
u m
sum using k-map.
Sol. Given FA , B, C, D    m 0,1,2,5,8,9,10
To find the sum of products group the 1’s
t r
AB

AB 00
CD CD
00

1
0
CD
01

1
1
CD
11

e
3
c CD
10

1
2
ACD
AB

AB 00
CD CD
00

1
0
CD
01

1
1
CD
11

0
3
CD
10

1
2
CD

p
BD BD
AB 01 0 1 0 0 AB 01 0 1 0 0
BC
4 5 7 6 4 5 7 6

S
0 0 0 0 0 0 0 0 AB
AB 11 AB 11
12 13 15 14 12 13 15 14

AB 10 1 1 0 1 AB 10 1 1 0 1
8 9 11 10 8 9 11 10

Figure-2.78: SOP simplification Figure-2.79: POS simplification

From figure 2.78, FA , B, C, D   BC  BD  A CD is the SOP expression.
From figure 2.79, the POS expresion can be written as F  CD  AB  BD
Taking complement of the above expression, we get the POS expression F  C  D A  B B  D    
2.1.10 Five Variable K-map
Any Boolean Expression or Function comprising of 5 variables can be solved using the 5 variable
K-MapA 5 variable k-mapcontains 2 5  32cells. Therefore two 16 cell k-map is used as a 5
variable k-map. If the variables are A,B,C,D and E two identical 16 cell k-maps are constructed
using the variable B,C,D and E.

116
 Gate Level Minimization

One k-map is used for A and other is used for A. Every cell in one map is adjacent to the
corresponding cell in the other map, because it differs by a single variable. Thus every row on
one k-map is adjacent to the corresponding row on the other k-map.
A or (A=0) A or (A=1)
DE DE DE DE DE DE DE DE DE DE
BC 00 01 11 10 BC 00 01 11 10

BC 00 BC 00
0 1 3 2 16 17 19 18

BC 01 BC 01
4 5 7 6 20 21 23 22

BC 11
12 13 15 14
BC 11

BC 10
28

u m 29 31 30

r
BC 10
8 9 11 10 24 25 27 26

t
Figure-2.80: Five variable k-map
Also each group on one k-map is adjacent to the corresponding group on other k-map.
Example-23: Simplify the Boolean function.

e c
FA, B, C, D, E    m 0,2,4,6,9,11,13,15,17,21,25,27,29,31
Sol.

BC

BC 00
DE DE

S
00

1
p 0
A or (A=0)
DE
01

0
1
DE
11

0
3
DE
10

1
2
ABE

BC
DE DE
00

0
16
A or (A=1)
DE
01

1
17
DE
11

0
19
DE
10

0
18
ADE

BC 01 1 0 0 1 0 1 0 0
4 5 7 6 20 21 23 22
BE BE
BC 11 0 1 1 0 0 1 1 0
12 13 15 14 28 29 31 30

BC 10 0 1 1 0 0 1 1 0
8 9 11 10 24 25 27 26

Figure-2.81
Here the quad formed by cells 0,2,4,6 is available in k-map ‘ A ’ only. So its expression is
ABE . The quad formed by cells 17,21,29 and 25 is available in k-map ‘A’ only. So its expression
117
Digital System Design

is A DE . But the quad formed by cells 13,15,9 and 11 is available in k-map ‘ A ’. So its expression
is BE. The simplified expression is FA , B, C, D, E   A BE  A DE  BE
Example-24: Simplify the Boolean function
FA, B, C, D, E    m0, 5, 6, 8, 9,10,11,16, 20, 24, 25, 26, 27, 29, 31
Sol.
A or (A=0) A or (A=1)

DE DE DE DE DE DE DE DE DE DE
BC 00 01 11 10 BC 00 01 11 10
ABDE
BC 00 1 0 0 0 BC 00 1 0 0 0

m
0 1 3 2 16 17 19 18
ABCDE
BC 01 0 1 0 1 BC 01 1 0 0 0

u
4 5 7 6 20 21 23 22

r
BC 11 0 0 0 0 BC 11 0 1 1 0
12 13 15 14 28 29 31 30

BC 10 1
8
1
9
1
11

c
1
10

CDE
t
BC 10 1
24

BC
1
25
1
27
1

ABE
26

p
expression is BC . e Figure-2.82
Here the quad formed by cells 8,9,10 and 11 in k-map ‘ A ’ is available in k-map ‘A’. So its

There are two isolated 1’s in cell ‘5’ and cell ‘6’ and it is not available in corresponding cells

S
in k-map ‘A’. So its expression are A BC DE and A BCD E .
The pair formed by cells ‘16’ and ‘20’ is not available in corresponding cells of k-map ‘ A ’.
So its expression is A BD E .
The pair formed by cells ‘0 and 8’ in k-map ‘ A ’ is not available in corresponding cells of k-
map ‘A’. But in the corresponding cells ‘16’ and ‘24’ there are 1’s. So a pair can be formed by
the cells ‘16’ and ‘24’. Now the pair formed by cells ‘0’ and ‘8’ in k-map ‘ A ’ is available in
corresponding cells of k-map ‘A’. So its expression is C D E . The quad formed by cells 29,31,25
and 27 is not available in corresponding cells of k-map ‘ A ’. So its expression is ABE.
The simplified expression is F  BC  A BC DE  A BCD E  A BD E  C D E  ABE .
Example-25: Reduce the function using k-map technique
FA, B, C, D, E    m1,4,8,10,11,20,22,24,25,26    d 0,12,16,17  .
Sol.

118
 Gate Level Minimization

A or (A=0) A or (A=1)

BC
DE DE DE DE DE BCD BC DE DE DE DE DE
00 01 11 10 00 01 11 10

BC 00 X 1 0 0 BC 00 X X 0 0
0 1 3 2 16 17 19 18
ABCE
BC 01 1 0 0 0 BC 01 1 0 0 1
4 5 7 6 20 21 23 22

BC 11 X 0 0 0 BC 11 0 0 0 0
12 13 15 14 28 29 31 30

BC 10 1 0 1 1 BC 10 1 1 0 1

m
8 9 11 10 24 25 27 26

ADE

u
ABCD BCE ACD
Figure-2.83

t r
The quad formed by cells 0,4,12 and 8 in k-map ‘ A ’ is not available in corresponding cells
of k-map ‘A’. Its expression is A DE . The quad formed by cells 16,17,24 and 25 in k-map ‘A’ is
not available in corresponding cells of k-map ‘ A ’. Its expression is A C D . The pair formed by

c
cells 11 and 10 in k-map ‘ A ’ is not available in corresponding cells of k-map ‘A’. Its expression
is ABCD . The pair formed by cells ‘0’ and ‘1’ in k-map ‘ A ’ is not available in corresponding

e
cells of k-map ‘A’. But if we group the don’t cares ‘16’ and ‘17’. We can write the expression as
BC D . The pair formed by cells ‘8’ and ‘10’ in k-map ‘ A ’ is available in corresponding cells of

p
k-map ‘A’. So its expression is BC E . The pair formed by cells ‘20’ and ‘22’ in k-map ‘A’ is not
available in corresponding cells of k-map ‘ A ’. So its expression is A BC E . Therefore the simpli-

S
fied boolean expression is F  A D E  A C D  ABCD  BC D  BC E  A BC E
2.1.11 Six Variable k-map
AB or (AB=00) AB or (AB=01)
EF EF EF EF EF EF EF EF EF EF
CD 00 01 11 10 CD 00 01 11 10

CD 00 CD 00
0 1 3 2 16 17 19 18

CD 01 CD 01
4 5 7 6 20 21 23 22

CD 11 CD 11
12 13 15 14 28 29 31 30

CD 10 CD 10
8 9 11 10 24 25 27 26

119
Digital System Design

AB or (AB=10) AB or (AB=11)
EF EF EF EF EF EF EF EF EF EF
CD 00 11 10 CD 00 01 11 10
01

CD 00 CD 00
32 33 35 34 48 49 51 50

CD 01 CD 01
36 37 39 38 52 53 55 54

CD 11 CD 11 60 61 62
44 45 47 46 63

CD 10 CD 10
40 41 43 42 56 57 59 58

m
Figure-2.84: Six variable k-map
A six variable k-map contains 2 6  64 cells . If the variables are A,B,C,D,E and F, four identical

u
16 cell k-maps are constructed using the variable C,D,E and F. First k-map is used for AB
second k-map is used for AB , third k-map is used for A B and fourth k-map is used for AB.
Example-26: Simplify the Boolean function

Sol.
FA , B, C, D, E, F    m 0,5,7,8,9,12,13,23,25,28,29,37,40,42,44,46,55,57 ,60,61

t r
c
AB or (AB=00) AB or (AB=01)
EF EF EF EF EF EF EF EF EF EF
CD Group 2 CD 11
00 01 11 10 00 01 10
ABCDF
CD 00

p
CD 01

CD 11
1

1
0

4
0

1
1

5
1

0
0
3

7
e 0

0
2

6
CD 00

CD 01

CD 11
0

1
16

20
0

1
17

21
0

0
19

23
0

0
18

22

S
12 13 15 14 28 29 31 30

CD 10 1 1 0 0 CD 10 1 1 0 0
8 9 11 10 24 25 27 26

Group 1
AB or (AB=10) Group4 AB or (AB=11) Group6
ABDEF ACE
EF EF EF EF EF Group3 EF EF EF EF EF BCDEF
CD 00 01 11 10 BCDEF CD 00 01 11 10

CD 00 0 0 0 0 CD 00 0 0 0 0
32 33 35 34 48 49 51 50
Group5
BCE
CD 01 0 1 0 0 CD 01 0 0 1 0
36 37 39 38 52 53 55 54

CD 11 1 0 0 1 CD 11 1 1 0 0
44 45 47 46 60 61 63 62

CD 10 1 0 0 1 CD 10 1 1 0 0
40 41 43 42 56 57 59 58

Group7 ABCF
Figure-2.85: Simplification using 6-variable k-map
120
 Gate Level Minimization
Group 1 and group2 are two pairs of 1’s in the first 16 cell k-map. Group3 formed by two
isolated 1’s from first 16-cell map and third 16 cell k-map. Group4 is a combination of two quads
from first 16 cell and second 16-cell k-map. Similarly group5 is a combination of two quads form
second and fourth 16 cell k-map. Group6 is again a combination of isolated 1’s from second and
fourth 16 cell k-map. Finally group7 is a quad within the third k-map. This gives the simplification
expression as F  A BD E F  A BCDF  BCD EF  AC E  BCE  BCDEF  A BCF
Example-27: Simplify the Boolean function FA , B, C, D, E , F    m 0, 2, 3, 6, 7,18,19,
22, 23, 24, 25, 32, 34, 35, 38, 40, 41, 42, 43, 50, 51, 54, 55, 56, 57 , 58, 59 
Sol.
AB or (AB=00) AB or (AB=01)
EF EF EF EF EF EF EF EF EF EF
CD

m
CD 00 01 11 10 00 01 11 10

CD 00 1 0 1 1 CD 00 0 0 1 1

u
0 1 3 2 16 17 19 18

0 0 1 1

r
CD 01 0 0 1 1 CD 01
4 5 7 6 20 21 23 22

CD 11

CD 10
0

0
12

8
0

0
13

9
0

0
15

11
0

c
14

10
CD 11

CD 10
t
0

1
28

24
0

1
29

25
0

0
31

27
0

0
30

26

e
Group4 Group1
AB or (AB=10) AB or (AB=11) Group3
BCDF CE
EF EF EF EF EF EF EF EF EF EF BCDE

p
CD 00 01 11 10 CD 00 01 11 10

CD 00 1 0 1 1 CD 00 0 0 1 1

S
32 33 35 34 Group5 48 49 51 50
(not needed)
CD 01 0 0 1 1 CD 01 0 0 1 1
36 37 39 38 52 53 55 54

CD 11 0 0 0 0 Group2 CD 11 0 0 0 0
44 45 47 46 ACD 60 61 63 62

CD 10 1 1 1 1 CD 10 1 1 1 1
40 41 43 42 56 57 59 58

Figure-2.86
Figure 2.85

The quad formed by cells 2,3,6 and 7 in k-map A B is available in corresponding cells of all
four k-map. So its expression is CE .
The quad formed by cells 40,41,42 and 43 in k-map AB is available in corresponding cells of
k-map ‘AB’. So its expression is AC D .

121
Digital System Design

The pair formed by cells 24 and 25 in k-map AB is not available in corresponding cells of k-
map ‘AB’. However if we form a pair on cell 56 and 57 the expression can be written as
BCDE .
The pair formed by cells 0 and 2 in k-map A B is not available in corresponding cells of k-
map AB . However if we form a pair on cell 32 and 34 the expression can be written as BC D F .
Since the 1’s in 32,34,40,42 have already grouped, group5 is not needed.
Therefore the simplified expression for the given function is
FA, B, C, D, E , F  CE  ACD  BCD E  BC D F

2.2 QUINE-MC CLUSKEY METHOD OF MINIMIZATION (TABULATION

METHOD)

u m
In previous, we discussed K-map method, which is a convenient method for minimizing Boolean
functions up to 5 variables. But, it is difficult to simplify the Boolean functions having more than
5 variables by using this method.

t r
Quine-McCluskey tabular method is a tabular method based on the concept of prime
implicants. We know that prime implicant is a product or sum term, which can’t be further
reduced by combining with any other product or sum terms of the given Boolean function.

e c
As the number of variables increase, the k-map method becomes more complex. The tabu-
lation method overcomes this difficulty. The tabulation method was first formulated by quine and
later improved by Mc cluskey. So tabular method is also known as Quine-Mc cluskey method.
Procedure of Quine-McCluskey Tabular Method

p
Follow these steps for simplifying Boolean functions using Quine-Mc Cluskey tabular method.
Step-1: Arrange the given min terms in an ascending order and make the groups based on the

S
number of ones present in their binary representations. So, there will be at most ‘n+1’
groups if there are ‘n’ Boolean variables in a Boolean function or ‘n’ bits in the binary
equivalent of min terms.
Step-2: Compare the min terms present in successive groups. If there is a change in only one-
bit position, then take the pair of those two min terms. Place this symbol ‘_’ in the
differed bit position and keep the remaining bits as it is.
Step-3: Repeat step2 with newly formed terms till we get all prime implicants.
Step-4: Formulate the prime implicant table. It consists of set of rows and columns. Prime
implicants can be placed in row wise and min terms can be placed in column wise.
Place ‘1’ in the cells corresponding to the min terms that are covered in each prime
implicant.
Step-5: Find the essential prime implicants by observing each column. If the min term is cov-
ered only by one prime implicant, then it is essential prime implicant. Those essential
prime implicants will be part of the simplified Boolean function.
122
 Gate Level Minimization
Step-6: Reduce the prime implicant table by removing the row of each essential prime implicant
and the columns corresponding to the min terms that are covered in that essential prime
implicant. Repeat step 5 for Reduced prime implicant table. Stop this process when all
min terms of given Boolean function are over.
The simplified steps to be followed in the quine-mc cluskey method are
1. List all the minterms in the binary form.
2. Arrange the minterms according to the number of 1’s.
3. Compare each binary number with every term in the adjacent next higher category and if
they differ only by one position, put a check mark and copy the term in the next column with
‘-’ in the position that they differed.
4. Apply the same process described in step 3 for the resultant column and continue these

5.
6.
List all prime implicants.

u m
cycles until a single pass through cycle yields no further elimination of literate.

Select the minimum number of prime implicants which must cover all the minterms.

method.
FA, B, C, D    m0,2,3,6,7,8,10,12,13

t r
Example-28: Simplify the following Boolean function by using the quine-mc cluskey

c
Sol.
Step-1: List all the minterms in the binary form.

e
Minterm Binary representation
m0 0000

p m2 0010
m3 0011

S m6
m7
m8
m10
m12
0110
0111
1000
1010
1100
m13 1101
Step 2: Arrange the minterms according to the number of 1’s.
Number of 1’s Minterms Binary representation
0 m0 0 0 0 0
1 m2 0 0 1 0
1 0 0 0
m8

123
Digital System Design

2 m3 0 0 1 1
0 1 1 0
m6 1 0 1 0
m10 1 1 0 0
m12
3 m7 0 1 1 1
1 1 0 1
m13
Step-3: Compare each binary number with every term in the adjacent next higher category and
if they differ only by one position, put a check mark against the minterms and copy the
term in the next column with ‘-’ in the position that they differed.

m
Minterms Binary representation
A B C D
(0,2) 0 0  0
(0,8)
(2,3)
(2,6)

r
 0 0 0
0 0 1 
u
t
0  1 0
(2,10)
(8,10)  0 1 0

c
(8,12) 1 0  0
1  0 0

p
(3,7)
(6,7)
(12,13)
e 0 
0 1 1 
1 1 0 
1 1

Step-4: Apply the same process described in step 3 for the resultant column and continue these

S
cycles until a single pass through cycle yields no further elimination.
Minterms

0,2, 8,10
2,3, 6,7 
Binary representation

 0  0
0  1 
Step-5: List the prime implocants
Minterms Binary representation
A B C D
(a) (0,2,8,10)  0  0
(b) (2,3,6,7)
(c) (8,12)
0  1 
1  0 0
(d) (12,13) 1 1 0 
124
 Gate Level Minimization
Step-6: Select the minimum number of prime implicants which must cover all the minterms.
Prime Implicants
*a 0,2,8,10
*b 2,3,6,7
C 8,12
*d 12,13
First arrange the prime implicants based on number of minterms in each group. Here we are
having 4 sets of prime implicants. Compare each set of prime implicants with other set, starting
from ‘d’ to ‘a’.
Compare ‘d’ with c, b and a. If both 12 and 13 is available in any one set c, b or a then strike
set ‘d’. Else mark it by (*). Here ‘12’ is available in ‘C’ but ‘13’ is not available. So mark ‘d’ by

u m
(*). Similarly compare ‘C’ with a, b and d. If both 8 and 12 is available in any one set a, b or d,
then strike ‘C’. Here ‘8’ and ‘12’ are available in set ‘a’ and ‘d’, so strike ‘c’. Similarly compare
‘b’ with ‘a’ and ‘d’ (no need to compare with c). Here all the minterms 2,3,6,7 are not available
in set ‘a’ and ‘d’. So mark it by (*). So set a, b and d are minimum prime implicants. So the
simplified expression can be written from table.
FA , B, C, D    0  0   0  1    110  
FA , B, C, D   BD  AC  ABC .
t r
Sol. c
Example-29: Find all the prime implicants of the function
f (a , b, c, d )   m0, 2, 3, 4, 8,10,12,13,14  using the Quine- McCluskey algorithm.

e
p
f (a , b, c, d )   m 0, 2, 3, 4, 8,10,12,13,14 
Step-1: Represent each minterm in its 1/0 notation

No
0
2
3
4
S Minterm
abcd
abcd
abcd
abcd
1/0 notation
0000
0010
0011
0100
Index
0
1
2
1
8 abcd 1000 1
10 abcd 1010 2
12 abcd 1100 2
13 abcd 1101 3
14 abcd 1110 3
Step-2: List the minterms in increasing order of their index.
125
Digital System Design

a b c d
0 0 0 0 0 index 0

}
2 0 0 1 0
4 0 1 0 0 index 1
8 1 0 0 0
3 0 0 1 1
10
12
1
1
0
1
1
0
0
0
} index 2

13
14
1
1
1
1
0
1
1
0
} index 3

Figure-2.87: Steps 2 and 3 of quine-McCluskey algorithm

Step 3: Draw a line after each set of minterms with the same index value done in figure 2.88.
Step 4: Set i =0
Step 5: Pick up each term index 0 and 1 and see if they differ in one bit position. If ‘yes’ place
a ‘ ’ besides those terms and place the new single term in new list.
u m
0
2
a
0
0
b
0
0
c
0
1
d
0
0
(0, 2)
(0, 4)

t r a
0
0
b
0
-
c
-
0
d
0
0
4
8
3
10
0
1
0
1

e c 1
0
0
0
0
0
1
1
0
0
1
0
(0, 8) - 0 0 0

p
12 1 1 0 0
13 1 1 0 1

S
14 1 1 1 0
Figure-2.88: After iteration i=0
Step 6: Set i= 1 pick up each term with index 1 and 2 and repeat step 5.
a b c d a b c d
0 0 0 0 0 (0, 2) 0 0 - 0
2 0 0 1 0 (0, 4) 0 - 0 0
4 0 1 0 0 (0, 8) - 0 0 0
8 1 0 0 0 (2, 3) 0 0 1 -
3 0 0 1 1 (2, 10) - 0 1 0
10 1 0 1 0 (4, 12) - 1 0 0
12 1 1 0 0 (8, 10) 1 0 - 0
13 1 1 0 1 (8, 12) 1 - 0 0
14 1 1 1 0
Figure-2.89: After iteration i=1
126
 Gate Level Minimization
Set i= 2 Pick up each term with index 2 and 3 and repeat step 5.
a b c d a b c d

}
0 0 0 0 0 (0, 2) 0 0 - 0
2 0 0 1 0 (0, 4) 0 - 0 0 index = 0

4 0 1 0 0 (0, 8) - 0 0 0
(2, 3) 0 0 1 -

}
8 1 0 0 0
3 0 0 1 1 (2, 10) - 0 1 0
10 1 0 1 0 (4, 12) - 1 0 0 index = 1
12 1 1 0 0 (8, 10) 1 0 - 0
13 1 1 0 1 (8, 12) 1 - 0 0
14 1 1 1 0 (10, 14)
(12, 13)
1
1
-
1
1
0
} m0
- index = 2

u
(12, 14) 1 1 - 0
Figure-2.90: After iteration i=2

in the second list and repeat step 5.

a b c d a b c d r
Step-7: Repeat steps 4, 5 and 6 on the new list. Set i =0. Pick up each term with index 0 and 1

t a b c d
0
2
4
0
0
0
0
0
1
0
1
0
0
0
0

e
(0, 2)
(0, 4)
(0, 8)
0
0
- c
0
-
0
-
0 0
0 0
0 (0, 2) (8, 10)
(0, 4) (8, 12)
(8, 10) (12, 14) 1
-
-
0
-
-
- 0
0 0
- 0

p
8 1 0 0 0 (2, 3) 0 0 1 -
3 0 0 1 1 (2, 10) - 0 1 0
10
12
13
14
1
1
1
1
S
0
1
1
1
1
0
0
1
0
0
1
0
(4, 12)
(8, 10)
(8, 12)
(10, 14)
(12, 13)
-
1
1
1
1
1
0
-
-
1
0 0
-
0 0
1 0
0
0

- *
(12, 14) 1 1 - 0
Figure-2.91: After iteration i=0 on the second list
Note that combining (0, 2) (8, 10) (or) (0, 8) (2, 10) results in the same singe term - 0 -0.
Combining (0, 4) (8, 12) or (0, 8) (4, 12) results in the same single term - 0 -0.
0 0 1 - does not pair with any other term and is left without a ‘ ’ beside it.
Set i=1. Pick up each term with index 1 and 2 in the second list and repeat step 5.

127
Digital System Design

a b c d a b c d
0 0 0 0 0 (0, 2) 0 0 - 0
2 0 0 1 0 (0, 4) 0 - 0 0
4 0 1 0 0 (0, 8) - 0 0 0
8 1 0 0 0 (2, 3) 0 0 1 -
3 0 0 1 1 (2, 10) - 0 1 0
10 1 0 1 0 (4, 12) - 1 0 0
12 1 1 0 0 (8, 10) 1 0 - 0
13 1 1 0 1 (8, 12) 1 - 0 0
14 1 1 1 0 (10, 14)
(12, 13)
(12, 14)
1
1
1
-
1
1
1
0
-

u
0
-
0
m *

(0, 2) (8, 10)

a
-
b
0
c
-

t r
d
0
} index = 0

c
(0, 4) (8, 12) - - 0 0
(0, 8) (12, 14) 1 - - 0 index = 1

p e
Figure-2.92: After iteration i=1 on the second list
Note that combining (8, 10) (12, 14) (or) (8, 12) (10, 14) results in the same single term 1- -
0. Repeat steps 4, 5 and 6 on the third list. Set i = 0.
Pick up each term with index 0 and 1 in the third list and repeat step 5.

S
We see that no new list can be generated as no pairs of terms combine to form single terms.
Step-8: Terminate the process as no new lists are formed.
Step-9: The prime implicants are the terms without a ‘’ mark beside them.
a b c, a b c from second list b d, c d and a d and from the third list.
Example-30: Find all the prime implicants of the function
f (a , b, c, d )   m7, 9, 12, 13, 14, 15  d ( 4,11) using the Quine- McCluskey algo-
rithm.
Sol.
We saw in Section 2.6 that don’t care cells are considered as 1-cells to determine prime implicants.
The given function thus becomes.
f (a , b, c, d )   m 7, 9, 12, 13, 14, 15 
Step-1: Represent each min terms in its 1/0 notation.

128
 Gate Level Minimization

No Minterm I/O notation Index

7 abcd 0111 3
9 abcd 1001 2
12 abcd 1100 2
13 abcd 1101 3
14 abcd 1110 3
15 abcd 1111 4
4 abcd 0100 1
11 abcd 1011 3
Step-2: List the minterms in increasing order of their index.

4
a
0
b
1
c
0
d
0 index 1

u m
9
12
7
1
1
0
0
1
1
0
0
1
1
0
1
}
t r
index 2

e
11
13
14
1
1
1
0
1
1
c}
1
0
1
1
1
0
index 3

S p 15 1 1 1 1 index 4

Figure-2.93: Steps 2 and 3 of quine-MxCluskey algorithm

All further steps are shown in figure 2.94. The minterms combining at various iterations are
shown with an offset in the ‘ ’ marks.
a b c d
4 0 1 0 0
9 1 0 0 1
12 1 1 0 0
7 0 1 1 1
11 1 0 1 1
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1

129
Digital System Design

a b c d a b c d
(4, 12) - 1 0 0 (9, 11) (13, 15) 1 - - 1
(9, 11) 1 0 - 1 (12, 13) (14, 15) 1 1 - -
(9, 13) 1 - 0 1
(12, 13) 1 1 0 -
(12, 14) 1 1 - 0
(7, 15) - 1 1 1
(11, 15) 1 - 1 1
(13, 15) 1 1 - 1
(14, 15) 1 1 1 -
Figure-2.94: The Quine-McCluskey algorithm
The terms without a besides them constitute the prime implicants.
The prime implicants are bcd , b c d ad and ab.
 f abcd   ab  ad  bcd  bc d

2.3 NAND AND NOR INPLEMENTATIONS

u m
t r
The NAND and NOR gates are the universal gates. NAND and NOR gates can be used to
produce the AND, OR and NOT functions. Also, NAND and NOR gates are easier to fabricate
with electronic components and are the basic gates used in all IC digital logic families.

c
When implementing any Boolean expression, it involves various logic gates and it needs
various standard ICs. But all gates within the standard ICs are not utilized. For example to imple-
ment Boolean expression AB  CD we require two AND gates, one OR gate and one NOT

e
gate. This requires 3 standard ICs. But gates utilizes from ICs are very less. To improve utilization
of ICs and reduce number of ICs required, NAND/NOR gates are used to implement Boolean
expression. For this, conversion of AND/OR/NOT gates into NAND/NOR gates is needed.

p
The graphic symbols for NAND gate are shown in figure 2.95 and the graphic symbols for
NOR gate are shown in figure 2.96. A one-input NAND or NOR gate behaves like an inverter as

S
shown in figure 2.96.

A A
B B F=A+B+C
F=ABC C = ABC
C
Figure-2.95: Graphic symbol for NAND gate
A
A
B F=ABC
B = A+B+C
C
C F=A+B+C
Figure-2.96: Graphic symbol for NOR gate

X X X X X X

Figure-2.97: Graphic symbol for NOT gate

130
 Gate Level Minimization

Designing steps for NAND and NOR implementations.

1. Simplify the function and express it in sum of products (AND/OR logic).
2. For NAND implementation, add bubbles on the output of each AND gate and add bubbles
on the input side to all OR gates.
3. For NOR implementation, add bubbles on the output of each OR gate and add bubbles on the
input side of all AND gates.
4. Add or subtract an inverter on each line that received a bubble in step 2 or 3.
5. Replace bubbled OR by NAND and bubbled AND by NOR.
6. Eliminate double inversions.

2.3.1 NAND Gate Implementation

Example-31: Implement the Boolean function with NAND gates. F = AB + CD +E.
Sol.

u m
Step-1: Draw AND-OR circuit.
A
B
t r
C
D
E
e c F

S p
Step-2: Add bubbles on output of each AND gate and input f OR gate.
A
B

C
F
D
E
Step-3: Replace other gates by NAND gates.
A
B

C
F
D

131
Digital System Design

Example-32: Implement the Boolean expression with NAND gates Y  A  BC D .  

Sol.


Step-1: Draw original logic diagram for Y  A  BC D
A
B
F
C
D

m
Step-2: Add bubbles on the output of the AND gates and input of the OR gate.
A

u
B
Y

r
C
D

c t
Step-3: Add inverters on each line that received a bubbles.
A

e
C
D

p
Step-4: Eliminate double inversions.
A

S B
C
D
Step-5: Replace the other gates by only NAND gates.
A
Y

B Y
C
D
Example-33: Implement NAND gates for Y  AB  C D  EF .
Sol.
Step-1: Draw the original logic diagram for the expression.

132
 Gate Level Minimization

A
B

C
Y
D
E
F
Step-2: Add bubbles on the output of the AND gates and input of the OR gates.
A
B

m
C
D Y
E
F

r
Step-3: Add inverters on each line that received a bubble.
u
t
A
B

c
C
D Y
E
F

p A
B
e
Step-4: Eliminate double inversions.

S C
D
E
F
Step-5: Draw the circuit with only NAND gates.
Y

A
B
C
D Y

E
F

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Digital System Design

2.3.2 NOR Gate Implementation

Example-34: Implement the Boolean expression with NOR gates.

F  A  BC.D .
Sol.
Step-1: Draw the original logic diagram for the given Boolean expression,
A
B F
C
D

B
C

u m
Step-2: Add bubbles on output of each OR gate and add bubbles on input of each AND gate.

A
F

t r
Step-3: Add inverters on each line that received bubbles.

A
B
C
D

e c F

S p
Step-4: Eliminate double inversions.

D
A
B
C F

Step-5: Draw the NOR diagram with one graphic symbol.

A
B F

134
 Gate Level Minimization

2.4 THE EXCLUSIVE-OR (X-OR) FUNCTION

An X-OR gate is a two input, one output logic circuit, whose output assumes a logic 1 state when
one and only one of its two inputs assumes a logic 1 state, Under the conditions when both the
inputs assume the logic 0 state, or when both the inputs assume the logic 1 state, the output
assumes a logic 0 state.
Since an X-OR gate produces an output 1 only when the inputs are not equal, it is called an
anti-coincide gate or inequality detector. The output of an X-OR gate is the modulo sum of its two
inputs, The name Exclusive-OR is derived from the fact that its output is a 1, only when exclu-
sively one of its inputs is a l (it excludes the condition when both the inputs are 1).
The logic symbol and truth table of a two-input X-OR gate are shown in figures 2.98 a and

m
2.120 b, respectively. If the input variables are represented by A and B and the output variable by
X the expression for the output of this gate is written as X  A  B  AB  AB and read as ‘X is
equal to A ex-or B’.

u
r
0 0 1 1 1
0 1 0
0 1 0 1

t
Truth table
Inputs Outputs

c
A X =A +B A B X =A +B Input X = Input
B 0 0 0
0 1 1 1

e
Logic symbol 1 0 1
(a) 1 1 0
(c) X-OR gate as an inverter
(b)

S p Figure-2.98: Exclusive-OR gate

Three or more variable X-OR gates do not exist. When more than two variables are to be X-
ORed, a number of two-input X-OR gates will be used. The X-OR of a number of variables
assumes a l state only when an odd number of input variables assume a l state.
The Boolean expression whose value is equal to l only when an odd number of its variables
are equal to 1 is called an odd function.
X-OR Gate as an Inverter
An X-OR gate can be used as an inverter by input connecting one of the two input terminals to
logic 1 and feeding the input sequence to be inverted to the other terminal as shown figure 2.98 (
c). If the input bit is 0  1  1 , the output is, 1  1  0 . In fact, we can say that X-OR gate can be
used as a controlled inverter, that is, one of it’s inputs can be used to decide whether the signal at
the other input will be inverted or not.
The TTL IC 7486 contains four X-OR gates. The CMOS IC 74C86 contains four X-OR
gates. High speed CMOS IC 74HC86 contains four X-OR gates.

135
Digital System Design

2.5 OUTCOMES

At the end of the Unit have a glimpse at

 Student can understand the importance of using K-map method in getting a simplified
expression.
 Student understands using don’t care condition K-map method.
 Student understands the drawback in K-map.
 Learned the NAND and NOR implementations.
 Learned the design of any combinational circuit by using multiplexer and demultiplexer.

2.6 REVIEW QUESTIONS

I. Short Answer Questions

u m
r
1. Define the term “gate-level minimization” in digital logic design. Provide an example of why
minimizing logic gates is important in circuit design.
2.

3.

c
Show the steps of simplification.
t
Given a boolean expression F = AB + A’C + BC, simplify it using the karnaugh map method.

What is a “don’t-care” condition in boolean logic? How does it help in simplifying logic

4.

5.
p e
expressions? Provide an example.
Explain the concept of “NAND” and “NOR” implementation of logic gates. Compare the
advantages and disadvantages of each approach.
Solve the following problem: using only NAND gates, implement the boolean expression F

6.
7.
S
= AB + C.
Define a multiplexer. Provide a scenario in which a multiplexer can be used for data selection
Explain the difference between a multiplexer and a demultiplexer. Provide an example of
their practical applications.
8. Given a truth table for a three-input multiplexer, design the circuit and provide the expression
for its output.
9. Describe the working principle of a demultiplexer. How does it differ from a decoder?
10. Solve the following problem: Design a 2-to-1 multiplexer using logic gates. Provide the truth
table and circuit diagram.
11. Define a “hazard” in digital circuits. Provide an example of how hazards can occur and how
they can be mitigated.

136
 Gate Level Minimization

12. Given a four-variable boolean function F = AB’CD + AB’C’D + ABCD, simplify it using
the Quine-McCluskey method. Show the steps of simplification.
13. What is the concept of “don’t-care” conditions in karnaugh maps? How can they be used to
optimize circuit design?
14. Discuss the advantages and disadvantages of using NAND gates and NOR gates for
implementing logic functions.
15. Reduce the expression F(a,b,c)=  (2,3,4,5) using mapping and implement it in A-O-I.
II. Long Answer Questions
1. Describe the process of map simplification for a five-variable boolean function. Present the

2.
m
Karnaugh map, intermediate steps, and the final simplified expression.
Solve the following problem: using the exclusive-OR (XOR) function, design a circuit that
performs binary addition for two single-bit inputs.

u
r
3. Explain the concept of a “Decoder” and its role in digital systems. Design a 3-to-8 decoder
using NAND gates and provide its truth table.
4.
5.
6.
t
Explain the NAND-NOR realization of Boolean function with example.

c
Explain in detail about multilevel gate implementation.
Reduce using the k-mapping the expression F(A,B,C,D)=  (2,3,6,7,10,11,13,14)
7.
8.

9.
p e
Reduce using the k-mapping the expression F(A,B,C,D)=  (8,9,10,11,12,14))
Reduce the given function using K-Map and implement the same using Universal gate
F(a,b,c,d) =  (0,2,4,6,7,8,10,12,13,15)
Find the simplified expression F=  (1,3,7,11,15)+  d(10,14) [JNTUH-2018]

S
10. Implement the following using 8 input multiplexer
F( A B C D )   (0, 1, 3, 4, 6, 8, 15)
11. Explain about Multiplexer and Demultiplexer.
12. What is multiplexing and demultiplexing.
13. Obtain an 8 : 1 multiplexer with a dual 4 : 1 multiplexer having seperate enable inputs but
common selection lines. Use block diagram approach.

2.7 MULTIPLE CHOICE QUESTIONS

1. In gate-level minimization, what is the primary goal? ( )
(a) Increasing circuit complexity (b) Reducing circuit propagation delay
(c) Introducing more gates (d) Maximizing power consumption

137
Digital System Design

2. A “Don’t-Care” condition in a truth table indicates: ( )

(a) An invalid state (b) A state that should not occur
(c A state for which output can be either 0 or 1
(d) A missing input value
3. What is the basic logic operation performed by a NAND gate? ( )
(a) AND (b) OR (c) NOT (d) XOR
4. Which combinational circuit element is used to select one out of multiple data inputs? ( )
(a) Decoder (b) Multiplexer (c) Flip-flop (d) Counter
5.
(a AND gate (b) OR gate (c) XOR gate

u m
Which logic gate is commonly used to perform binary addition in digital systems?
(d) NOT gate
( )

r
6. The expression AB’ + A’B can be simplified to: ( )

t
(a) A (b) B (c) AB (d) 0
7. A four-variable map consists of how many cells? ( )

8.
(a) 8

(a) A forbidden state

(b) 12

e c (c) 16
In a Karnaugh map, what does a “don’t-care” condition represent?
(d) 20

(b) A state with multiple outputs

( )

9.

S p
(c) A state with unpredictable output (d) A state for which output is not relevant
The main disadvantage of using NOR gates in logic design are:
(a) Slower propagation delay
(c) Larger physical size
(b) Higher power consumption
( )

(d) Inability to implement basic logic functions

10. The term “data propagation delay” refers to: ( )
(a) The time taken for input changes to affect the output
(b) The delay caused by insufficient power supply
(c) The time taken for clock signals to propagate through the circuit
(d) The delay introduced by don’t-care conditions
11. A 3-variable function with a 2-cell map can have how many prime implicants? ( )
(a) 2 (b) 3 (c) 4 (d) 8

138
 Gate Level Minimization

12. A priority encoder is used to: ( )

(a) Decode binary numbers to decimal
(b) Convert binary numbers to Gray code
(c) Encode priority information from multiple inputs
(d) Implement arithmetic operations
13. A multiplexer can be used for: ( )
(a) Data distribution (b) Data encryption
(c) Data amplification (d) Data sorting
14. F =  (1,5,7) then F = ( )

m
(a) AB+C (b) A’B+C (c) A’B+C’ (d) AB+C’
15. The implicants which will definitely occur in the final expression are called ____ ( )

u
(a) Don’t Care (b) Essential Prime Implicant
(c) False Prime Implicant (d) None

(a) Don’t Care

(c) False Prime Implicant
t r
16. The prime implicant mode of a bunch of 0s is called a ____
(b) Essential Prime Implicant
(d) None
( )

(a) AB+C (b) AB+AC

e c
17. The given expression Y=  (0,2,3,4,6) in SOP form is ___

18. The Boolean expression A  B  C  D is

(c) A’B+C’ (d) None
( )

( )

p
(a) A product term
(c) A literal term

S
(b) A sum term
(d) A complemented term
19. If multiplexer has x select lines, it has ____ output(s)
(a) one (b) x (c) 2x (c) Two
( )

20. Two 16:1 and one 2:1 multiplexers can be connected to form a ____. ( )
(a) 16:1 multiplexer (b) 32:1 multiplexer
(c) 64:1 multiplexer (d) 8:1 multiplexer
21. A demultiplexer has ______ ( )
(a) One data input and a number of selection inputs and they have several outputs
(b) One input ane one output
(c) Several inputs and several outputs
(d) Several inputs and one input

139
Digital System Design

Keys
1. (b) 2. (c) 3. (c) 4. (b) 5. (c)
6. (d) 7. (c) 8. (d) 9. (c) 10. (a)
11. (a) 12. (c) 13. (a) 14. (c) 15. (b)
16. (c) 17. (c) 18. (b) 19. (a) 20. (b)
21. (a)

u m
t r
e c
S p

140