Republic of the Philippines

State College and Universities

ILOILO SCIENCE AND TECHNOLOGY UNIVERSITY
Burgos Street, La Paz, Iloilo City
College of Engineering and Architecture

ECE 26 – ELECTRONICS 3:
ELECTRONICS SYSTEMS AND DESIGN
ACTIVITY - 5

I. Chapter Title: LM555 - Timer IC

II. Module Introduction/Rationale:
This activity shall demonstrate to the students the function and operation of the 555-timer IC. This will
teach the students how to make electronics designs that are based on the 555-timer IC.
III. Module Outcomes:
CO1: To be able to analyze and describe the operation of the 555-timer IC.
CO2: To observe the electrical properties and characteristics of the 555-timer IC.
IV. Lesson Title: Introduction to the 555-Timer IC
V. Lesson Outcomes
At the end of this topic the learner should be able to:
1. Describe the operation of the 555-timer IC.
2. Design and analyze a voltage comparator and controlled switch using the 555-timer IC.
Discussion:

The 555-timer IC was designed in 1971 by Hans Camenzind. The internal circuit block diagram of this IC is
shown below in Figure 1. The important circuit elements are highlighted with the same colors, for ease of reference.

Figure 1 – Block Diagram and Pin Diagram of the 555-timer IC

Figure 2A – 555 configuration using BJT Figure 2B - 555 configuration using CMOS
Depending on the manufacturer, the standard 555 package includes 25 transistors, 2 diodes and 15 resistors on
a silicon chip installed in an 8-pin dual in-line package (DIP-8). Another variant is the 556 which is a 14-pin DIP
combining two complete 555s in one chip.
 Republic of the Philippines
State College and Universities
ILOILO SCIENCE AND TECHNOLOGY UNIVERSITY
Burgos Street, La Paz, Iloilo City
College of Engineering and Architecture

Referring to Figure 1, the highlighted elements are:

 Green: Between the positive supply voltage VCC and the ground GND is a voltage divider consisting of three
identical resistors, which create two reference voltages at 1⁄3 VCC and 2⁄3 VCC. The la er is connected to the
"Control Voltage" pin. All three resistors have the same resistance, 5 kΩ for bipolar timers, 100 kΩ (or higher) for
CMOS timers
 Yellow: The comparator negative input is connected to the higher-reference voltage divider of 2⁄3 VCC (and
"Control" pin), and comparator positive input is connected to the "Threshold" pin.
 Red: The comparator positive input is connected to the lower reference voltage divider of 1⁄3 VCC, and
comparator negative input is connected to the "Trigger" pin.
 Purple: An SR flip-flop stores the state of the timer and is controlled by the two comparators. The "Reset" pin
overrides the other two inputs, thus the flip-flop (and therefore the entire timer) can be reset at any time.
 Pink: The output of the flip-flop is followed by an output stage with push-pull (P.P.) output drivers that can load
the "Output" pin with up to 200 mA for bipolar timers, lower for CMOS timers.
 Cyan: Also, the output of the flip-flop turns on a transistor that connects the "Discharge" pin to the ground.

555 Pin Pin

Pin description
pin# name Function

1 GND Power Ground supply: this pin is the ground reference voltage (zero volts).
Trigger: when the voltage at this pin falls below 1⁄2 of CONT pin voltage (1⁄3 VCC except when CONT is driven by
2 TRIG Input an external signal), the OUT pin goes high and a timing interval starts. As long as this pin continues to be kept at
a low voltage, the OUT pin will remain high.
Output: this pin is a push-pull (P.P.) output that is driven to either a low state (GND pin) or a high state (for
bipolar timers, VCC pin minus approximately 1.7 Volts) (for CMOS timers, VCC pin). For bipolar timers, this pin can
3 OUT Output drive up to 200mA, but CMOS timers are able to drive less (varies by chip). For bipolar timers, if this pin drives
an edge-sensitive input of a digital logic chip, a 100 to 1000 pF decoupling capacitor (between this pin and GND)
may need to be added to prevent double triggering.
Reset: a timing interval may be reset by driving this pin to GND, but the timing does not begin again until this
4 RESET Input pin rises above approximately 0.7 Volts. This pin overrides the trigger, which in turn overrides the threshold. If
this pin is not used, it should be connected to VCC to prevent electrical noise causing a reset.
Control (or Control Voltage): this pin provides access to the internal voltage divider (2⁄3 VCC by default). By
CONT applying a voltage to this pin, the timing characteristics can be changed. In astable mode, this pin can be used
5 Input
(CV) to frequency-modulate the output. If this pin is not used, it should be connected to a 10 nF decoupling
capacitor (between this pin and GND) to ensure electrical noise doesn't affect the internal voltage divider.
Threshold: when the voltage at this pin is greater than the voltage at CONT pin ( 2⁄3 VCC except when CONT is
6 THRES Input
driven by an external signal), then the "OUT high" timing interval ends, causing the output to go low.
Discharge: For bipolar timers, this pin is an open-collector (O.C.) output, CMOS timers are open-drain (O.D.).
7 DISCH Output This pin can be used to discharge a capacitor between intervals, in phase with output. In bistable mode and
Schmitt trigger mode, this pin is unused, which allows it to be used as an alternate output.
Positive supply: For bipolar timers, the voltage range is typically 4.5 to 16 Volts, some are specified for up to 18
8 VCC Power Volts, though most will operate as low as 3 Volts. For CMOS timers, the voltage range is typically 2 to 15 Volts,
some are rated up to 18 Volts, and some are rated as low as 1 Volt.
 Republic of the Philippines
State College and Universities
ILOILO SCIENCE AND TECHNOLOGY UNIVERSITY
Burgos Street, La Paz, Iloilo City
College of Engineering and Architecture

The 555 IC has the following operating modes:

 Astable (free-running) mode – the 555 can operate as an electronic oscillator. Uses include LED and
lamp flashers, pulse generation, logic clocks, tone generation, security alarms, pulse position modulation
and so on.
 Monostable (one-shot) mode – in this mode, the 555 functions as a "one-shot" pulse generator.
Applications include timers, missing pulse detection, bounce-free switches, touch switches, frequency
divider, capacitance measurement, pulse-width modulation (PWM), and so on.
 Bistable (flip-flop) mode – the 555 operates as a SR flip-flop. Uses include bounce-free latched switches.
 Schmitt Trigger (inverter) mode - the 555 operates as a Schmitt trigger inverter gate which converts a
noisy input into a clean digital output.

Design of a 555-based Astable Configuration

In the astable configuration, the 555 timer puts out a continuous stream of rectangular pulses having a specific
frequency. The output voltage is illustrated in Figure 3 below.

Figure 3 – Output Voltage of 555-Timer IC in astable mode and circuit configuration

Operation of the 555 Astable Mode

The astable configuration is implemented using two resistors R1 and R2 as shown in Figure 3, and one
capacitor C. In this configuration, the control pin is not used, thus it is connected to ground through a 10nF decoupling
capacitor to shunt electrical noise. The threshold and trigger pins are connected to the capacitor C , thus they have the
same voltage. Initially, the capacitor C is not charged. The trigger pin receives zero voltage which is less than a third of
the supply voltage. Consequently, the trigger pin causes the output to go high and the internal discharge transistor to go
to cut-off mode. Since the discharge pin is no longer short-circuited to ground, the current flows through the two
resistors R1 and R2, to the capacitor C charging it. The capacitor C starts charging until the voltage becomes two-thirds
of the supply voltage. At this instance, the threshold pin causes the output to go low and the internal discharge
transistor to go into saturation mode. Consequently, the capacitor starts discharging through till it becomes less than a
third of the supply voltage, in which case, the trigger pin causes the output to go high and the internal discharge
transistor to go to cut-off mode once again. And the cycle repeats. In the first pulse, the capacitor charges from zero to
two-thirds of the supply voltage, however, in later pulses, it only charges from one-third to two-thirds of the supply
voltage. Consequently, the first pulse has a longer high time interval compared to later pulses. Moreover, the capacitor
charges through both resistors but only discharges through R2, thus the high interval is longer than the low interval.
 Republic of the Philippines
State College and Universities
ILOILO SCIENCE AND TECHNOLOGY UNIVERSITY
Burgos Street, La Paz, Iloilo City
College of Engineering and Architecture

The high time (THIGH) interval of each pulse is given by:

The low time (TLOW) interval of each pulse is given by:

Hence, the frequency (f) of the pulse is given by:

and the duty cycle (%) is given by:

: where time is in seconds, resistance is in ohms, capacitance is in farads, and ln(2) is the natural log of 2 which is a
constant.

Resistor Requirements
Particularly with bipolar 555s, low values of R1 must be avoided so that the output stays saturated near zero
volts during discharge, as assumed by the above equation. Otherwise, the output low time will be greater than
calculated above. The first cycle will take appreciably longer than the calculated time, as the capacitor must charge from
0V to 2⁄3 of VCC from power-up, but only from 1⁄3 of VCC to 2⁄3 of VCC on subsequent cycles.
To have an output high time shorter than the low time (i.e., a duty cycle less than 50%) a fast diode (i.e. 1N4148
signal diode) can be placed in parallel with R2, with the cathode on the capacitor side. This bypasses R 2 during the high
part of the cycle so that the high interval depends only on R 1 and C, with an adjustment based the voltage drop across
the diode. The voltage drop across the diode slows charging on the capacitor so that the high time is longer than the
expected and often-cited ln(2)*R1C. The low time will be the same as above, 0.693 R2C. With the bypass diode, the high
time is:

where Vdiode is when the diode's "on" current is 1⁄2 of Vcc/R1 which can be determined from its datasheet or by
testing.