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EE328-Outline Spring 2018

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16 views6 pages

EE328-Outline Spring 2018

Uploaded by

AzkaKhalid
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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University of Management and Technology

School of Engineering
Department of Electrical Engineering
Course Outline
Course code: EE328 Course title: Modern Microprocessor Systems

Program BSEE

Credit Hours 3

Duration One Semester

EE 227
Prerequisites
Computer Organization and Architecture

Zafar Iqbal1
Zawar Hussain2
Resource Person
Jamil Ahmad3

Counseling Timing Check on Website1,2,3

[email protected]
Contact [email protected]
[email protected]

Chairman/Director Signature………………………………….

Dean’s Signature…………………………… Date…………………………………

EE-328 Course Outline Page 1


Course Learning Outcomes (CLOs):
CLO 1. Identify distinguishing features of Intel family members ISA.
(Level: C3)

CLO 2. Understand functions of modern memory & I/O systems and interface them to the
microprocessors
(Level: C3)

CLO 3. Develop software to interface microcontroller with memory and I/O.


(Level: C3)

CLO 4. Analyze, design and implement practical systems of up to average complexity within a
team.
(Level: C3)

CLO 5. Appreciate design issues related to multi-core processor systems


(Level: C3)

Mapping of CLOs to Program Learning Outcomes

PLOs\CLOs CLO 1 CLO 2 CLO 3 CLO 4 CLO 5


PLO:1 (Engineering Knowledge) 
PLO:2 (Problem Analysis) 
PLO:3 (Design and Development of Solution)  
PLO:4 (Investigation) 
PLO:5 (Modern Tool Usage)
PLO:6 (The Engineer and Society)
PLO:7 (Environment and Sustainability)
PLO:8 (Ethics)
PLO:9 (Individual and Team Work)
PLO:10 (Communication)
PLO:11 (Project Management)
PLO:12 (Life Long Learning)

EE-328 Course Outline Page 2


Grade Evaluation Criteria

Following is the criteria for the distribution of marks to evaluate final grade in a semester.

Marks Evaluation Marks in percentage


Quizzes and Assignments 25
Mid Term 25
Final exam 50
Total 100

Recommended Text Books:

1. "80X86 IBM PC and Compatible Computers: Assembly Language, Design, and


Interfacing”, Volumes I & II (5th Edition) 2010, Pearson by Muhammad Ali Mazidi
2. The Intel Microprocessors (8th Edition), By Barry B. Brey

Reference Books:
3. Assembly Language Programming and Organization IBM PC, By Yatha Yu

EE-328 Course Outline Page 3


Calendar of course contents to be covered during semester

Course code: EE328 Course title: Modern Microprocessor Systems

Reference
Week CLOs
Course Contents
Chapter(s)

Introduction to Computing
0.1 Numbering and Coding Systems Ch-01
0.2 Inside the Computer
1 0.3 Brief History of the CPU
The 80x86 Microprocessor Ch-11
1.2 Inside the 8086/8088
The 80x86 Microprocessor
1.3 Introduction to Assembly Programming
1.4 Introduction to Program Segments Ch-11 CLO 1
2
1.5 80x86 Addressing Modes

Introduction to PIC Controller (16F877A/ 16F887)


8088, 80286 Microprocessors and ISA Bus
3 9.1 8088 Microprocessor Ch-9 1
9.2 8284 and 8288 Supporting Chips
4 9.3 8-Bit Section of ISA Bus Ch-9 1
9.5 16-bit ISA bus
Memory Interface
5 10.1 Memory Devices Chp-102
10.2 Address Decoding
CLO 2
6 Memory Interfacing Ch-102
10.5 32-bit Memory Interface
Memory Interfacing Ch-102
10.6 64-bit Memory Interface
7 IO and the 8255; ISA Bus Interfacing
11.1 8088 I/O Instructions1 Ch-111 CLO 3

Mid Term Examination

EE-328 Course Outline Page 4


IO and the 8255; ISA Bus Interfacing
11.2 I/O Address decoding and Design2 (pg # 387-
392)
9 Ch-111,2 CLO 3
11.4 Programming and interfacing 8255 1
11.5 16550 Programmable Communications
Interface2
(pg # 433-437)
8253/54 Timer and Music
10 13.1 8253/54 Timer Description and Initialization Ch-131
13.2 IBM PC 8253/54 Timer Connections and
Programming
Interrupts and the 8259 Chip
11 14.1 8088/86 Interrupts Ch-141
14.3 8259 Programmable Interrupt Controller
14.4 Use of the 8259 Chip in the IBM PC/XT Ch-141 CLO 4
12 Direct Memory Access
15.1 Concept of DMA Ch-151
15.2 8237 DMA Chip Programming
Direct Memory Access Ch-151
15.3 8237 DMA interfacing in the IBM PC
13
Bus Interface
Ch-152
15.4 The Serial COM ports
15.5 The Universal Serial Bus
High Speed Memory Interfacing and Cache Ch-221
14 22.3 Cache Memory
Pentium and RISC Processors Ch-231
23.5 MMX Technology CLO 5
The evolution of x86: From 32-bit to 64-bit
15 24.1 Variations and Enhancements of 32-bit Ch-241
processors
24.2 64-bit Architecture of x86

Final Term Examination

EE-328 Course Outline Page 5


Mapping of CLOs to Direct Assessments

Final Exam
Midterm
Quiz 1

Quiz 2

Quiz 3

Quiz 4

Quiz 5

Quiz 6

Exam
CLOs▼

1    

2   

3   

4   

5  

EE-328 Course Outline Page 6

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