ME8117/ME8117-G
P-Channel 30V (D-S) MOSFET
GENERAL DESCRIPTION FEATURES
The ME8117 is the P-Channel logic enhancement mode power field ● RDS(ON)≦5.2mΩ@VGS=-10V
effect transistors are produced using high cell density, DMOS trench ● RDS(ON)≦9.5mΩ@VGS=-4V
technology. This high density process is especially tailored to ● Super high density cell design for extremely low R DS(ON)
minimize on-state resistance. These devices are particularly suited ● Exceptional on-resistance and maximum DC current
for low voltage application such as cellular phone and notebook capability
computer power management and other battery powered circuits
where high-side switching and low in-line power loss are needed in a APPLICATIONS
very small outline surface mount package. ● Power Management in Note book
● Portable Equipment
● Battery Powered System
● DC/DC Converter
● Load Switch
● LCD Display inverter
PIN CONFIGURATION
(SOP-8)
Top View
The Ordering Information: ME8117(Pb-free)
ME8117-G (Green product-Halogen free)
Absolute Maximum Ratings (TA=25℃ Unless Otherwise Noted)
Parameter Symbol Maximum Ratings Unit
Drain-Source Voltage VDS -30 V
Gate-Source Voltage VGS ±20 V
TA=25℃ -17.3
Continuous Drain Current ID A
TA=70℃ -13.9
Pulsed Drain Current IDM -69 A
TA=25℃ 2.5
Maximum Power Dissipation* PD W
TA=70℃ 1.6
Junction and Storage Temperature Range TJ, Tstg -55 to 150 ℃
Thermal Resistance-Junction to Ambient* RθJA 50 ℃/W
The * * The device mounted on 1in2 FR4 board with 2 oz copper DCC
正式發行
1.2
Jun, 2015-Ver2.2 01
ME8117/ME8117-G
P-Channel 30V (D-S) MOSFET
Electrical Characteristics (TJ =25℃ Unless Otherwise Specified)
Symbol Parameter Limit Min Typ Max Unit
STATIC
VBR(DSS) Drain-source breakdown voltage ID=-10mA, VGS=0V -30 V
VGS(th) Gate Threshold Voltage VGS= VDS, ID=-250μA -1 -3.0 V
IGSS Gate Leakage Current VDS=0V, VGS=±20V ±100 nA
IDSS Zero Gate Voltage Drain Current VDS=-30V, VGS=0V -1 μA
a
VGS=-10V, ID= -9A 4 5.2
RDS(ON) Drain-Source On-State Resistance mΩ
VGS=-4V, ID= -9A 7 9.5
VSD Diode Forward Voltage ID=-18A, VGS=0V -0.8 V
DYNAMIC
Qg Total Gate Charge VDD=-24V, VGS=-10V, ID=-18A 146
Qg Total Gate Charge 78
nC
Qgs Gate-Source Charge VDD=-24V, VGS=-4.5V, ID=-18A 24
Qgd Gate-Drain Charge 40
Ciss Input capacitance 6150
Coss Output Capacitance VDS=-15V, VGS=0V, f=1MHz 950 pF
Crss Reverse Transfer Capacitance 327
td(on) Turn-On Delay Time 75
tr Turn-On Rise Time VDD=-15V, RL =15Ω 32
ns
td(off) Turn-Off Delay Time VGS=-10V,RG=4.7Ω 280
tf Turn-Off Fall Time 88
Notes: a. Pulse test: pulse width≦ 300us, duty cycle≦ 2%, Guaranteed by design, not subject to production testing.
b. Matsuki Electric/ Force mos reserves the right to improve product design, functions and reliability without notice.
DCC
正式發行
1.2
Jun, 2015-Ver2.2 02
ME8117/ME8117-G
P-Channel 30V (D-S) MOSFET
Typical Characteristics (TJ =25℃ Noted)
DCC
正式發行
1.2
Jun, 2015-Ver2.2 03
ME8117/ME8117-G
P-Channel 30V (D-S) MOSFET
Typical Characteristics (TJ =25℃ Noted)
DCC
正式發行
1.2
Jun, 2015-Ver2.2 04
ME8117/ME8117-G
P-Channel 30V (D-S) MOSFET
SOP-8 Package Outline
MILLIMETERS (mm)
DIM
MIN MAX
A 1.35 1.75
A1 0.10 0.25
B 0.35 0.49
C 0.18 0.25
D 4.80 5.00
E 3.80 4.00
e 1.27 BSC
H 5.80 6.20
L 0.40 1.25
θ 0° 7°
* The NNote: 1. Refer to JEDEC MS-012AA.
2. Dimension “D” does not include mold flash, protrusions
or gate burrs . Mold flash, protrusions or gate burrs shall not
exceed 0.15 mm per side. DCC
, 2.
正式發行
1.2
Jun, 2015-Ver2.2 05