Experiment No. 13
Experiment No. 13
Requirements
IC 7473, Resistor ,LED, Power Supply, Breadboard, Connecting
wires, Function Generator ,2 Slide switches.
Theory:
SR Flip Flop
S PR
SR
CLK
FLIP
FLOP
R
CLR
TY
Leotn Empawe
S Ot+1)
1 0 1
1 Intermediate
a) Logic diagram
0
hg: Clocked SR Mip lop
1 1 1
1 1 1 Iintermediale
b) Truth table
Truth Table
R Q
No Change
0 O(Reset)
1 1(Sel)
1 Invalid
JK Flip Flop
The SR Flip Flop or Set-Reset flip flop has lots of advantages. But,
it has the following switching problems:
" When Set 'S' and Reset 'R' inputs are set to 0, this condition is
always avoided.
" When the Set or Reset input changes their state while the
enable input is the incorrect latching action occurs.
1 Toggle
Simulation Results: if
J=0,k=0,Q=No change