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Control Unit Part2

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7 views

Control Unit Part2

Uploaded by

ee23b029
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Control Unit for Contemporary Instruction

Set Processors
Part 2
Overview

 Discussed basics of microprogramming.


 Will now look at the structure of hardwired
control.

2
Structure of Hardwired Control

3
Explanation

 The controller is viewed as a sequential logic


circuit that generates the appropriate
sequence of signals in response to
instructions provided (externally).
 Will see an example of design of a hardwired
control unit shortly.

4
Advantages and Limitations of Hardwired
Control

 The advantage is in terms of performance. We get higher


speed since we do not have the extra step of fetching
microinstructions from control memory.
 The limitation is that flexibility is reduced: once the
hardwired control unit is constructed, we cannot make
changes easily (need to redesign the entire unit if
changes are required).
 RISC processors typically use hardwired control
(instruction sets are also small).
 Will discuss methods to design hardwired control units.

5
How does one design hardwired control
units ?

 Two approaches exist:


-- Classical method for sequential circuit design
(attempts to minimize the hardware, especially
the number of flip-flops)
-- One-hot method (uses one flip-flop per state)

We will study the classical method with reference to the


design of a processor to compute the greatest common
divisor (GCD) of two positive integers, X and Y.

6
Algorithm to calculate the
GCD

7
Explanation

 The algorithm is expressed by using registers (instead of


variables) so that we can easily map to hardware.
 The key idea with respect to the method itself is
subtraction of the smaller of the two numbers from the
other repeatedly.
 This is acceptable since division itself (which is the main
element in gcd calculation) can be accomplished using
repeated subtraction (just as multiplication is repeated
addition).

8
Example for the GCD algorithm

9
Beyond the algorithm

 We have obtained the GCD as 4.


 We now need to translate the algorithm into hardware.
 We will see the overall structure first that has the
datapath as well as the control blocks.
 Will then proceed to the control unit design.

10
How is the overall arrangement ?

11
Explanation

 If we go through the algorithm given, we can observe that


the datapath unit should definitely have a pair of registers
(named XR and YR).
 Note no dedicated register for TEMPR is required since
we can perform read from and write to a register in the
same clock cycle (so we can swap X and Y without
conflict in one cycle as X := Y; Y := X). This is controlled
by the Swap signal shown.
 Other elements implied by the gcd scheme include a
subtractor and a comparator.

12
Note

 Our interest is only in designing the control unit.


 To this end, we need to see how to implement/realize the
control signals in the “right hand side” block of the
diagram presented.
 Will discuss in the next part the first of the two methods
for generating the required control signals.

13
Reference

 J. Hayes, Computer Architecture and


Organization, McGraw-Hill, 2017.

14

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