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Cheat Sheet Micro

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4hns6pms89
Copyright
© © All Rights Reserved
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a) Complete the following SysTick initialization assembly subroutine if you know 1.

1.Complete the following SysTick initialization assembly subroutine if you know SysTick
SysTick will interrupt the processor every 5 Milliseconds, SysTick priority is 1, and the will interrupt the processor every 25 ms, SysTick priority is 3, and the clock frequency is
clock frequency is 16MHz. 80MHz.
Note: The descriptions of SysTick registers and the priority register for SysTick are below. SysTick_Init
SysTick_Init ; disable SysTick during setup
LDR R1, =NVIC_ST_CTRL_R LDR R1, =0xE000E010
MOV R2, #0 MOV R2, #0
STR R2, [R1] STR R2, [R1]
LDR R1, =NVIC_ST_RELOAD_R ; set the reload
LDR R0, =80000 LDR R1, =0xE000E014
SUB R0, R0, #1 LDR R0, =2000000
STR R0, [R1] SUB R0, R0, #1
LDR R1, =NVIC_ST_CURRENT_R STR R0, [R1]
STR R2, [R1] ; clear the CURRENT register
LDR R1, =NVIC_SYS_PRI3_R LDR R1, =0xE000E018
LDR R2, [R1] STR R2, [R1]
AND R2, R2, #0x00FFFFFF ; set NVIC system interrupt 15 to priority 3
ORR R2, R2, #0x20000000 LDR R1, =0xE000ED20
STR R2, [R1] LDR R2, [R1]
LDR R1, =NVIC_ST_CTRL_R AND R2, R2, #0x00FFFFFF
MOV R2, #7 ORR R2, R2, #0x60000000
STR R2, [R1] STR R2, [R1]
BX LR ; enable SysTick with core clock
Address 31-29 23-21 15-13 7-5 Name LDR R1, =0xE000E010
0xE000ED20 SysTick PendSV -- Debug NVIC_SYS_PRI3_R MOV R2, #7
b) (5 points) what is the RELOAD value if the clock frequency is 80MHz. STR R2, [R1]
RELOAD = 80 x 10^6 x 5 x 10^-3 – 1 = 399999 BX LR
Question-2: Address 31-29 23-21 15-13 7-5 Name
a)Which ISR will be executed by 0xE000ED20 SysTick PendSV -- Debug NVIC_SYS_PRI3_R
the processor if the Interrupt Program Status 2. Complete the configuration of the following port E registers in this assembly code if you
Register IPSR=46 know the processor executes Port E ISR whenever a positive logic switch connected to
Note: 46 is the interrupt number, not the IRQ number. PE3 is pressed. The priority of Port E is 4.
Registers are described in the next page. LDR R1, =GPIO_PORTE_IS_R ; Interrupt Sense register
IRQ number n=46-16=30 LDR R0, [R1]
m = n/4 = 30/4 = 7 à (NVIC_PRI7_R) BIC R0, #0x08
p = n%4 = 30%4 = 2 STR R0, [R1]
8*2+7=23 LDR R1, =GPIO_PORTE_IBE_R ; Interrupt Both Edges
8*2+6=22 LDR R0, [R1]
8*2+5=21 BIC R0, #0x08
23-21 à (GPIO Port F) STR R0, [R1]
Thus, the ISR that will be executed by the processor is (PORT F) ISR LDR R1, =GPIO_PORTE_IEV_R ; Interrupt Event
b) (25 points) Initialize Port B registers (IS, IBE, IEV, PRI, and EN) if you know the LDR R0, [R1]
processor executes Port B ISR on both rising and falling edges of the input signal ORR R0, #0x08
connected to PB0. STR R0, [R1]
LDR R1, =GPIO_PORTB_IS_R ; Interrupt Sense register LDR R1, =GPIO_PORTE_ICR_R ; flag
LDR R0, [R1] MOV R0, #0x08
BIC R0, #0x01 STR R0, [R1]
STR R0, [R1] LDR R1, =GPIO_PORTE_IM_R ; Interrupt Mask Enable
LDR R1, =GPIO_PORTB_IBE_R ; Interrupt Both Edges register LDR R0, [R1]
LDR R0, [R1] ORR R0, #0x08
STR R0, [R1]
ORR R0, #0x01 LDR R1, =NVIC_PRI1_R ; Interrupt priority
STR R0, [R1] LDR R0, [R1]
LDR R1, =GPIO_PORTB_IEV_R ; Interrupt Event register AND R0, #0xFFFFFF00
(you don’t need to initialize this register because both edges are
used) ORR R0, #0x00000080
LDR R1, =NVIC_PRI0_R ; Interrupt priority register STR R0, [R1]
LDR R0, [R1] LDR R1, =NVIC_EN0_R ; Interrupt enable register
AND R0, #0xFFFF00FF LDR R0, =0x00000010
ORR R0, #mask ; see the table below for mask STR R0, [R1]
STR R0, [R1] CPSIE I
LDR R1, =NVIC_EN0_R ; Interrupt enable register BX LR
LDR R0, =0x00000002 3. Which ISR will be executed by the processor if the Interrupt Program Status Register
STR R0, [R1] IPSR=18
All masks are correct since it’s not specified in the question. Note: 18 is the interrupt number, not the IRQ number.
priority - mask - priority - mask Hint: to find the interrupt source, you need to use the formulas that’re used to find the
0 - #0x00000000 - 4 - #0x00008000 interrupt priority registers from the interrupt IRQ number, and the interrupt priority
1 - #0x00002000 - 5 - #0x0000A000 registers table below. Solution
2 - #0x00004000 - 6 - #0x0000C000 IRQ number n=18-16=2
3 - #0x00006000 - 7 - #0x0000E000 m = n/4=0 à (NVIC_PRI0_R)
Question-3: (30 points) p = n%4=2
Complete the following code that is used 8*2+7=23
to select PE1 as the analog input channel of ADC0. 8*2+6=22
LDR R1, =ADC0_SSMUX3_R 8*2+5=21
LDR R0, [R1] 23-21 à (GPIO Port C)
ADD your code here Thus, the ISR that will be executed by the processor is (PORT C) ISR
AND R0, R0, #0xFFFFFFF0 4. For this question, change only the corresponding bits and keep all other bits of the
ADD R0, R0, #2 ; you can use ORR too register at their original values.
STR R0, [R1] a. Complete the following code that is used to select PD3 as the analog input channel of
From Table ADC0.
PE1|Ain2 LDR R1, =ADC0_SSMUX3_R
LDR R0, [R1]
b. Complete the following code that is used to ADD your code here
make the maximum sampling rate of the ADC1 AND R0, R0, #0xFFFFFFF0
1M samples/second. (Note: Value is MAXADC1SPD in SYSCTL_RCGC0_R register) ADD R0, R0, #4
LDR R1, =SYSCTL_RCGC0_R STR R0, [R1]
LDR R0, [R1]
ADD your code here From Table
ORR R0, R0, #0x00000C00 PD3|Ain4
STR R0, [R1] b. Complete the following code that is used to make the maximum sampling rate of the
c. Complete the following code that is used to make the External (GPIO PB4) as the trigger ADC 500K samples/second.
source of ADC0/sample sequence 3. (Note: Value EM3 in ADC0_EMUX_R register) LDR R1, =SYSCTL_RCGC0_R
LDR R1, =ADC0_EMUX_R LDR R0, [R1]
LDR R0, [R1] ADD your code here
ADD your code here BIC R0, R0, #0x00000300
BIC R0, R0, #0xF000 ORR R0, R0, #0x00000200
ORR R0, R0, #0x4000 STR R0, [R1]
STR R0, [R1] c. Complete the following code that is used to make the Timer as the trigger source of
ADC0.
LDR R1, =ADC0_EMUX_R
LDR R0, [R1]
ADD your code here
BIC R0, R0, #0xF000
ORR R0, R0, #0x5000
STR R0, [R1]

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