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Verilog II

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Verilog II

Uploaded by

Sai Amith
Copyright
© © All Rights Reserved
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DIGITAL DESIGN

CS/ECE/EEE/INSTR F215

INTRODUCTION TO VERILOG
PROF. ANITA AGRAWAL

BITS –Pilani, K.K.Birla Goa campus


23-09-22
Data Flow Modeling
simply assign statements…..

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Dataflow Style
• A circuit can be specified with assignment statements that
transform inputs to the desired output values. Such
specification is called dataflow style .

• In this style, the circuit is not specified in terms of components


connected to external signals, but is expressed as a list of
outputs and expressions that transform the input values to the
desired outputs.

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Dataflow Style
• The expression can be based on broad range of operators such as logical
operators, bitwise reduction, arithmetic, conditional etc. All of them can be
applied in the assignment statements making dataflow style more universal
than logical equations.
• Uses continuous assignments and the keyword assign.
• Continuous assignments assign values to net
• Net, used to represent a physical connection between circuit elements
• Declared using wire or output
• Continuous assignments are always active. Whenever, one of the right hand
operands change in value, the value is assigned to the left hand side.
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Style example: Structural

module ha (A, B, S, C) ;

input A, B, ;
output S, C ;

xor g1(S,A,B);
and g2(C,A,B) ;

endmodule

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Style Example – RTL / Dataflow

module ha_rtl (A, B, S, C) ;

input A, B, ;
output S, C ;

assign S = A ^ B; //continuous assignment


assign C = A & B ; //continuous assignment

endmodule

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Style Example – RTL / Dataflow (full adder)

module fa_rtl (A, B, CI, S, CO) ;

input A, B, CI ;
output S, CO ;

assign S = A ^ B ^ CI; //continuous assignmen


assign CO = A & B | A & CI | B & CI;//continuous assignment

endmodule

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Style Example – RTL / Dataflow (full adder)

module fa_rtl (A, B, CI, S, CO) ;

input A, B, CI ;
output S, CO ;

assign {CO, S} = A + B + CI; //continuous assignmen

endmodule

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Behavioral Modeling

Algorithms…….

Abstract behavioral model written in an HDL provided both


precise specification and a framework for design exploration.

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Behavioral Style

• Out of the three coding styles, the behavioral style is the most
advanced and most flexible.

• It is also closest to programming languages because it uses sequential


statements like conditional statement (if), multiple choice (case) and
loops.

• The behavior style describes a circuit in terms of its behavior, i.e. the
action it's supposed to perform when active.
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• Theactions are specified in the initial and always behavioral blocks which
are composed of sequential or concurrent statements.

• Inorder to write a behavioral specification of a circuit it is often enough to


rewrite the natural language description into its Verilog equivalent,
following the syntax rules of this language.

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Style Example - Behavioral
module fa_bhv (A, B, CI, S, CO) ;

input A, B, CI ;
output S, CO ;

reg S, CO; // required to “hold” values between


events.

always@(A or B or CI) //;


begin
S = A ^ B ^ CI; // procedural assignment
CO = A & B | A & CI | B & CI; // procedural assignment
end
endmodule
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Reading Assignment

Digital Design by Morris Mano (Fifth Edition)

Section 3.11
Table 4.12
Section 4.12

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