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Homework 1

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0% found this document useful (0 votes)
23 views26 pages

Homework 1

Uploaded by

jrosen28
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 26

ENEE 411 Summer 2024 Date due: June 12, 2024

Homework 1

NOTE: The problems below MUST be solved by hand calculation.


1. A Si NMOS has a substrate doping of 𝑁 = 10 cm and a poly-silicon gate doping of
𝑁 , = 10 cm . The oxide capacitance for this NMOS is 𝐶 = 1.75 fF⁄𝜇m .
(a) Estimate the zero-bias threshold voltage 𝑉 for this NMOS.
(b) What is the threshold voltage if a source-body voltage of 𝑉 = 1 V is applied on the
NMOS?
(c) If sodium contamination introduced an impurity of 40 aC⁄𝜇m at the oxide-semiconductor
interface, what is the threshold voltage with this impurity?
(d) Estimate the ion implant dose required to change the threshold voltage in (b) to 1 V.

2. Using the process data for long-channel (1 𝜇m) length MOSFET, and the square-law
equations, determine the DC voltage, 𝑉 , in each of the following circuits. Verify the results
of your calculation using SPICE.

3. Below is the cascode mirror circuit and its corresponding SPICE simulation.

By hand calculation, verify the SPICE simulation results at 𝐼 = ±1 𝜇A.


4. Estimate the AC current, 𝑖 , that flows in the test voltage 𝑣 (1 mV at 1 MHz) in the circuits
shown below (and thus what is the small-signal resistance, 𝑣 ⁄𝑖 , seen by 𝑣 ?) Use the process
data for long-channel (1 𝜇m) length MOSFET. What would happen to the DC biasing of the
MOSFET if the capacitor was removed so that the test voltage was connected directly to the
drain? Hints: the AC current flowing through the resistor is 𝑣 ⁄𝑅 while the AC current flowing
in the MOSFET is either 𝑣 ⁄𝑟 (for saturation region operation, see Eq. [9.6] in Baker) or
𝑣 ⁄𝑅 ode operation (see Eq. [9.16] in Baker). The resistance seen by 𝑣 is
then the parallel combination of the resistors.

5. For the circuits shown below, estimate the delay between the input and the output. Use the 50
nm (short-channel CMOS) process. Verify the estimates with SPICE.
6. Estimate the voltage across each capacitor, in each circuit shown below, after the MOSFETs
have turned on (the initial voltages are shown in the figure). Verify your answers with
SPICE.

7. What is the voltage at point A in the circuits shown below? Verify your answers with SPICE.
Note that in all of these circuits the p-substrate (body of the NMOS) is grounded and the n-
well (body of the PMOS) is at 𝑉 .
VFB-Elatband
Voltage

↑F =
ferm : potential
10

a) VANO :
20 F + +
↓NA20F
VFB =

Oms-
FB + ↑ms
Ex In
(N)
flatband 2:fer ein
+

= 0
, 585V +0 . 287

OF =
S
=
0 872
((
.

One In c) 0 287 U Vap


= = .
=
charge term Cox units Weird

25
=
(2tom
1 6
-
10th
.
-. 10 1 7 8 85
.
.

.
.
2-0 .

1 75
.

f.
= 0 . 0788V
↑ 0 0788
- 0 57p
-VTHNo &f 0 872
= + -

ms -2
= + =

.
.

=
= 220mV
b) /Us IV Vin Vinn +2 (B ~
20
= -

=
F

u
=:107
7
Cox
2016 - 19 12
1 75
.
:
.
. 7 -
8 .
85%0 101
·

=
0 . 104

+= 220m + 0 : 104 F Vot -

= 296mV
CY QNa = 40 allum2 = 40 .

10/Nm
=
SVth = 1 ,
75-10-1
=
0 023/
.

Vth =
Vino + AVin =
310mV
doe needed

d) Vin 1V
=
Q
I
=

77
.
-
10 ions/cm2
0 704
1-0

-
I

A Vin = .
296, .

En
704.17S 10-
Qimplant 6
·

=
Vin
.
I

= 1 22
.
15/m2
Square law : I =
N Cox (Vas -

VT)
based on
N p
table
40NA/U
W
=
48
10 transconductance = IONA/V ,
I
=
II
UDD = 5V

0 8, =
0 9
assume Venn =
. p
.

Us USD
=
250mV

Vas Vin triode :


for
[(as-in) VDs - )
>
sat. Ups
-

Vx =
VD) 1 1
.
-

0 8
.
=
0 30 . = UnCox *
?

F =
:
12NAV2 10 .
(6 3) .

SYNA =
120NA/2 ((0 . 3) Vas -
54 NA 0
GOops"
=
=

-
360 Ups + 54 .

UX =
V
-

I Look
Sat + =
VDs O SV
not in
.

-
= 0 40 .
G
Dis UpCox = 40-100 A/vz VGs =

=
3 5-5
.

1S
-0 9
-

D = =
1 E
=
V+ = .

Ips/20 62
(ps/ (as(V) 1 5-0 9 = 0 6
for sat
.

=> , .
.

ID =
plx
N
.
(0 612
.
= 40 - 154 . 0 62 .
=
18 NA
000
2
18.100 N
= ID X Ilook 100,
,
=
= =

3 20 206U . in sat
Vas 18
-

51 =
.
Assume & 1NA

M2 & M4 Vas =
2 Ds
u
-
Vy22as-VT
Va
in saturation Vas
=VDS T

=
Use = 0 75.
+ 0 8
.
=

-INA
Es = 20NA/2 VG = 97V
Us & Va & . . Vas &
.

Ibias My
7
VD 0
=
.

when Uns4 & Us : Va24

Vas3 = Was4
assume INA
& drain Ms

Vas4 (A = 0 72V
.

=V =El a 1 72
↓ SY

Vas4 & -INA = 0 97V


.

Vaz
=

Va4
-

0 97V
=

e-ta
72 U
.

* 1 .
from
mos sheet
1 OSV
01 Vas =

x 0
.

=
.
;

To
·

I = (Vas-Vi)
IP =
IONAN"
-
2
.
(1 05 -0 8)
.
.

1 875 NA
honestlyCould a
I = .

dominated
=
53 33ML total
↓-
.

ro
=

0 01.
(1 875-10)
. by smaller resistance
- I Capacitor
99 81KR wout the coupling

Riotal ( 5)
=
Would
.

Voltage Vi appear
= AC
the mosfet drain
On
doesn'teffect
10 On A Proven to

it =
= as
it is quite large
=
.

the DC bids as
small
RCh is typically Very
however Can
unstable variations
these
mosfet Out of its desired
Pusha the
Operating region
Switch resistance =

-
~

a) t =
0 7 .
Rnd tot
(1625.10 ), (20-18#)
as b) 3 4% 03

an
+

t
=
0 7 ·
.

Cloud
.
.

Cox
Incox 5 4
, 83 10 "sees

[1
Ed = .

Ch S a
2n = Ed 0 7 2 3 4 18
=D b)
-

!C
- .
x = = .
.

no

Ed
= 9 66 . 0 "ses
,

3 3 4K
Rp = = .

1518 F
W
625 of =
625 18
Cox
·

20
-
=
62 5 af Wh
Cox 62 5 10 20 .

= =
. .

S.
.

6 68K
. .

a Rp 5-10-13
= =
=

= 2
25-10s
.

188 1
104+ 15 "]
-

= S

62 5 20 103 (1
.
.

Cox =
7 3 4 2 5 20
0
.
-

↑d
- -
-
-
. .
= . .

d) To = 0 35 Rp Cox (l) + 0 .
7(4 Rp) Cert
·

10.
d 07-10 = 1 . seas

25
.

125 10 42 + 0 1 7 4 3 4k
:
·
(E -
1 .
+

3 4k
-
.

0 35
.
.
= .

. .

10-"seas + 1 0115 - 10.1 sec


:
2 38
,

= .

-d = 1 249
.
·
10-10 seconds
A all my capacitor
were charging so slowly ? 2 ?
B)
c)
D

a)

as b) I nition p
=
lopf - 20 = 2 . 15

Cox EFI-Von Qinilpf =


(pf . /V = 1 .
18

↓ ↓ COUL
& G
T Tlopf final Copf = Opf + 0 .
00873 p (SV = 5 ,

Lo 1
b)
-

,
start high Cox by high -

4
Qini Ipf = Ipf
PV - + 0 .
00875pSU
= 4
.o ! (x = 11 7548-10
,
final, (pf ) pf +0200875pf)SV
=

S 0437-10-1 (
,
=

0 00875 pf
-
Su long Mos =
3
10pf +
.

Qini
.

(opf
-

=
30 04375pC 084-10-C
=

Quot, 10pf
.

,
-
= 3 .

&
final Ipf
=
Ipf SV
.
=
C 4 0437010
SOPE Qtot , 1pf
= ,
-
10p-SV 3 004-10
=

Quinal , Lopf = = 3V
Voltage 10pf--
.

over

0 957 pC
Quot , (pf = .

19 95 p C over 1pf = 04 -U
Quot Cop =
.

,
Lo
: 0 957/1 0 9SFU
-
=
V . . -
1pf
Vipf
:
19 95/10
.
=
1 995U
.
both 4 6 ?
A)
.
B)

Not sure why


PMOS wasn't working
.
a) VDD A =

a) b)
C) d) b) 0 =
A

C 0 =
A
Pas 4 2V
gate
d) A -E = .
Al
B)
C)
D)

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