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15 views3 pages

Abstracts 15

Uploaded by

mramyasri13
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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AN EFFICIENT FULL ADDER USING FINFET TECHNOLOGY

ABSTRACT

The project presents the design of an efficient full adder utilizing FinFET (Fin Field-Effect Transistor)
technology. We explore FinFET-based adder circuits, which offer enhanced performance characteristics,
including reduced leakage power, lower overall power consumption, and minimized propagation delay. The
proposed design is rigorously verified against CMOS technology using VLSI tools to ensure accurate
performance comparisons.Simulation results indicate significant improvements in efficiency and performance
metrics when utilizing FinFET technology compared to traditional CMOS designs. This work underscores the
potential of FinFET-based circuits in advancing digital logic applications and addressing the challenges posed
by increasingly stringent power and performance requirements in modern electronic systems.

UNDER THE GUIDANCE OF TEAM MEMBERS

Mrs.B.SRI LATHA G.SAI 225671568L 2256715


Assistant Professor (C) M.RAMYA SRI 21567T1546 21567T15
Department of ECE MD.ABDUL RASHEED 21567T1543 21567T15
KUCET B.DEEPIKA 21567T1512
D.MOUNIKA 195671561L
21567T
1956715
DESIGN OF ELECTRONIC VOTING MACHINE USING XILINX TOOLS

ABSTRACT

Electronic Voting machine is a simple electronic device used to record votes automatically without the
need of manual operation of ballot papers. In all earlier elections, voters casted their votes to their favourite
candidates by putting the stamp against his/her name. This is a long-time consuming process and is prone to
errors and can at times be an unfair process. To overcome all these difficulties and make the electoral process
a fair one, implementation of electronic voting machine in digital domain is presented in this project. It is
difficult to tamper votes in digital domain and provides a secure and safe method for conducting elections. We
all know that it is very difficult to manipulate signals, so we have designed electronic voting machine in
Verilog using XILINX tools. Further, this implementation also contains password which itself is digital in
nature and is very difficult to be hacked. Polling by Electronic Voting Machine (EVM) is easy, safe and secure
methodology that takes minimum of our time. In order to perform this mechanism, there were several phases
in the design process such as designing a flow chart, algorithm and simultaneously the code is developed to
implement & stimulate the logic. The proposed method consists of 3 stages, in the first stage we decide the
total number of voters and the total number of contestants taking part in the election process. we have assigned
Voting enable which is active high input signal for the voter in order to cast his vote by using voter switch
input signal for making this election process more secure and safe. In stage two, voting process begins when
the voter casts his vote to a particular party or contestants the polled vote is registered in the individual
contestant registry. In stage three after completion of voting process the votes are validated by comparing the
votes polled to the contestants in their registries after which the election process ends by declaring the winner.
The above proposed method can be for real time applications ranging from university level elections to
Assembly and Lok Sabha elections, as it has the advantage that it can be reprogrammed over and over for
various tasks according to their requirement which helps in reducing the expenditure.

UNDER THE GUIDANCE OF TEAM MEMBERS

G.SAI 225671568L 22567156


Mrs. B.SRI LATHA
M.RAMYA SRI 21567T1546 21567T1546
Assistant Professor (C)
Department of ECE MD.ABDUL RASHEED 21567T1543 21567T1543
KUCET B.DEEPIKA 21567T1512
D.MOUNIKA 195671561L
21567T15
195671561
DESIGN OF VENDING MACHINE USING VERILOG HDL

ABSTRACT

The project focuses on the design and implementation of a vending machine capable of dispensing four
distinct products at varying prices, along with the functionality to return change for higher denomination coins.
The design employs a Finite State Machine (FSM) model to systematically define the machine's states, inputs,
outputs, and the transitions between these states. The FSM is implemented using Verilog, where we specify
the various states corresponding to coin acceptance, product dispensing, and change return logic. A
comprehensive test bench is developed to simulate multiple scenarios, including different coin denominations
and product selections, to validate the operational correctness of the vending machine. The testing phase
successfully confirms that the machine operates as intended under various conditions.

UNDER THE GUIDANCE OF TEAM MEMBERS

Mrs. B.SRI LATHA G.SAI 225671568L


225671568L
Assistant Professor (C) M.RAMYA SRI 21567T1546
21567T1546
Department of ECE MD.ABDUL RASHEED 21567T1543
21567T1543
KUCET B.DEEPIKA 21567T1512
D.MOUNIKA 195671561L
21567T1512
195671561L

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