Swami Keshvanand Institute of Technology, Management &

Gramothan, Jaipur
Department of Electrical Engineering
विद् युत अविय ांविकी विि ग

Assignment-I
Session: 2024-25 (Odd Semester)
Subject: Analog Electronics (3EE4-06)
Max Marks- 40
(Set-I)
Q.
Question BL CO MM
No.

Determine the output voltage Vo for the below network.

1 4 1 10

Draw the input and output voltages and voltage across diode
2 waveforms with a suitable circuit diagram of a single-phase full- 3 1 10
wave diode bridge rectifier. And also Explain its working.
Draw the load line and locate the DC operating point for the
below network. Assume β=50 and VBE neglected.

3 4 2 10

Derive the expression for stability factor S and show the relation
4 3 2 10
between stability and stability factor.

References
• R. L. Boylestad, Louis Nashelsky, Electronic devices & circuits theory, Pearson Education
• Salivahnan, Electronics Devices and Circuits, ed. 3, TMH.
• Millman, Electronics Devices and Circuits, ed. 3, TMH
• David Bell, Electronic Devices & Circuits, Oxford Publications
• B. G. Streetman, Solid State Electronic Devices, Prentice Hall of India, New Delhi
• NPTEL course on Analog Electronics.

Faculty Name Mr. Jitendra Singh

 Swami Keshvanand Institute of Technology, Management &
Gramothan, Jaipur
Department of Electrical Engineering
विद् युत अविय ांविकी विि ग

Assignment-I
Session: 2024-25 (Odd Semester)
Subject: Analog Electronics (3EE4-06)
Max Marks- 40
(Set-II)
Q.
Question BL CO MM
No.
Determine output voltage Vo for the circuit and given input as
shown in below figure.

1 4 1 10

draw the I-V characteristics of PN junction diode and Label the

2 various voltages, currents, and operating modes. And also explain 3 1 10
its internal structure and working.
For the given voltage divider bias network (β=90). Determine the
i. re ii. Zi iii. Zo (if ro =∞ Ω) iv. Av (if ro =∞ Ω)
v. Av (if ro = 50 Ω)

3 4 2 10

Draw the re model for fixed bias transistor circuit and show the
4 4 2 10
input and output parameters.

References
• R. L. Boylestad, Louis Nashelsky, Electronic devices & circuits theory, Pearson Education
• Salivahnan, Electronics Devices and Circuits, ed. 3, TMH.
• Millman, Electronics Devices and Circuits, ed. 3, TMH
• David Bell, Electronic Devices & Circuits, Oxford Publications
• B. G. Streetman, Solid State Electronic Devices, Prentice Hall of India, New Delhi
• NPTEL course on Analog Electronics.

Faculty Name Mr. Jitendra Singh

 Swami Keshvanand Institute of Technology, Management &
Gramothan, Jaipur
Department of Electrical Engineering
विद् युत अविय ांविकी विि ग

Assignment-I
Session: 2024-25 (Odd Semester)
Subject: Analog Electronics (3EE4-06)
Max Marks- 40
(Set-III)
Q.
Question BL CO MM
No.
Determine the output waveforms for the below network.

1 4 1 10

Draw waveforms for source voltage, load voltage, voltage across the
diode for a single-phase half-wave diode circuit feeds power to the R
2 load. Derive an expression for average, RMS load voltages and
3 1 10
efficiency.
Find emitter current for the transistor with self bias circuit having
β=100, Vcc=20V, R1 = 12 kΩ, R2 = 8 kΩ , Rc= 2 kΩ, and R E =1
kΩ.

3 4 2 10

Find the DC operating point and stability factor for the Base bias
4 with collector & emitter feedback and voltage divider biasing 3 2 10
networks.

References
• R. L. Boylestad, Louis Nashelsky, Electronic devices & circuits theory, Pearson Education
• Salivahnan, Electronics Devices and Circuits, ed. 3, TMH.
• Millman, Electronics Devices and Circuits, ed. 3, TMH
• David Bell, Electronic Devices & Circuits, Oxford Publications
• B. G. Streetman, Solid State Electronic Devices, Prentice Hall of India, New Delhi
• NPTEL course on Analog Electronics.

Faculty Name Mr. Jitendra Singh

 Swami Keshvanand Institute of Technology, Management &
Gramothan, Jaipur
Department of Electrical Engineering
विद् युत अविय ांविकी विि ग

Assignment-I
Session: 2024-25 (Odd Semester)
Subject: Analog Electronics (3EE4-06)
Max Marks- 40
(Set-IV)
Q.
Question BL CO MM
No.

Draw the output waveforms for the given network and input
waveform.

1 4 1 10

Draw waveforms for source voltage, load voltage, voltage across the
diode for a single-phase full-wave diode circuit feeds power to the R
2 3 1 10
load.. Derive an expression for average, RMS load voltages and
efficiency.

Determine the bias resister RB for fixed and collector to base bias
3 and also compare the stability factors for both of them. Given, 4 2 10
Vcc=12 V, Rc=330 ohm, IB = 0.3mA, β=100, and VCEQ = 6V.

Draw the input and output characteristics of the common emitter

4 3 2 10
configuration of BJT and describe its working with a suitable diagram.

References
• R. L. Boylestad, Louis Nashelsky, Electronic devices & circuits theory, Pearson Education
• Salivahnan, Electronics Devices and Circuits, ed. 3, TMH.
• Millman, Electronics Devices and Circuits, ed. 3, TMH
• David Bell, Electronic Devices & Circuits, Oxford Publications
• B. G. Streetman, Solid State Electronic Devices, Prentice Hall of India, New Delhi
• NPTEL course on Analog Electronics.

Faculty Name Mr. Jitendra Singh

 Swami Keshvanand Institute of Technology, Management &
Gramothan, Jaipur
Department of Electrical Engineering
विद् युत अविय ांविकी विि ग

Assignment-I
Session: 2024-25 (Odd Semester)
Subject: Analog Electronics (3EE4-06)
Max Marks- 40
(Set-V)
Q.
Question BL CO MM
No.
A germanium pn junction diode has a reverse saturation current
(Io) of 4 µA at 25oC. if a sine wave having a peak amplitude of
1 4 1 10
0.15 V is applied across the junction. What is the ratio of forward
to reverse peak currents?
Draw and explain the series positive clipping circuit with its
2 3 1 10
output waveforms.
Find emitter current for the transistor with self bias circuit having
β=100, Vcc=20V, R1 = 12 kΩ, R2 = 8 kΩ , Rc= 2 kΩ, and R E =1
kΩ.

3 4 2 10

4 Draw the re model for the CE configuration of the NPN transistor. 4 2 10

References
• R. L. Boylestad, Louis Nashelsky, Electronic devices & circuits theory, Pearson Education
• Salivahnan, Electronics Devices and Circuits, ed. 3, TMH.
• Millman, Electronics Devices and Circuits, ed. 3, TMH
• David Bell, Electronic Devices & Circuits, Oxford Publications
• B. G. Streetman, Solid State Electronic Devices, Prentice Hall of India, New Delhi
• NPTEL course on Analog Electronics.

Faculty Name Mr. Jitendra Singh

 Swami Keshvanand Institute of Technology, Management &
Gramothan, Jaipur
Department of Electrical Engineering
विद् युत अविय ांविकी विि ग

Assignment-I
Session: 2024-25 (Odd Semester)
Subject: Analog Electronics (3EE4-06)
Max Marks- 40
(Set-VI)
Q.
Question BL CO MM
No.
Draw the output waveforms for the given network and input waveform.

1 4 1 10

2 Draw and explain the shunt negative clipping circuit with its 3 1 10
output waveforms.
Determine the DC operating point (Ic and VCE) for a silicon PNP
transistor with β=50. The circuit components in self biasing are
Vcc = -20 V, Rc = 2 kΩ, RE = 0.1 kΩ, R1 = 100 kΩ, R2 = 5 kΩ.
Also find the Stability factor S.

3 4 2 10

Sketch the Circuit Diagram and Plot the Input & Output
Characteristics of npn BJT amplifier in CB Configuration. Also
4 3 2 10
compare the BJT configurations i.e. CB, CE & CC in tabular
form.
(Set-VII)
References
• R. L. Boylestad, Louis Nashelsky, Electronic devices & circuits theory, Pearson Education
• Salivahnan, Electronics Devices and Circuits, ed. 3, TMH.
• Millman, Electronics Devices and Circuits, ed. 3, TMH
• David Bell, Electronic Devices & Circuits, Oxford Publications
• B. G. Streetman, Solid State Electronic Devices, Prentice Hall of India, New Delhi
• NPTEL course on Analog Electronics.

Faculty Name Mr. Jitendra Singh

 Swami Keshvanand Institute of Technology, Management &
Gramothan, Jaipur
Department of Electrical Engineering
विद् युत अविय ांविकी विि ग

Assignment-I
Session: 2024-25 (Odd Semester)
Subject: Analog Electronics (3EE4-06)
Max Marks- 40
Q.
Question BL CO MM
No.

Determine output voltage Vo for the circuit and given input as

shown in below figure.

1 4 1 10

Draw waveforms for source voltage, load voltage, voltage across the
2 diode for a single-phase half-wave diode circuit feeds power to the R 3 1 10
load.. Derive an expression for average and RMS load voltages.

Find the DC operating point and stability factor with the

3 3 2 10
explanation of Base bias and base-to-collector biasing.
Draw the re model for base bias with collector feedback transistor
4 4 2 10
circuit and show the input and output parameters.

References
• R. L. Boylestad, Louis Nashelsky, Electronic devices & circuits theory, Pearson Education
• Salivahnan, Electronics Devices and Circuits, ed. 3, TMH.
• Millman, Electronics Devices and Circuits, ed. 3, TMH
• David Bell, Electronic Devices & Circuits, Oxford Publications
• B. G. Streetman, Solid State Electronic Devices, Prentice Hall of India, New Delhi
• NPTEL course on Analog Electronics.

Faculty Name Mr. Jitendra Singh

 Swami Keshvanand Institute of Technology, Management &
Gramothan, Jaipur
Department of Electrical Engineering
विद् युत अविय ांविकी विि ग

Assignment-I
Session: 2024-25 (Odd Semester)
Subject: Analog Electronics (3EE4-06)
Max Marks- 40
(Set-VIII)

Q.
Question BL CO MM
No.

Determine output voltage Vo for the circuit and given input as

shown in below figure.

1 4 1 10

Draw and explain the biased shunt negative clipping circuit with
2 3 1 10
its output waveforms.
Determine the bias resister RB for fixed and collector to base bias.
3 and also compare the stability factors for both of them. Given, 4 2 10
Vcc= 12 V, Rc = 330 Ω, IB = 0.3mA, β=100, and VCEQ = 6V.

4 Draw the re model for the CE configuration of the PNP transistor. 3 2 10

References
• R. L. Boylestad, Louis Nashelsky, Electronic devices & circuits theory, Pearson Education
• Salivahnan, Electronics Devices and Circuits, ed. 3, TMH.
• Millman, Electronics Devices and Circuits, ed. 3, TMH
• David Bell, Electronic Devices & Circuits, Oxford Publications
• B. G. Streetman, Solid State Electronic Devices, Prentice Hall of India, New Delhi
• NPTEL course on Analog Electronics.

Faculty Name Mr. Jitendra Singh

 Swami Keshvanand Institute of Technology, Management &
Gramothan, Jaipur
Department of Electrical Engineering
विद् युत अविय ांविकी विि ग

Assignment-I
Session: 2024-25 (Odd Semester)
Subject: Analog Electronics (3EE4-06)
Max Marks- 40
(Set-IX)

Q.
Question BL CO MM
No.

Draw waveforms for source voltage, load voltage, and voltage across
the diode for a single-phase full-wave diode circuit feeds power to the R
1 load.. Derive an expression for average, RMS load voltages and
3 1 10
efficiency.

Draw and explain the negative clamping circuit with its output
2 3 1 10
waveforms.

Draw the load line and locate the DC operating point for the
below network. Assume β=50 and VBE neglected.

3 4 2 10

Sketch the Circuit Diagram and Plot the Input & Output
4 Characteristics of npn BJT amplifier in CE Configuration. Also 3 2 10
compare the BJT configurations i.e. CB, CE & CC in tabular form

References
• R. L. Boylestad, Louis Nashelsky, Electronic devices & circuits theory, Pearson Education
• Salivahnan, Electronics Devices and Circuits, ed. 3, TMH.
• Millman, Electronics Devices and Circuits, ed. 3, TMH
• David Bell, Electronic Devices & Circuits, Oxford Publications
• B. G. Streetman, Solid State Electronic Devices, Prentice Hall of India, New Delhi
• NPTEL course on Analog Electronics.

Faculty Name Mr. Jitendra Singh