Engineering Encyclopedia

Saudi Aramco DeskTop Standards

PROGRAMMING A
PROGRAMMABLE LOGIC CONTROLLER

Note: The source of the technical material in this volume is the Professional
Engineering Development Program (PEDP) of Engineering Services.
Warning: The material contained in this document was developed for Saudi
Aramco and is intended for the exclusive use of Saudi Aramco’s employees.
Any material contained in this document which is not already in the public
domain may not be copied, reproduced, sold, given, or disclosed to third
parties, or otherwise used in whole, or in part, without the written permission
of the Vice President, Engineering Services, Saudi Aramco.

Chapter : Process Instrumentation For additional information on this subject, contact

File Reference: PCI-113.06 PEDD Coordinator on 874-6556
Engineering Encyclopedia Introduction to Programmable Logic Controllers
Programming a
Programmable Logic Controller

Section Page

PHYSICAL AND SOFTWARE REQUIREMENTS FOR A PLC TERMINAL ................... 5

Hardware .................................................................................................................. 5
Personal Computer.............................................................................................. 6
PLC Programming Software ..................................................................................... 7
Communication Interface Module ............................................................................. 9
GENERATING BINARY LOGIC DIAGRAMS ............................................................... 10
Binary Concepts...................................................................................................... 10
Positive Logic .................................................................................................... 11
Negative Logic................................................................................................... 11
Logic Functions....................................................................................................... 12
AND Function .................................................................................................... 12
OR Function ...................................................................................................... 14
NOT Function .................................................................................................... 15
Electrical Circuit - Logic Diagram Relationship .................................................. 17
Other Functions ...................................................................................................... 18
NAND Function.................................................................................................. 18
NOR Function.................................................................................................... 19
Exclusive OR Function ...................................................................................... 20
Boolean Algebra And Logic..................................................................................... 21
Boolean AND Function ...................................................................................... 21
Boolean OR Function ........................................................................................ 22
Boolean NOT Function ...................................................................................... 22
Logic Legend .......................................................................................................... 22
Saudi Aramco Logic Diagrams .......................................................................... 24
Sources for Generating Binary Logic Diagrams ...................................................... 24
System Description of Operation ....................................................................... 24
P&ID .................................................................................................................. 24
System Drawings............................................................................................... 25
Boolean Equations ............................................................................................ 25
Electrical Ladder Diagrams................................................................................ 27
GENERATING RELAY LADDER LOGIC (RLL) DIAGRAMS ....................................... 29
Ladder Logic Diagrams........................................................................................... 29
Power Rails............................................................................................................. 31
Contact Symbology................................................................................................. 32
PLC Ladder Diagrams ............................................................................................ 34
Input Instructions ............................................................................................... 35
Output Instructions ............................................................................................ 35
Summary ................................................................................................................ 35
GENERATING A PLC LADDER PROGRAM ............................................................... 36
PLC Circuits And Logic Contact Symbology ........................................................... 36

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PLC-5 Addressing................................................................................................... 39
Logical Addressing ............................................................................................ 39
I/O Addressing................................................................................................... 40
Relay Type Instructions .......................................................................................... 40
Examine If Closed Instruction (XIC)................................................................... 42
Examine If Open Instruction (XIO)..................................................................... 43
Output Energize Instruction (OTE) .................................................................... 43
Output Latch Instruction (OTL) .......................................................................... 44
Output Unlatch Instruction (OTU) ...................................................................... 44
PLC-5 Timer Instructions ........................................................................................ 44
Timer On-delay (TON)....................................................................................... 45
Timer Off-delay (TOF) ....................................................................................... 46
Timer Addressing .............................................................................................. 46
Retentive Timer On-delay (RTO)....................................................................... 47
Counter Instructions................................................................................................ 48
PLC-5 Counter Instructions ............................................................................... 48
Counter Addressing........................................................................................... 50
ENTERING AND TESTING A PLC LADDER LOGIC PROGRAM ............................... 51
Topdoc PLC-5 Programming Software ................................................................... 51
Entering a PLC-5 Program...................................................................................... 52
Testing The Entered Program................................................................................. 53
Program Emulation ................................................................................................. 53
GENERATING PROGRAM DOCUMENTATION.......................................................... 54
Ladder Report ......................................................................................................... 54
Annotated PLC Ladder Printout......................................................................... 55
Element Descriptors .......................................................................................... 56
Rung Comments................................................................................................ 58
Database Report..................................................................................................... 59
Address Report ....................................................................................................... 61
Narrative Describing Operational Sequence ........................................................... 63
Narrative For Simulation Program ..................................................................... 65
WORK AID 1: RESOURCES USED FOR GENERATING BINARY LOGIC
DIAGRAMS .................................................................................................................. 66
WORK AID 2: RESOURCES USED FOR GENERATING RELAY LADDER
DIAGRAMS .................................................................................................................. 67
WORK AID 3: RESOURCES USED TO GENERATE PLC LADDER
PROGRAMS ................................................................................................................ 68
WORK AID 4: RESOURCES USED FOR ENTERING AND TESTING A PLC
LADDER LOGIC PROGRAM ....................................................................................... 69
Work Aid 4A: Procedural Steps To Enter And Test The Program .......................... 69
Work Aid 4B: Addendum - Topdoc Program Development and
Documentation........................................................................................................ 70

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Work Aid 4C: Handout - PLC-5 Programming Software: Instruction Set

Reference ............................................................................................................... 70
WORK AID 5: PROCEDURES FOR GENERATING PROGRAM
DOCUMENTATION...................................................................................................... 71
GLOSSARY ................................................................................................................. 72
ADDENDUM: TOPDOC PROGRAM DEVELOPMENT AND
DOCUMENTATION...................................................................................................... 76

LIST OF FIGURES

Figure 1. Programming Terminal.................................................................................... 5

Figure 2. Pushbutton ................................................................................................... 10
Figure 3. Positive Logic ............................................................................................... 11
Figure 4. Series Circuit................................................................................................ 12
Figure 5. AND Symbol................................................................................................. 13
Figure 6. Truth Table For 2-input AND Gate ............................................................... 14
Figure 7. Parallel Circuit .............................................................................................. 14
Figure 8. OR Symbol................................................................................................... 14
Figure 9. Truth Table for 2-input OR Gate.................................................................... 15
Figure 10. Inverting Circuit .......................................................................................... 15
Figure 11. NOT Symbol............................................................................................... 16
Figure 12. Truth Table for NOT Gate .......................................................................... 16
Figure 13. Electrical Interlock Circuit ........................................................................... 17
Figure 14. Logic Diagram For Interlock Circuit ............................................................ 18
Figure 15. NAND Function .......................................................................................... 18
Figure 16. Truth Table For 2-input NAND Function..................................................... 19
Figure 17. NOR Function ............................................................................................ 19
Figure 18. Truth Table For 2-input NOR Function ....................................................... 19
Figure 19. Exclusive OR Function ............................................................................... 20
Figure 20. Truth Table For 2-input Exclusive OR Function ......................................... 20
Figure 21. Logic Legend.............................................................................................. 23
Figure 22. Derived Logic Diagram............................................................................... 26

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Figure 23. Interlock for a Pump Circuit ........................................................................ 27

Figure 24. Ladder Logic Diagram ................................................................................ 29
Figure 25. Electrical Symbols Legend ......................................................................... 30
Figure 26. Electro-mechanical Relay Schematic ......................................................... 32
Figure 27. Basic Relay Instructions ............................................................................. 33
Figure 28. PLC Rung................................................................................................... 34
Figure 29. PLC Ladder Diagram ................................................................................. 38
Figure 30. PLC Instruction........................................................................................... 41
Figure 31. Basic Relay Instructions ............................................................................. 41
Figure 32. Examine ON Instruction ............................................................................. 42
Figure 33. Examine OFF Instruction............................................................................ 43
Figure 34. Output Latch/Unlatch Instruction ................................................................ 44
Figure 35. TON Instruction Set.................................................................................... 45
Figure 36. Off-delay Timer .......................................................................................... 46
Figure 37. Retentive Timer On-delay .......................................................................... 47
Figure 38. UP-Counter Instruction............................................................................... 49
Figure 39. Counter Program........................................................................................ 50
Figure 40. Ladder Program Report ............................................................................. 54
Figure 41. Rung Comment .......................................................................................... 55
Figure 42. Annotated PLC Rung ................................................................................. 55
Figure 43. Entry Window ............................................................................................. 56
Figure 44. Entry Window ............................................................................................. 57
Figure 45. PLC Rung With Element Descriptors And A Rung Comment..................... 58
Figure 46. Database Report ........................................................................................ 60
Figure 47. Address Report .......................................................................................... 62
Figure 48. Sample Narrative for Four (4) Rungs in the Simulation Program ............... 64
Figure 49. Logic Legend.............................................................................................. 66
Figure 50. Electrical Symbols Legend ......................................................................... 67

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PHYSICAL AND SOFTWARE REQUIREMENTS FOR A PLC TERMINAL

The programming terminal is used to enter, edit, document, and

monitor the PLC control program stored in the Programmable
Logic Controller.

Hardware

Figure 1 illustrates the programming terminal required for the

Allen-Bradley PLC-5 processor. It consists of the following
items:

• Personal Computer

• Programming Software

• Communication Interface Module and Communication

Cable

Personal Computer with

Programming Software
Communication
Cable
Programmable
Logic Controller

CPU
Communication
Interface Module

Figure 1. Programming Terminal

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Personal
Computer
The personal computer (PC) is the physical device containing
the operating environment that allows the operation of the
programming software. The personal computer also provides
the physical housing for the communication interface module
and ports for connecting the PC to a printer. The printer is used
for printing the PLC program documentation.

The specifications for the programming terminal define the

requirements for the personal computer. The specifications for
the personal computer include:

• Processor type

• Hard drive size

• Floppy disk capability

• RAM capacity

• Monitor requirements

• Operating system type and version

• Number of expansion slots

• Keyboard requirements

The processor used determines the speed of the program

execution. The minimum requirements for operating PLC
programming software is a 486-DX2 CPU operating at 66 MHz
or greater.

The hard drive contains a non-volatile memory and is used to

store the PLC operating system, the PLC programming
software, and PLC control programs. Space must be sufficient
to store application programs as well as the PLC programming
software program. Sizes for the hard drive range from 240 MB
(megabytes) to over 3800 MB (3.8 GB).

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Floppy disks are removable disks used to store information and

for loading new programs onto the hard drive or to the PLC
directly. Backup copies of the control program are stored on
floppy disks. Using a floppy disk to store copies of the program
provides a measure of safety in the event of hard drive failures.
Floppy disks are available in 3.5- or 5.25-inch formats. The
current popular floppy disk of choice is the 3.5-inch format with
a density (storage capacity) of 1.44 MB.

The RAM memory of the personal computer stores the DOS or

Windows operating program and/or the dynamic PLC operating
program. PLC software programs require a basic RAM memory
of 640 kB (kilobytes) and 2 to 64 MB (megabytes) of extended
memory.

Expansion slots are required for mounting additional modules,

such as the communication interface module.

PLC Programming Software

PLC programming software is required to program and

document PLC control programs. The programming software is
loaded into the personal computer. When the software is
operating, it converts the personal computer into a programming
terminal for entering, editing, documenting, and monitoring PLC
control programs.

The PLC programming software is a PLC development

program, operating within the DOS environment. The
programming software allows the programmer to create, edit,
and document PLC ladder logic programs on any IBM
compatible computer. The programming software allows the
programmer to create, edit, and document the PLC program in
either of the following programming modes:

• Offline

• Online

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Offline programming means the PLC programming is

accomplished within the personal computer only and includes:

• Creating and documenting new programs.

• Modifying and documenting existing programs.

• Using existing programs, or portions of existing programs,

to create a new program.

• Storing programs within the personal computer hard drive

or on floppy disks.

• Transferring programs from the personal computer to the

PLC and from the PLC to the personal computer.

• Printing reports.

• Offline program emulation allows the personal computer to

scan and solve logic in a similar manner as the PLC prior
to loading the PLC.

Online programming means that the personal computer is

communicating with the PLC, and PLC programming is
accomplished directly within the PLC. Online features include:

• Creating and documenting new programs within the PLC.

• Modifying programs within the PLC.

• Transferring programs between the personal computer and

the PLC.

• Monitoring the operation of the PLC while the PLC is

controlling the process.

• Monitoring the status of devices connected to the PLC.

• Testing devices wired to the PLC. Testing of devices

wired to the PLC is accomplished with an online function
called I/O forcing.

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Programs that are created or changed within the PLC when in

the online mode, are not saved within the personal computer.
Therefore, it is necessary to transfer the program from the PLC
to the personal computer so that a copy of the program is
preserved in the event that the PLC should fail.

There are several vendors that produce PLC programming

software for the Allen-Bradley PLC-5. Each vendor’s product
contains both online and offline programming. For this course,
Topdoc programming software manufactured by Tele-Denken
Resources is used because of its online and offline capabilities,
and its similarity to both D-Base and Lotus 1-2-3. The
programming software defines the minimum amount of memory
required for the computer hard drive and RAM memory. The
computer requirements for the Topdoc TD5 programming
software is 10 MB of hard drive space and 2 MB of extended
memory, and DOS Version 5.0 or higher.

Communication Interface Module

The communication interface module is required for transferring

information between the personal computer, and the PLC. The
communication module is used to translate the data from the
internal bus structure of the PC into the Data Highway Plus
protocol of the PLC.

The Allen-Bradley 1784-KT Communications Interface Module

is inserted in an expansion slot in the personal computer. The
Communication Interface Module performs data transmission,
management, and local network diagnostics. The physical
connection between the PC and the PLC is made with a
communication cable that connects the communication module
of the PC to the PLC.

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GENERATING BINARY LOGIC DIAGRAMS

A binary logic diagram is an engineering document that uses

interconnected logic symbols such as the AND, OR, and NOT
gates to graphically describe system operation. The binary
concepts and logic functions described in this section are
fundamental in developing binary logic diagrams.

Binary Concepts

The binary concept refers to the existence of only two states for
devices, ON or OFF, OPEN or CLOSED. For example, the
pushbutton, PB1, shown in Figure 2 has only 2 states; OPEN or
CLOSED.

PB1

Figure 2. Pushbutton

PB1 is shown in the open state in Figure 2. When the

pushbutton is pressed the state changes from open to closed.
Assuming no malfunctions, there is no middle state. When
released the state changes from closed to open.

The binary number system uses only two digits, 1 and 0, to

represent values. Utilizing the digits 1 and 0 from the binary
number system, the binary 1 (logic 1) is used to represent the
presence of a signal such as when PB1 is pressed and the
switch contacts close. Binary 0 (logic 0) is used to represent
the absence of a signal, the state when PB1 is released or not
pressed and the contact is open.

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Positive Logic
In digital systems, the two states, 1 and 0, are represented by
distinct voltage levels. Within the PLC, a logic 1 is represented
by a high voltage of +5 Vdc and a logic 0 with a voltage of
0 Vdc. The use of +5 Vdc for a logic 1 and 0 Vdc for a logic 0 is
defined as positive logic. Figure 3 lists the logic states for
various digital devices used in industrial plants.

Device Logic 1 (+5V) Logic 0 (0V)

Valve Open Closed

Motor Running Stopped

Pilot Light On Off

Limit Switch Closed Open

Figure 3. Positive Logic

Negative Logic
The logic state 1 may also be defined as 0 Vdc and logic 0 as
+5 Vdc. This is referred to as negative logic. Both positive and
negative logic are equally valid. Under some conditions
negative logic may be more appropriate for a particular design.

Saudi Aramco uses positive logic. Negative logic was used in

some discrete solid state logic systems. Both positive logic and
negative logic developed because early designs used both PNP
and NPN transistors.

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Logic Functions
The binary concept illustrates the two-state relationship
between digital devices and the binary numbers 1 and 0. Digital
devices refer to devices that have only two positions. The
extension of the binary concept is to obtain the True or False
condition (or state) from the combination of two or more binary
variables. The Programmable Logic Controller uses the binary
concept when executing its control program.

Operations performed by the PLC are based upon three

fundamental logic functions:

• AND
• OR
• NOT
The logic operations combine binary variables to form
statements. Each of the functions, AND, OR, NOT, has a rule
that will determine the True or False state of the statement
output and a unique symbol to represent the operation. The
result of a function is defined as the output Y, and the variables
of the statement are defined as the inputs A, B, C, . . . . . n.
Both the inputs and the outputs are two-state binary variables.

AND Function
Figure 4 shows a series electrical circuit containing a voltage
source, two switches, and a pilot light. For the series circuit
shown, the pilot light will be ON only when both switches SW-A
and SW-B are closed.

+ SW-A SW-B

v Voltage
Source PL1 Pilot Light
_

Figure 4. Series Circuit

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The electrical circuit shown in Figure 4 is represented

graphically with the logic AND symbol shown in Figure 5.

A
AND Y
B

Figure 5. AND Symbol

The AND symbol shown in Figure 5 is commonly called an AND

function or AND gate. The AND gate shown in Figure 5 has
only two inputs and one output. The number of inputs to an
AND gate is unlimited while there is only one output.

The inputs to the AND gate, A and B, shown in Figure 5, are the
switches SW-A and SW-B, and the output result is Y, PL-1
shown in Figure 4. For the AND function, the output Y is True
only if inputs A and B are True. Assigning 1 and 0 logic states
to the True and False statements respectively, the relationship
between the output Y and the input variables is stated as:

Y is True only if A and B are True.

The truth table for the AND function shown in Figure 6 is a

tabulation of the output logic state for all the possible logic
combinations of the input variables. For the number of
n
variables, n, there will be 2 logic combinations listed in the truth
table. The AND gate shown in Figure 4 and Figure 5 has only
two inputs so there will be 22 or four combinations listed in the
truth table. For an AND gate with three inputs there would be 23
or eight logic combinations listed in the truth table. The
conclusion or output for each combination is also listed in the
truth table. In some cases, intermediate steps are indicated for
more complex circuits.

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A B Y
0 0 0
1 0 0
0 1 0
1 1 1

Figure 6. Truth Table For 2-input AND Gate

Note that there is only one condition where the output of the
AND gate is True; when both inputs A and B are True.

OR Function
Figure 7 represents an electrical circuit containing a voltage
source, two switches connected in parallel, and a pilot light. For
the parallel switch combination shown, the pilot light will be on
when switch SW-A or SW-B or both are closed.

+ SW-A

v Voltage
Source Pilot Light PL1
_ SW-B

Figure 7. Parallel Circuit

The parallel circuit shown in Figure 7 is represented graphically

with the logic OR symbol shown in Figure 8.

A
OR Y
B

Figure 8. OR Symbol

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Using A and B to represent the switches SW-A and SW-B and Y

as PL1, the output Y is True if inputs A or B or both A and B are
True. Assigning 1 and 0 logic levels to the True and False
statements respectively, the relationship between the output Y
and the input variables is stated as:

Y is True if A or B are True.

Figure 9 shows the truth table for the 2-input OR function, also
called an OR gate. Note that the output, Y, is True if A or B or
both A and B are True.

A B Y
0 0 0
1 0 1
0 1 1
1 1 1
Figure 9. Truth Table for 2-input OR Gate

NOT Function
The NOT function is an inverting function, often called the
compliment. The electrical circuit shown in Figure 10 is used to
illustrate the inverting or NOT function. Relay CR1 and its
normally closed contact CR1-1 are used to invert the action of
SW-A. When SW-A is open, relay CR1 is not energized. The
normally closed contact CR1-1 remains closed and pilot light
PL3 is on. When SW-A is closed, relay CR1 is energized and
the relay contact CR1-1 is now open. The pilot light PL3 is now
off.
+ -

SW-A
CR1

CR1-1

PL3

Pilot Light
Figure 10. Inverting Circuit

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The logic symbol for the NOT function is shown in Figure 11.
The NOT function is also called a NOT gate. The output of the
NOT function is True if the input is False and the output is False
if the input is True. The NOT gate, unlike the AND and the OR
gates, has only one input and is often used with the AND gate
and the OR gate. In Figure 10 A represents SW-A. When SW-
A is open, logic input A is False. When input A is False, output
Y is True. Conversely, when input A is True, output Y is False.

A Y
AND or NOT

Figure 11. NOT Symbol

The truth table for the NOT gate is shown in Figure 12.

A Y
0 1
1 0

Figure 12. Truth Table for NOT Gate

The truth table shows that if A = 1, then Y = 0 and if A = 0, then

Y = 1. In Figure 10 the normally closed contact of a relay is
used to demonstrate the meaning of the NOT function. The
relationship between input A and output Y is: Y is True if input A
is False and Y is False if input A is True. In Boolean notation,
this relationship can be shown as Y = A where the bar over A
signifies that A is False or NOT operated. This reads Y equals
NOT A.

The fundamental logic elements are the AND, OR, and NOT
operations. Combinations of the AND, OR, and NOT gates are
interconnected to provide operating functions for control of
components and systems. Example 1 shows the relationship
between an electrical circuit and its corresponding logic
diagram.

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Electrical Circuit -
Logic Diagram
Relationship
The electrical circuit shown in Figure 13 is used to provide an
interlock that is part of the controls for a discharge pump. If the
pump discharge pressure is not high, the PSH-1 contact
remains closed. The output, CR1, is energized when PB1 is
pressed. Once energized, relay CR1 is latched and remains
latched by the relay contact CR1-1.

L1 115 Vac L2
CB1
15A PB1
Reset High
PSH-1 Discharge
1 CR1 Pressure
Shutdown
CR1-1
2

Figure 13. Electrical Interlock Circuit

The corresponding logic diagram for the interlock circuit shown

in Figure 13 is shown in Figure 14. The logic diagram does not
consider circuit voltages or the type of devices used in the
circuit. The logic diagram is intended only to convey the circuit
operation. Figure 13 shows that PB1 and CR1-1 are in parallel.
This parallel combination is in series with PSH-1. This parallel-
series combination would be represented by a combination of
an OR gate and an AND gate.

For the logic diagram shown in Figure 14, the output, CR1, is
True when PB1 is True and the pressure is not high. When
PB1 is pressed, PB1 is changed from False to True making the
output of the OR gate become True. If the pressure is not high,
the output of the AND gate then becomes True. When the
output of the AND gate is True it provides a feedback path to
the OR gate. This feedback path enables the output of the OR
gate to remain True when PB1 is released.

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PB1 OR CR1
Reset (NO) AND High Discharge
Pressure
PSH-1 Shutdown
Discharge
Pressure
High (NC)

Figure 14. Logic Diagram For Interlock Circuit

The diagram shown in Figure 14 represents a memory function

that is reset or looses its memory upon loss of power or, if
executing the function with a PLC, when the PLC is not in the
RUN mode.

Other Functions

Other operators that merit discussions since they can be quite

easily implemented in the PLC are the NAND, NOR and
exclusive OR functions.

NAND Function
The NAND function is a combination of the AND and NOT
function. The NAND, a shortened form of NOT-AND, is an AND
gate followed by an inverter. The NAND function with inputs A
and B will have an output that is the opposite of the
AND function. Figure 15 shows the NAND function. The
corresponding truth table is shown in Figure 16.

A
AND AND Y
B

Figure 15. NAND Function

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The truth table for the NAND function is shown in Figure 16.

A B Y
0 0 1
1 0 1
0 1 1
1 1 0

Figure 16. Truth Table For 2-input NAND Function

NOR Function
The NOR function is a combination of the OR and NOT
function. The NOR, a shortened version of NOT-OR, is an OR
gate followed by an inverter. The NOR function with inputs A
and B will have an output that is the opposite of the OR
function. Figure 17 shows the NOR function.

A
OR AND Y
B

Figure 17. NOR Function

The truth table for the NOR function is shown in Figure 18.

A B Y
0 0 1
1 0 0
0 1 0
1 1 0

Figure 18. Truth Table For 2-input NOR Function

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Exclusive OR
Function
The EXCLUSIVE OR function is used to eliminate the
indeterminate condition that exists with the OR circuit when both
inputs are true. The truth table for the OR circuit (Figure 9)
shows that output Y is True when inputs A and B or both A and
B are true. The exclusive OR eliminates this ambiguity. For the
Exclusive OR function the output Y is false when both inputs A
and B are true.

A Y1
B AND

OR Y

AND
Y2

Figure 19. Exclusive OR Function

The truth table for the exclusive OR function is shown in

Figure 20.

A B Y
0 0 0
1 0 1
0 1 1
1 1 0

Figure 20. Truth Table For 2-input Exclusive OR Function

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Boolean Algebra And Logic

Boolean algebra, an algebra of logic, is a method of defining

logical relationships between various signals in equation form.
The Boolean system and its rules differ from those of ordinary
algebra. Boolean equations provide a simple and powerful
method to define logical relationships. When used by the logic
designer, Boolean algebra enables the designer to determine
the simplest logic circuit design for a particular function or to
evaluate alternate configurations for the same function.
Boolean algebra was originated in the early 1800's by George
Boole, an English mathematician, (1815-1864) who felt that his
invention was interesting as a mental exercise, but had no
practical value. In 1938, Boole's mathematics was used as a
tool for the analysis of relay and switching circuits. Boolean
algebra has since evolved as the fundamental design
implement of all digital computers and control system switching
circuits. It is particularly useful in the analysis and synthesis of
solid state or electro-mechanical switching circuits. A Boolean
equation can be converted directly into hardware simply by
inspection. The problem is the reduction of the equation into its
simplest form. Algebraic manipulations can sometimes help to
minimize the hardware requirement.

Boolean AND
Function
The Boolean equation, for the output Y related to the input
variable A and B, for the AND function shown graphically in
Figure 5 is written as:

Y = A • B or Y = AB

Frequently the product symbol for AND (•) is omitted, but is

implied as in the equation:

Y = AB.

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Boolean OR
Function
The Boolean equation for the OR function shown in Figure 8 is
written:

Y =A+B

The plus sign (+) is used as the symbol for the OR operator.

Boolean NOT
Function
The Boolean equation for the NOT function shown in Figure 11
is written as:

Y=A

The bar written over the letter A is the sign for the invert
function.

Composite functions, such as shown in Figure 14, are written in

a Boolean form as:

CR1 = PSH − 1(PB1 + CR1)

The Boolean statement relates the input and the output data
with the use of the logic functions AND (•), OR (+) and INVERT
(__).

Logic Legend

Figure 21 shows the logic symbols used by Saudi Aramco.

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LOGIC LEGEND

A F = 1 IF A = 1 AND B = 1 AND C = 1
B AND F
C F=ABC

A
F = 1 IF A = 1 OR B = 1 OR C = 1
B OR F
C F=A+B+C

F = 1 IF A = 0
A NOT F
F = 0 IF A = 1

DELAY TIME DELAY TIME

A F DELAY A F DELAY
ON OFF

MEMORY CIRCUIT
A S F = 1 IF A = 1 AND B = 0 THE OUTPUT
F
REMAINS SET AFTER A =0
B F' F = 0 IF B = 1
R F' = 1 IF F = 0
F' = 0 IF F = 1
S = SET OUTPUT F
R = RESET OUTPUT F

Figure 21. Logic Legend

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Saudi Aramco
Logic Diagrams
SAES-J-005, Section 5 states that logic diagrams should be
prepared as required. The prepared logic diagrams are then
used by the control equipment vendors to develop the control
system PLC program.

Sources for Generating Binary Logic Diagrams

Generating a binary logic diagram that defines a specific system

operation utilizes one or more of the following:

• System description of operation

• P&ID

• System drawings

• Boolean equations

• Electrical ladder diagrams

System
Description of
Operation
The system description defines the basic operation of a control
system, including interlocks and alarm conditions. Using the
functions defined in the system description the basic logic
functions are developed.

P&ID
Process and instrumentation drawings show how the input and
output devices are wired to the input and output modules. The
input and output drawing also shows the operational states of
the input and output devices and the associated software
memory address.

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System Drawings
System drawings, including input and output drawings, show
how the input devices are wired to the input and output
modules. The input and output drawings also shows the
operational state of the input and output devices and the
associated software memory address.

For example, the system description for manual operation of

valve FV-101 shown in simulator drawing #422-P&ID, Sheet 01
requires only that the system mode switch, HS-335 be in the
Manual Mode position. Using the system description and the
input output drawing, the manual operation for valve FV-101 is
reflected in the logic diagram, #422-LD, Sheet 01.

The PLC addresses for the start and stop switches, transfer
pump status, and motor starter output are shown on input and
output drawing #422-I/O, Sheet 09 and the output controls on
drawing #422-I/O, Sheet 06.

Boolean
Equations
A logic diagram can be developed from a Boolean equation.
For example, if the Boolean equation for a specific operation is
given as:

Y = (X1 • X2) + (X3 • X4)

Then, by inspection, the resulting logic diagram would be a

parallel combination (OR) of two AND circuits that is,

Y = (X1 AND X2) OR (X3 AND X4)

The resulting logic diagram would then be drawn as shown in

Figure 22.

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X1
AND
X2
OR Y
X3
AND
X4

Figure 22. Derived Logic Diagram

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Frequently control systems are modernized and PLC devices

are used to replace existing electro-mechanical control systems.
If electrical control diagrams are available, the conversion to a
logic diagram is a translation of the electrical control functions.

Electrical Ladder
Diagrams
The electrical ladder diagram, also referred to as a schematic
diagram or elementary diagram, is used show a circuit in its
simplest form. A ladder diagram shows how a circuit works and
the electrical relationship of the components (not the physical
relationship).

Frequently control system are modernized and PLC devices are

used to replace existing electro-mechanical system systems. If
electrical ladder diagrams are available the conversion to a logic
diagram is a translation of the electrical control functions.

In the electrical circuit shown in Figure 23, relay CR1 is used to

provide an interlock for a pump circuit. The control logic for
controlling CR1 consists of two pairs of limit switches, XSH1
and XSH2 and XSH3 and XSH4. Limit switches XSH1 and
XSH2 are connected in series as well as XSH3 and XSH4. The
series combinations of limit switches are connected in parallel.
The resulting logic diagram for this combination would then be
combination of two AND gates and an OR gate as shown in
Figure 22.

XSH1 XSH2
CR1

XSH3 XSH4

Figure 23. Interlock for a Pump Circuit

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The process of converting from a ladder diagram to a logic

diagram or from a logic diagram to a ladder diagram requires
inspecting the diagrams and relating the functions as follows:

AND gate ↔ series circuit

OR gate ↔ parallel circuit

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GENERATING RELAY LADDER LOGIC (RLL) DIAGRAMS

Ladder Logic Diagrams

The ladder logic diagram is an electrical control diagram used to

define the control elements and their logical relationship in
achieving control of an industrial system. Figure 24 shows a
ladder logic diagram.

L1 115 Vac L2
CB1
15A PB1
RESET High
1-1 1-2 PSH-1 1-3 Discharge
1 CR1 Pressure
Shutdown
CR1-1
2, 5, 7
2
PB2
RESET
3-2 LSH-1
3-1 3-3 High Level
3 CR2 Shutdown
CR2-1 4, 5, 8
4 Input Devices

PB3
START PB4 CR1-2 CR2-2
5-2 Vacuum
5 M1 Pump
STOP Motor
M1-1 Starter
6
SV1
Output Devices
CR1-3
7-1 7-2 High
7 PL1
Wire Numbers Pressure
Shutdown
CR2-3
8-1 8-2
8 PL2 High Level
Shutdown

Power Rail

Line Numbers
Figure 24. Ladder Logic Diagram

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The control elements include input devices such as

pushbuttons, pressure and level switches, and limit switches.
Output devices include relays, solenoid valves, and motor
starters. Figure 25 shows the basic electrical symbols used to
represent physical devices. The symbols shown are used not
only in electrical relay ladder diagrams but also in PLC input and
output diagrams.

Electrical Symbols

Push Button N.O. Push Button N.C.

(Spring Return) (Spring Return)

Pressure Switch Pressure Switch

Closes On Opens On High
Rising Pressure Pressure

Annunciator Flow Switch

Opens On Low
Flow
Limit Switch Limit Switch
Normally Closed Normally Open

Temp. Switch XX Relay Coil

Open On CR=Control Relay
High Temp. MS=Motor Starter

N.O. Contact N.C. Contact

Level Switch Level Switch

Closes On Opens On
Rising Level High Level

Light Indicating
R R=Red Solenoid Valve
G=Green
A=Amber
W=White

Figure 25. Electrical Symbols Legend

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Power Rails

The ladder diagram resembles a stepladder. The left and right

rails of the ladder diagram are used to indicate the power
source. The input elements include pushbuttons, pressure and
level switches, and various relay contacts. The output devices
include solenoid valves, relays, and motor starters.

The control circuit receives its power from a 115 Vac source.
The rails are connected to terminals L1 and L2 and are fused
through a 15 Amp circuit breaker. The control circuit is powered
with 115 Vac only when the circuit breaker is closed. The
vertical line on each side of the control circuit represents the
conductors connected to the 115 Vac power source. The
vertical lines are called the power rails since they supply power
to the control circuit.

The ladder diagram is designed to provide information

concerning the sequence of operation for the system. The
diagram is read, starting from the top, left to right on each line.
Each line of the diagram has a unique line number. In Figure
26, the numbers 1 to 8 on the left of the diagram are line
numbers. These line numbers are used as reference numbers
for the rungs. These reference numbers are used when cross
referencing elements within the diagram. The commentary to
the right of the output devices describes the function of the
output device. The description also includes numbers that are a
cross reference showing the line numbers where contacts from
the output device are used.

The numbers within each line, such as 1-1 and 1-2 in line 1,
indicate a wire number. This wire number will be attached to
each end of the wire used to make the electrical connection
shown in the diagram. For example, wire number 1-3 in line 1
identifies the wire that connects PSH-1 to relay output CR1.
The wire numbers help to locate the proper wire when
troubleshooting the system. They are also useful when making
alterations to the system.

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Each pushbutton is identified in several ways. First, each

pushbutton is identified by PB and a unique number. Second,
each pushbutton is identified with a function, such as reset or
start. Third, each pushbutton is identified with its electrical
symbol. In Figure 24, each pushbutton is shown as a normal
open pushbutton. Contacts are shown on lines 2, 4, 6, 7 and 8.
The contact symbols indicate that their operation is controlled
by a relay coil rather than some other physical operation, such
as a limit switch or pushbutton.

Contacts are controlled by relay coils or motor starters. The

relay coils and motor starters are output devices and are shown
connected to the right power rail. Each relay shown in this
diagram has control of one or more sets of contacts. The exact
number of contacts controlled and their location in the diagram
is indicated on the right of the right power rail. For example,
relay coil CR1 in line 1 controls contacts in lines 2, 5, and 7.
The bar over the number 7 indicates that the contact in line 7 is
normally closed.

Contact Symbology

The PLC relay type instructions function similarly to hard wired

relay contacts. Consider CR1 relay shown in Figure 26.

Off On Relay Coil

CR1

CR1-1 CR1-3

CR1-2 CR1-4

Relay Contacts

Figure 26. Electro-mechanical Relay Schematic

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Relay CR1 contains four sets of contacts, CR1-1 to CR1-4.

Contacts CR1-1 and CR1-2 are normally open (NO) and
contacts CR1-3 and CR1-4 are normally closed (NC). The input
device, SW1 determines whether relay CR1 is energized or
turned ON. If SW1 is in the OFF position, CR1 is not energized
or turned OFF. Relay contacts CR1-1 and CR1-2 remain open
and contacts CR1-3 and CR1-4 remain closed.
When SW1 is turned to the ON position, CR1 is energized or
turned ON. Contacts CR1-1 and CR1-2 close and contacts
CR1-3 and CR1-4 open.
PLC relay type instructions operate in a manner similar to the
relay operation shown in Figure 26. One difference is the
nomenclature. The components in Figure 29 are identified by
the nomenclature CR1, SW1, CR1-1. The symbology used in
the PLC program appears similar to the symbology used in
electrical circuits but the definitions attached to the symbols are
different. The nomenclature in PLC program is the PLC
software address. The symbols shown in Figure 27 define the
basic relay type instructions used in the PLC.
When dealing with PLC ladder logic it is quite understandable to
interpret the ladder diagram in the same manner as an
electromechanical ladder diagram. The PLC relay ladder
diagram is, in effect, a logic diagram that is drawn in a different
format. As such, the symbols that appear in the PLC ladder
diagram are software instructions and are interpreted as True or
False rather than Open or Closed.

SYMBOL DEFINITION
X1 Input-NO. Represents an input instruction. Used to represent a switch
or sensor input to the PLC or a contact from a PLC output instruction.
| |
The input-NO instruction is logically TRUE when the address
associated with the instruction (X1) contains a logic “1”.
X2 Input-NC. Represents an input instruction. Used to represent a switch
or sensor input to the PLC or a contact from a PLC output instruction.
|\|
The input-NC instruction is logically TRUE when the address
associated with the instruction (X2)contains a logic “0”.
Y0 Output. Represents an output instruction controlled by input or
combination logic. The output instruction may be an internal logic point
( )
or connected to an external device. The output instruction is set
logically TRUE when all of the preceding input instruction controlling
the output instruction are logically TRUE.
Figure 27. Basic Relay Instructions

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PLC Ladder Diagrams

The PLC ladder logic program is a popular form of language
used in the PLC. The PLC ladder logic program follows the
basic rules established for an electro-mechanical relay ladder
diagram.

The left and right vertical lines, illustrated in Figure 28, are the
left and right power rails. The PLC ladder diagram, although it
looks like an electrical ladder diagram, is actually a logic
diagram. The power rails in the PLC ladder diagram do not
represent power sources, but represent the starting and ending
points for the rungs of logic. The left rail is the starting point for
“logic flow”. That is, when the CPU solves a rung of logic it
starts at the left power rail and tests each instruction for a True
or False state, moving from left to right.

A rung is a logic circuit that includes combinations of series or

parallel input instructions terminated by an output instruction or
several output instructions in parallel. PLC rungs are numbered
in the same manner as electrical ladder diagrams. For
example, the numbers to the left of the left rail, 0 and 1, are
rung numbers.

Output Instructions

X1 X2 X3
0 Y0

Rung Input Conditions

X4 X5 X6
Y1
1

X7 X8 X9
Y2

Rung Input Conditions

Rung Numbers
Figure 28. PLC Rung

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Input Instructions
Input instructions form the conditional part of the rung. It is the
True or False state of the input instructions that determines the
True or False state of the output instructions. In rung 0, the
input instructions (labeled rung input conditions in Figure 28)
are X1, X2, and X3. Rung 1 illustrates a set of complex input
instructions, X4 through X9, terminated by two parallel output
instructions Y1 and Y2. Again, the input instructions form the
conditional part of the rung and the output instructions are the
result of the input conditions.

Output
Instructions
Output instructions are the controlled devices in the rung. If the
rung conditions preceding the output instruction are true, the
output instruction is true. All rungs must be terminated with an
output instruction. If input instructions X1, X2, and X3 are True,
then output Y0 is set True.

Summary

The PLC ladder diagram is, in effect, a logic diagram drawn

using different symbology. Furthermore, both logic and ladder
diagrams are graphical representations of control functions and
there is a direct equivalent between the two types of diagrams.
In addition, the logic diagram can be generated from a written
description and/or a Boolean equation.

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GENERATING A PLC LADDER PROGRAM

PLC Circuits And Logic Contact Symbology

Hard-wired logic refers to logic control functions executed by

electro-mechanical devices such as switches, pushbuttons,
relays, solenoids, and motor starters. The resulting logic
functions are determined by the way the devices are
interconnected. Hard-wired control systems are fixed and can
only be changed by rewiring and adding or deleting
components. The ladder diagram shown in Figure 24 illustrates
a hard wired control system using electro-mechanical devices.
The corresponding PLC execution of the control circuit shown in
Figure 24 is shown in Figure 29.

The most common PLC language is the PLC ladder language.

The PLC ladder logic is implemented using the basic logic
functions AND, OR, and NOT. These functions are used singly
or in combinations to form instructions. The True or False state
of the output instructions will determine if the controlled device
is ON or OFF.

PLC ladder language uses relay equivalent contact symbols

such as normally open and normally closed contacts and output
coils. Contact symbology is an easy way of expressing the
control logic in the same form of symbols used on hard wired
control diagrams. If the PLC language is ladder logic, the
translation from existing relay logic to PLC ladder logic is
simplified.

The complete ladder diagram shown in Figure 24 is formed by

individual circuits with each circuit containing a single output or
several outputs in parallel. Each of the circuits is defined as a
rung of control logic. When developing the PLC ladder logic the
same principle applies so that there is a correspondence
between the hard wired control program and the PLC ladder
program.

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The PLC program consists of multiple rungs of logic with each

rung terminated by a single output instruction connected to a
field device or multiple output instructions connected in parallel.
Each rung, starting at the left power rail, contains a combination
of input instructions terminated by an output instruction. The
input instructions may be connected in series, parallel, or
complex combinations required to solve the desired control
function.

The PLC ladder program has a direct relationship to the hard

wired ladder diagram where input devices are connected in
series or in parallel to control various devices. When activated,
the input devices allow the output devices to be activated.

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| CR1 |
| HIGH |
| DISCHARGE |
| PB1 PRESSURE |
| RESET PSH-1 SHUTDOWN |
| I:000 I:000 B003 |
++-----] [-----+-----]/[-----------------------------------------------( )-----+
|| 00 | 04 00 |
|| | |
|| CR1 | |
|| HIGH | |
|| DISCHARGE | |
|| PRESSURE | |
|| SHUTDOWN | |
|| B003 | |
|+-----] [-----+ |
| 00 |
| |
| CR2 |
| PB2 HIGH LEVEL |
| RESET LSH-1 SHUTDOWN |
| I:000 I:000 B003 |
++-----] [-----+ ----]/[-----------------------------------------------( )-----+
|| 01 | 05 01 |
|| | |
|| | |
|| | |
|| CR2 | |
|| HIGH LEVEL | |
|| SHUTDOWN | |
|| B003 | |
|+-----] [-----+ |
| 01 |
| CR1 |
| HIGH M1 |
| DISCHARGE CR2 VACUUM PUMP |
| PB3 PB4 PRESSURE HIGH LEVEL MOTOR |
| START STOP SHUTDOWN SHUTDOWN STARTER |
| I:000 I:000 B003 B003 O:001 |
++-----] [-----+-----] [-----------] [-----------] [-------------+-----( )-----+
|| 02 | 03 00 01 | 00 |
|| | | |
|| | | |
|| | | |
|| M1-1 | | |
|| VACUUM PUMP | | |
|| RUNNING | | SV1 |
|| I:000 | | O:001 |
|+-----] [-----+ +-----( )-----+
| 06 01 |
| |
| |
| DISCHARGE PL1 |
| PRESSURE HIGH PRESSURE|
| SHUTDOWN SHUTDOWN |
| B003 O:001 |
+-----]/[--------------------------------------------------------------( )-----+
| 00 02 |
| |
| |
| CR2 PL2 |
| HIGH LEVEL HIGH LEVEL |
| SHUTDOWN SHUTDOWN |
| B003 O:001 |
+-----]/[--------------------------------------------------------------( )-----+
| 01 03 |
| |
| |

Figure 29. PLC Ladder Diagram

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PLC-5 Addressing
Each instruction has a reference number that is the memory
address location where the 1 or 0 status of the reference
memory address is stored. When the instruction is referenced
to a device wired to the PLC the 1 or 0 located at the memory
address is related to the OPEN or CLOSED state of the field
device. The relation between the input device and the memory
location is defined later in this module.

Logical
Addressing
When entering a logic program a method must be used to
address the different elements in the data files. Equation 1
provides a general format for data file addressing, where:

DFA = Ff:e./b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (1)

DFA = Data File address
F = File type
F = floating point I = input B = binary
N = integer O = output C = counter
R = control S = status T = timer
f = File number
0 = output 1 = input
4 = timer 5 = counter
6 = control 7 = integer
8 = floating point 9 - 999 for additional file storage
: = Colon delimiter separates file and element numbers
e = Element number
0 - 37 octal for I/O files
0 - 37 decimal for the status file
0 - 999 decimal for all other file types
b = Bit number
0 - 17 octal for I/O files
0 - 15 decimal for all other file types

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I/O Addressing
A special case of logical addressing is addressing words or bits
in an input/output file. The general format equation for
addressing I/O is defined in equation 2a and 2b.

The equation for input addressing is:

Input file address = I:r.g/bb . . . . . . . . . . . . . . . . . . . . . . . . (2a)

and the equation for output addressing is:

Output file address = O:r.g/bb . . . . . . . . . . . . . . . . . . . . . .(2b)

where,

I: Input module

O: Output module

r: rack number

g: module group

bb: terminal number, 00-07, 10-17

Relay Type Instructions

When dealing with PLC ladder logic the ladder diagram can be
interpreted in the same manner as an electromechanical ladder
diagram. The PLC ladder diagram is, in effect, a logic diagram
that is drawn in a different format. As such, the symbols that
appear in the PLC ladder diagram are software instructions and
are interpreted as True or False rather than Open or Closed.

An instruction is defined as a statement that represent a specific

operation and the values or locations of its operands. The
operand is the address part of the instruction. Figure 30
illustrates a PLC instruction. In Figure 31, the opcode is the
symbol ] [ and the address is I1.

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INSTRUCTION

ADDRESS
I1

OPCODE

Figure 30. PLC Instruction

An instruction in the PLC is then defined as the combination of

an opcode and an address. The address of a PLC instruction
defines the data table location where status information is
stored. The opcode represents the different types of operations
the PLC software can perform. The following paragraphs
describe the relay type operations that are in the PLC.

Figure 31 lists the basic relay type instructions incorporated in

the PLC.

SYMBOL MNEMONIC INSTRUCTION TYPE

] [ XIC Examine if closed (Input)
]\[ XIO Examine if open (Input)
( ) OTE Output energize (Output)
(L) OTL Output latch (Output)
(U) OTU Output unlatch (Output)
XIC and XIO are input instructions, OTE, OTL, and OTU are output instructions.

Figure 31. Basic Relay Instructions

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Examine If Closed
Instruction (XIC)
The examine if closed instruction is an input instruction that has
a bit level address. The instruction is logically True if there is a
logic 1 at the data table address specified by the instruction.

The logic bit at the data table address has only two states, 0
and 1. The state of the data table bit is determined by the
device that is controlling the address specified by the
instruction. If the address is an input controlled by a device
wired at the PLC, than the status bit represents the open and
closed state of that device. If the device connected to the PLC
is closed, then a logic 1 is placed into the bit location by the
processor during its I/O update. If the switch is open, then a
logic zero is placed into the bit location.

Figure 32 shows an examine on instruction controlling an output

instruction. The address for the examine instruction represent
an input device connected to the PLC. For this instruction,
when the external physical switch is closed there will be a logic
1 at the data table address, I:000/00, and the instruction will be
True. For the logic shown, if the input instruction is True the
resulting output instruction will be True.

|SS1 |
|AUTO-MANUAL |
|SELECTOR |
|SWITCH |
| |
| I:000 O:001 |
+----| |---------------------------------------------------( )--+
| 00 00 |
| |
| |

Figure 32. Examine ON Instruction

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Examine If Open
Instruction (XIO)
The examine if open instruction is an input instruction that has a
bit level address. The instruction is logically True if there is a
logic 0 at the data table address specified by the instruction.

Figure 33 shows an examine off instruction controlling an output

instruction.

|XIO INSTRUCTION |
| |
| I:000 O:000 |
+------|/|------------------------------------------------( )--+
| 01 01 |
| |
| |

Figure 33. Examine OFF Instruction

The address for the examine instruction, I:000/01, represents an

input device connected to the PLC. For this instruction, when
the external physical switch is open there will be a logic 0 at the
data table address, I:000/01, and the corresponding XIO
instruction will be True. For the logic shown, if the input
instruction is True the resulting output instruction will be True.

Output Energize
Instruction (OTE)
The output energize instruction (OTE) is an output instruction
that is controlled by the logic instructions preceding the Output
instruction.

If the preceding rung conditions are logically True, the output

instruction is True and a logic 1 is written into the data table
address defined by the output instruction. For the example,
Figure 34 shows an output instruction of O:001/00 defines a
data table address that will control a device connected to the
PLC.

Unlike electro-mechanical relays the PLC output instruction can

have unlimited number of examine ON or examine OFF
instructions related to the output instructions. This is analogous
to having an “infinite pole” relay. The is the memory capacity of
the PLC is the limiting condition.

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Output Latch
Instruction (OTL)
When the rung conditions preceding the output latch instruction
are True, the output latch is set and a logic 1 is written into the
data table. The OTL instruction is retentive and remains True
when the rung conditions go False. The output will remain set
until reset by a corresponding output unlatch instruction.

Output Unlatch
Instruction (OTU)
The Output Unlatch instruction is used to reset the Output
Unlatch instruction. When the unlatch instruction is True it
resets the bit in the data table that was set by the latch
instruction.

| I:000 O:001 |
+--] [-------------------------------------------------------(L)--+
| 00 00 |
| I:000 O:001 |
+--] [-------------------------------------------------------(U)--+
| 01 00 |

Figure 34. Output Latch/Unlatch Instruction

PLC-5 Timer Instructions

The Allen-Bradley PLC-5 timer instructions include the Timer

ON-Delay (TON), Timer OFF-Delay (TOF) and the Retentive
Timer ON-Delay (RTO). All timer instructions require three
words required for each timer element. The timer element
includes the following functions:

• Time base (TB)

• Preset value (PR)

• Accumulated value (AC)

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The time base, TB, is the time period of the internal clock that is
used to increment the timer. For the PLC-5 the time bases
available are 1.0 and 0.01 seconds.
The preset number is the number of timed intervals that are to
be counted.
The accumulated value is the number of timed intervals that
have elapsed after the timer has been enabled. The
accumulated value shows the elapsed time for the timer after
the timer has been enabled.

Timer On-delay
(TON)
| |
| I:000 +- TON ----+ |
+-----] [-------------------------------------| T004:000 +(EN)+
| 04 | Base 1.0 | |
| | PR 10 +(DN)+
| | AC 0 | |
| +----------+ |
| |
| |
| |
| |
| T004:000 O:001 |
+----] [----------------------------------------------( )-----+
| DN 07 |
| |
| |

Figure 35. TON Instruction Set

Figure 35 shows a program with a TON timer. When input

instruction I:000/04 is True Timer T4:000 is enabled and starts
to count time-base intervals. The timer will continue to count
timed intervals as long as rung conditions remain True.

When the accumulated value equals the preset value

(ACC=PR) the timer stops incrementing and sets the done bit
(DN) True (1).

When the timer rung condition go False, the accumulated value

(ACC) is set to 000, the instantaneous bit is (EN) reset to 0 and
the Done (DN) bit reset to 0.

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Timer Off-delay
(TOF)

| |
| I:000 +- TOF ----+ |
+-----] [-------------------------------------| T004:001 +(EN)+
| 05 | Base 1.0 | |
| | PR 10 +(DN)|
| | AC 0 | |
| +----------+ |
| |
| |
| T004:001 O:001 |
+----] [----------------------------------------------( )-----+
| DN 06 |
| |
| |
| |

Figure 36. Off-delay Timer

The Off-delay timer, shown in Figure 36, counts time base

intervals when the timer rung conditions go False. When the
rung conditions are True, done bit (DN) is set ON and the
accumulated value set to 000.

When the accumulated value equals the preset value, the done
bit (DN) is set False, 0.

Timer Addressing
Timer instructions are addressed in accordance with equation 1.
Timer file T4 is the factory default for timers with timer elements
are 0 to 999 available. In Figure 36 the timer address is T4:000;
timer file 4, element 000.

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Retentive Timer
On-delay (RTO)
The Retentive Timer On-delay functions in the same manner as
the Timer On-delay with the exception that the accumulated
value is retained when the command line is False. Each time
that the command line is True, the accumulated value is
incremented at the time base rate. When the command line is
False, the timer stops incrementing and the accumulated value
stays in its last position. When the command line again is True,
the accumulated value starts incrementing from the value that
existed when the command line went False.
The retentive timer On-delay instruction retains its accumulated
value even when rung conditions are False, the loss of AC
power, and the Mode select changed to the PROGRAM
position.
The Retentive timer reset (RES) is used to reset the
accumulated value to 000 and the done bit to 0. The reset
instruction has the same address as the corresponding RTO
instruction.
|I:000 T004:002|
+-] [-------------------------------------------------(RES)--+
| 04 |
|I:000 +- RTO ----+ |
+-] [----------------------------------------| T004:002 +(EN)+
| 05 | Base 1.0 | |
| | PR 15 +(DN)+
| | AC 0 | |
| +----------+ |
|T004:002 O:001|
+--] [---------------------------------------------------( )-+
| DN 05|
| |

Figure 37. Retentive Timer On-delay

For the circuit shown in Figure 37, when input instruction XIC
I:000/05 is True, the RTO timer T4:2 is enabled and the
accumulated value is incremented at 1 second intervals. When
the accumulated value is equal to the preset value (AC = PR)
the done bit, T4:002.DN is set True, enabling output instruction
O:001/05.

To clear the accumulated value and reset the done bit, input
instruction I:000/04 is made True.

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Counter Instructions
Industrial processes use counting devices to determine
quantities of parts produced, control sequencing of processing
and procedures such as the clean in place process (CIP) used
in the pharmaceutical industry, or keeping track of the number
of cold starts for large horse power motors.

Counters are output instructions that respond to a change of

state of the counters rung enabling signal. The operation of the
counter instruction is similar to the RTO instruction with the
exception that there is no time base and the counter operates
on a False to True transition of the counter rung instruction.

The counter accumulated value (AC) totals the number of False

to True transitions. Counter instructions include:

• Up counter (CTU)

• Down counter (CTD)

The up counter will increment the accumulated value for each 0

to 1 transition of the counter instruction. The down counter will
decrement the accumulated value for each 0 to 1 transition of
the counter instruction.

PLC-5 Counter
Instructions
The Allen-Bradley counter instruction includes the UP counter
and the DOWN counter. All counter instructions require three
words for each counter element. The counter element includes
the following functions:

• Preset value (PR)

• Accumulated value (AC)
• Done bit (DN)
The preset value is the number of events to be counted.

The accumulated value is the present value of the events

counted.

The done bit is a counter flag that is set True (logic 1) when the
accumulated value equals the preset value (AC = PR).

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Additional flags include:

• Overflow bit (OV)

• Underflow bit (UN)

The OV bit is set True when the accumulated increments to -

32,768 and starts counting at 0 with the next False to True
transition.

The UN bit is set True when the accumulated value decrements

to -32,768 and starts counting at 0 with the next False to True
transition of the counter instruction.

The Counter reset (RES) is used to reset count up and down

counter, overflow or underflow bit, counter done bit and counter
enable bit.

CTU

I:000/02 UP COUNTER
COMMAND LINE
EN
COUNTER: CF:XXX
PRESET: XXX
ACCUM: ddd DN

CF:XXX
I:000/03
RES

RESET COMMAND USED FOR

COUNTER INSTRUCTION

Figure 38. UP-Counter Instruction

The counter instruction is an output instruction as shown in

Figure 38. The counter instruction is controlled by input
instruction I:000/02. The reset for the counter is controlled by
input instruction I:000/03.

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Counter
Addressing
Counter instructions are addressed in accordance with equation
1. Counter file C5 is the factory default file for counters. Within
each counter file the counter elements are 0 to 999. An
element is an addressing unit for a counter and contains three
words. A counter program with complete addressing is shown
in Figure 39.

| |
| PB-1 C-1 |
| COUNTER SYSTEM |
| RESET COUNTER |
| I:000 C005:000 |
+-----] [----------------------------------------------(RES)-----+
| 00 |
| |
| PROXSW-23 C-1 |
|COUNTER INPUT SYSTEM |
| COMMAND COUNTER |
| I:000 +- CTU ----+ |
+-----] [----------------------------------------| C005:000 +(CU)+
| 01 | PR 10 | |
| | AC 19 +(DN)|
| +----------+ |
| |

Figure 39. Counter Program

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ENTERING AND TESTING A PLC LADDER LOGIC PROGRAM

Generating a PLC relay ladder logic program requires the use of
a PLC programming software and a personal computer. The
procedure for entering a given PLC program into a PLC is
determined by the specific programming software.

The following discussion describes the procedures for using

Tele-Denken Topdoc PLC-5 programming and documenting
software.

Topdoc software is for programming and documentation only.

Topdoc is not a MMI or SOE software package.

Topdoc PLC-5 Programming Software

The Tele-Denken Topdoc programming, documentation, and

emulation software is designed to allow complete programming
of the Allen-Bradley PLC-5 family of programmable logic
controllers. Details for using the Topdoc software and the
associated keystrokes are shown in the Addendum: Topdoc
Program Development and Documentation.

• System Startup
System startup is the procedure used to load the Topdoc
program stored in the personal computer.
• Offline Programming (Edit Mode)
Offline programming is used to enter and document PLC
programs. All editing and documentation is entered from
the offline mode. Configuration of a PLC program is part
of the offline programming process.
• Creating a PLC Ladder Program
After a new file has been created and configured, a PLC
program can be entered by using the program instructions.
• Program Annotation
Program annotation involves adding element descriptors
and rung comments to a ladder program. Rung comments
are used to provide a verbal description of the circuitry
associated with a given rung.

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• Program Emulation

In the emulation mode, the PLC program is executed and

the ladder program is scanned in the same manner as if it
were the actual PLC solving logic. Instructions are made
True and False with computer keyboard entry and the
ladder logic is executed.

• Downloading a Program File to the PLC

After a program has been created and stored in the

personal computer, it must be loaded into the PLC. The
process of transferring a program from the personal
computer to the PLC is called downloading.

• Online Monitoring

Online monitoring provides direct viewing of the program

residing in the PLC.

• Generating Reports (Documentation Mode)

Program documentation includes the ladder report,

address report, table report, usage report and database
report.

Entering a PLC-5 Program

To enter a PLC-5 program the following procedures are

followed:

• System Start-up

• Offline Programming (EDIT Mode)

• Creating a PLC Ladder Program

The procedures for system start-up, off-line programming, and

creating a PLC ladder program are detailed in the Addendum,
pages 3 through 12.

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Testing The Entered Program

After a ladder program is entered into the personal computer

the program may be tested in two ways.

The first method utilizes just the personal computer and

program emulation. Program emulation is a sub-program within
the Topdoc programming software. Program emulation allows
the personal computer to scan and solve logic in a similar
manner as the PLC. By using the emulation capabilities of the
Topdoc software rungs of logic may be tested for proper
operation prior to loading the program into the PLC.

The second method requires the developed program to be

downloaded to the PLC and testing the program using on-line
monitoring of the program. Testing the program using the on-
line mode utilizes the devices connected to the PLC.

Program Emulation

Program emulation will allow the personal computer to scan and

solve logic in the same manner as the PLC. By using the
emulation capabilities of the Topdoc software rungs of logic may
be tested for proper operation.

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GENERATING PROGRAM DOCUMENTATION

PLC program documentation includes a printed copy of the

ladder program stored in the PLC. The programming software
will allow the printing of following reports:

• Ladder report

• Database report

• Address report

Ladder Report

The ladder report is a printed copy that shows each program

instruction included in the control program. Two rungs of logic
from a PLC program are shown in Figure 40.

|I:020 I:001 I:001 B003 B003 |

+-]/[---] [---] [---]/[---------------------------------------( )-+
| 01| 10| 11 05 04|
| |B003 | |
| +-] [-+ |
| 04 |
|I:020 I:001 I:001 B003 B003 |
+-]/[---] [---] [---]/[---------------------------------------( )-+
| 01| 12| 13 04 05|
| |B003 | |
| +-] [-+ |
| 05 |

Figure 40. Ladder Program Report

The ladder program shown in Figure 40 shows each instruction.

However, information on the meaning of each instruction in the
program is not easy to discern. To assist in understanding the
operation of the program additional information is added to the
ladder program. This additional information is defined as
annotation.

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Annotated PLC
Ladder Printout
Annotation is commentary added to the ladder program to
enhance the readability and understanding of the PLC program.
The PLC programming software has the capability to add
annotation in the form of element descriptions for PLC
instructions. The rung shown in Figure 41 with element
descriptions is shown in Figure 42.

Rung Comment

Element Descriptors

Rung
X
I1 I2 O1
Figure 41. Rung Comment

| |
| |
| CR_3C CR_3O |
| SS_1 PB_18 ZSO_FV3 CLOSE COMMAND OPEN COMMAND |
| MANUAL-AUTO OPEN FLOW FLOW VALVE VALVE FV-3 VALVE FV-3 |
| SELECTION VALVE FV-3 FV3 OPEN (MANUAL) (MANUAL) |
| I:020 I:001 I:001 B003 B003 |
+-----]/[---------] [---------] [----------]/[---------------( )-----+
| 01 | 10 | 11 05 04 |
| | | |
| | | |
| | CR_3O | |
| |OPEN COMMAND| |
| | VALVE FV-3 | |
| | (MANUAL) | |
| | B003 | |
| +-----] [----+ |
| 04 |
| |
Figure 42. Annotated PLC Rung

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Element
Descriptors
An element description is a block of text associated with a
specific data table address. The element description, entered
with the programming software, includes a two line-13 character
per line parameter and tag name field, a five line-13 character
per line instruction field, and a 11 character drawing field line.
The programming software entry window is shown in Figures 43
and 44.

ENTRY WINDOW

O:000/00 PARAMETER
MS1 TAG NAME

START PUMP XREF O/R

P-156 <Y/N>
3
4 FLD DWG #
5 D-123

Figure 43. Entry Window

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| CR1 |
| HIGH |
| DISCHARGE |
| PB1 PRESSURE |
| RESET PSH-1 SHUTDOWN |
| I:000 I:000 B003 |
+------] [-----------] [---------------------------------( )-----+
|| 00 | 04 00 |
|| | |
|| CR1 | +------------LABEL INPUT------------+|
|| HIGH | |F9 to accept record ||
|| DISCHARGE | |ESC to abort current changes ||
|| PRESSURE | |-----------------------------------||
|| SHUTDOWN | | I:000/04 PARAMETER ||
|| B003 | | PSH-1 TAGNAME ||
|+-----] [----+ |-----------------------------------||
| 00 | PRESSURE XREF O/R ||
| | SWITCH HIGH <Y/N> <N> ||
| | ||
| | FLD DWG # ||
| | D-123 ||
| PB2 +-----------------------------------+|
| +------------LABEL INPUT------------+|
| |F9 to accept record ||
| |ESC to abort current changes ||
| |-----------------------------------||
| | I:000/04 PARAMETER ||
| | PSH-1 TAGNAME ||
| |-----------------------------------||
| | PRESSURE XREF O/R ||
| | SWITCH HIGH <Y/N> <N> ||
| | ||
| | FLD DWG # ||
| | D-123 ||
| +-----------------------------------+|

Figure 44. Entry Window

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Rung Comments
A rung comment is a block of text associated with a specific
rung of ladder logic. Each comment may be several hundred
lines in length with up to 195 characters in each line. When the
ladder diagram is printed the rung comment is printed above the
specific rung associated with the rung comment.

Figure 45 shows a PLC rung of logic containing both element

descriptors and a rung comment. In this illustration the rung
comment is detailed and provides information for the
maintenance personnel on the operation of this specific rung of
logic.

Mode:operate F10=Menu P2/0

> \TD5\PLC5\BOB1
PUMP P106 IS USED TO TRANSFER MATERIAL TO A STORAGE TANK. THE
EMERGENCY STOP AND STOP PUSH BUTTONS ARE WIRED NORMALLY CLOSED SO
THAT THE INSTRUCTIONS ARE True UNTIL THE PUSH BUTTONS ARE PRESSED.
THE DISCHARGE VALVE IS A PERMIT FOR THE START CIRCUIT TO BECOME
SEALED WHEN THE START PUSH BUTTON IS PRESSED. IF THE PUMP IS
RUNNING AND THE DISCHARGE VALVE FAILS THE PUMP WILL STOP.
| |
| |
| |
| EMERGENCY STOP PUSH- PUMP P106 START PUSH- |
| STOP BUTTON DISCHARGE BUTTON START REQUEST|
| (WIRED NC) (WIRED NC) VALVE OPEN (WIRED NO) PUMP P106 |
| I:000 I:000 I:000 I:000 O:001 |
+----] [---------] [-----------] [----+----] [-----+--------( )-----+
| DC 00 DC 01 DC 04 | DC 02 | DC 10 |
| | | |
| | | |
| | | |
| | | |
| | PUMP P106 | |
| | RUNNING | |
| | I:000 | |
| +----] [-----+ |
| DC 03 |

Figure 45. PLC Rung With Element Descriptors

And A Rung Comment

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Database Report

The database report lists the tag number, descriptor text, and
field drawing reference for the PLC addresses in the PLC
program. No cross reference information is included in this
report. This report could be considered as an I/O listing.

If an address has not been made part of the database by having

a label placed with it, the address will not be part of the report.

The procedure for the printing the address, table, usage, and
database reports can be found on page 27 of the Topdoc
Documentation in the Addendum.

A page from the database report for the simulator PLC program
is shown in Figure 46. The report lists input addresses I:001/00
to I:002/14 and the corresponding tag names, element
descriptor text, and the reference I/O drawing showing the field
and terminal block wiring.

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TOPDOC-AB5 by Tele-Denken Resources, Inc. 3.2

source: \TD5\PLC5\B&W2
created: Thu Oct 31 19:40:06 1996 Saudi Aramco Simulator page 1
printed: Fri Nov 1 12:23:32 1996
DATABASE REPORT
----------------

ADDRESS TAG DESCRIPTOR TEST FLD DWG REF XREF OR

---------- ---------- ---------------- ------------------------ ------------- --------
I:001/00 HS101 OPEN FLOW VALVE FV-101 422-I/O-002 N
I:001/01 HS101 CLOSE FLOW VALVE FV-101 422-I/O-002 N
I:001/02 XSH101 FLOW VALVE FV-101 OPEN (WIRED NC) 422-I/O-002 N
I:001/03 XSL101 FLOW VALVE FV-101 CLOSED (WIRED NC) 422-I/O-002 N
I:001/04 HS102 OPEN FLOW VALVE FV-102 422-I/O-002 N
I:001/05 HS102 CLOSE FLOW VALVE FV-102 422-I/O-002 N
I:001/06 XSH102 FLOW VALVE FV-102 OPEN 422-I/O-002 N
I:001/07 XSL102 FLOW VALVE FV-102 CLOSED 422-I/O-002 N
I:001/10 HS103 OPEN FLOW VALVE FV-103 422-I/O-002 N
I:001/11 HS103 CLOSE FLOW VALVE FV-103 422-I/O-002 N
I:001/12 XSH103 FLOW VALVE FV-103 OPEN 422-I/O-002 N
I:001/13 XSL103 FLOW VALVE FV-103 CLOSED 422-I/O-002 N
I:001/14 HS104 OPEN FLOW VALVE FV-104 422-I/O-002 N
I:001/15 HS104 CLOSE FLOW VALVE FV-104 422-I/O-002 N
I:001/16 HS116 ANNUNCIATOR RESET 422-I/O-002 N
I:001/17 HS117 ANNUNCIATOR ACKNOWLEDGE 422-I/O-002 N
I:002/00 XSH104 FLOW VALVE FV-104 OPEN 422-I/O-002 N
I:002/01 XSL104 FLOW VALVE FV-104 CLOSED 422-I/O-002 N
I:002/02 HS105 OPEN VALVE VALVE FV-105 422-I/O-002 N
I:002/03 HS105 CLOSE FLOW VALVE FV-105 422-I/O-002 N
I:002/04 XSH105 FLOW VALVE FV-103 OPEN 422-I/O-002 N
I:002/05 XSL105 FLOW VALVE FV-103 CLOSED 422-I/O-002 N
I:002/06 HS108 OPEN FLOW VALVE FV-108 422-I/O-002 N
I:002/07 HS108 CLOSE FLOW VALVE FV-108 422-I/O-002 N
I:002/10 XSH108 FLOW VALVE FV-103 OPEN 422-I/O-002 N
I:002/11 XSL108 FLOW VALVE FV-103 CLOSED 422-I/O-002 N
I:002/12 HS109 OPEN VALVE VALVE FV-109 422-I/O-002 N
I:002/13 HS109 CLOSE FLOW VALVE FV-109 422-I/O-002 N
I:002/14 XSH109 FLOW VALVE FV-109 OPEN 422-I/O-002 N

Figure 46. Database Report

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Address Report

The address report shows a listing of all the addresses used in

the PLC program, including the field drawing reference, tag
name, 5 line x 13 character descriptor text, and program
references (cross reference). The cross reference defines the
usage for each instruction within the PLC program.

A page from the address report shows the detailed address

report for address I:001/00 to I:002/01 is shown in Figure 47.
The report shows the corresponding I/O drawing, tag name,
element descriptor, and program cross reference information.
The meaning of the references RD and WR bits are:

• RD - rungs in the PLC program where the state of the

reference bit is examined (read)

• WD - rungs in the PLC program where the state of the

reference bit is changed (write)

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TOPDOC-AB5 by Tele-Denken Resources, Inc. 3.2

source: \TD5\PLC5\B&W2
created: Thu Oct 31 19:40:06 1996 Saudi Aramco Simulator page 2
printed: Fri Nov 1 12:23:32 1996
DETAILED ADDRESS REPORT
-----------------------
BITS CONTENTS/FLD TAG DESCRIPTOR TEST PROGRAM REFER
------- REF ------ ---------------------- ------- ENCE ----- ----- -----
------------ -----
I:001/00 422-I/O-002 HS101 OPEN FLOW VALVE FV-101 RD BIT P2/17
I:001/01 422-I/O-002 HS101 CLOSE FLOW VALVE FV- RD BIT P2/18
101
I:001/02 422-I/O-002 XSH101 FLOW VALVE FV-101 OPEN RD BIT P2/17 P2/19 P3/2 P3/21
(WIRED NC) P4/1
I:001/03 422-I/O-002 XSL101 FLOW VALVE FV-101 RD BIT P2/18 P2/20 P2/25 P2/72
CLOSED (WIRED NC) P3/4 P4/0
I:001/04 422-I/O-002 HS102 OPEN FLOW VALVE FV-102 RD BIT P2/23
I:001/05 422-I/O-002 HS102 CLOSE FLOW VALVE FV- RD BIT P2/24
102
I:001/06 422-I/O-002 XSH102 FLOW VALVE FV-102 OPEN RD BIT P2/23 P2/25 P3/6 P3/21
P4/3
I:001/07 422-I/O-002 XSL102 FLOW VALVE FV-102 RD BIT P2/24 P2/26 P3/8 P4/2
CLOSED
I:001/10 422-I/O-002 HS103 OPEN FLOW VALVE FV-103 RD BIT P2/39
I:001/11 422-I/O-002 HS103 CLOSE FLOW VALVE FV- RD BIT P2/40
103
I:001/12 422-I/O-002 XSH103 FLOW VALVE FV-103 OPEN RD BIT P2/39 P2/41 P2/47 P2/57
P2/93 P4/5
I:001/13 422-I/O-002 XSL103 FLOW VALVE FV-103 RD BIT P2/40 P2/42 P2/48 P2/59
CLOSED P2/60 P2/64 P2/66 P2/67
P2/92 P2/94 P4/4
I:001/14 422-I/O-002 HS104 OPEN FLOW VALVE FV-104 RD BIT P2/45
I:001/15 422-I/O-002 HS104 CLOSE FLOW VALVE FV- RD BIT P2/46 P2/99
104
I:001/16 422-I/O-002 HS116 ANNUNCIATOR RESET RD BIT P6/3 P6/5 P6/7 P6/9
P6/11 P6/13 P6/17 P6/19
P6/21 P6/23
I:001/17 422-I/O-002 HS117 ANNUNCIATOR RD BIT P6/5 P6/9 P6/13 P6/19
ACKNOWLEDGE P6/23 P6/27
I:002/00 422-I/O-002 XSH104 FLOW VALVE FV-104 OPEN RD BIT P2/45 P2/47 P2/53 P2/57
P2/93 P4/7
I:002/01 422-I/O-002 XSL104 FLOW VALVE FV-104 RD BIT P2/46 P2/48 P2/59 P2/60
CLOSED P2/64 P2/66 P2/67 P2/94
P4/6

Figure 47. Address Report

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Narrative Describing Operational Sequence

A narrative is supplementary information used to describe the

operation of a specific rung or group of rungs. The narrative
uses more detail.

Four rungs from the PLC simulator program are shown in Figure
48. The narrative explaining the operation of the four rungs
follows Figure 48.

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Mode:operate F10=Menu P3/12

> \TD5\PLC5\B&W2
| |
| |
| MS350 STORAGE TANK |
| PRODUCT VALVE CLOCK PRODUCT A BATCH CYCLE TK-214 LEVEL |
|TRANSFER PUMP PULSE SIGNAL LEVEL AUTO START SIMULATION |
| P106 STATUS (.3 SECOND) SIMULATION LATCH 0-25 % |
| I:020 T004:000 C005:000 B003 +- CTU ----+ |
+-----] [----------] [-----------]/[------------] [------------| C005:000 +(CU)|
| 14 DN DN 48 || PR 25 | |
| || AC 25 +(DN)|
| |+----------+ |
| | |
| | |
| |STORAGE TANK |
| |TK-214 LEVEL |
| | SIMULATION |
| | 0-100 % |
| |+- CTU ----+ |
| +| C005:002 +(CU)|
| | PR 0 | |
| | AC 0 +(DN)|
| +----------+ |
| |
|PROD. LOADING PULSE SIGNAL TANK TK-214 SIMULATION |
|PUMP RUNNING (.3 SECOND) EMPTY 0-100 % |
| I:020 T004:000 B003 +- CTD ----+ |
+-----] [----------] [------------]/[--------------------------| C005:002 +(CD)|
| 16 DN 32 | PR 0 | |
| | AC 0 +(DN)|
| +----------+ |
| |
| |
| STORAGE TANK |
| BATCH CYCLE TK-214 LEVEL |
| AUTO START SIMULATION |
| LATCH 0-25 % |
| B003 B003 C005:000 |
+-----] [----------[ONS]---------------------------------------------(RES)-----|
| 48 242 |
| |
| |
| |
| |
| PERMIT TO RUN|
| UNLOADING |
| PUMP |
| (TK-214>25%) |
|+- GEQ ------------+ B003 |
+| A > = B +--------------------------------------------------( )-----|
|| A: C005:002.ACC | 135 |
|| 0 | |
|| B: 25 | |
|| | |
|+------------------+ |
| |
| |
| |

Figure 48. Sample Narrative for Four (4) Rungs

in the Simulation Program

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Narrative For
Simulation
Program
The four rungs shown in Figure 48 are used to simulate the
filling of tank TK-214 during the operation of the process. The
accumulated value of counter C5:2 is used to represent tank
TK-214 level, scaled to 0-100 per cent.

The first rung contains the control logic for incrementing the
counter, thus simulating the filling of the tank. When the batch
system is started (B3/48) is set True. Then, when the transfer
pump P-106 is started and input instruction I:020/14 is set True.
The counter is then incremented at the rate determined my
timer t4:0 (not shown). The timer flag, T4:0.DN is set True each
0.3 second so that the counter accumulated value will increment
by 1 each timer interval of 0.3 seconds or 3.33 counts each
second. The counter is incremented to a maximum value of
100 representing a tank level of 100 %.

The second rung contains the control logic for controlling the
tank level when the product loading pump is running. When the
product loading pump is running, the level in the tank is reduced
by one count or 1 per cent every 0.3 seconds.

The last rung is used as a permissive for running the unloading

pump. When the system is in the automatic mode, the product
loading pump is allowed to run only when the tank level is
greater than or equal to 25%.

The narrative is inserted into the PLC ladder printout close to

the described ladder program.

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WORK AID 1: RESOURCES USED FOR GENERATING BINARY

LOGIC DIAGRAMS
1. The process of converting from a ladder diagram to a binary logic diagram
requires inspecting the diagrams and relating the functions as follows:
Series circuit → AND gate
Parallel circuit → OR gate
2. Use the Logic Legend in Figure 54.

LOGIC LEGEND

A F = 1 IF A = 1 AND B = 1 AND C = 1
B AND F
C F=ABC

A
B OR F F = 1 IF A = 1 OR B = 1 OR C = 1
C F=A+B+C

F = 1 IF A = 0
A NOT F
F = 0 IF A = 1

DELAY TIME DELAY TIME

A F DELAY A F DELAY
ON OFF

MEMORY CIRCUIT
A S F F = 1 IF A = 1 AND B = 0 THE OUTPUT
REMAINS SET AFTER A =0
B F' F = 0 IF B = 1
R F' = 1 IF F = 0
F' = 0 IF F = 1
S = SET OUTPUT F
R = RESET OUTPUT F

Figure 49. Logic Legend

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Programmable Logic Controller

WORK AID 2: RESOURCES USED FOR GENERATING RELAY

LADDER DIAGRAMS
1. The process of converting from a logic diagram to a ladder diagram
requires inspecting the diagrams and relating the functions as follows:
AND gate → Series circuit
OR gate → Parallel circuit
2. Use the Electrical Symbols legend in Figure 55:

Electrical Symbols

Push Button N.O. Push Button N.C.

(Spring Return) (Spring Return)

Pressure Switch Pressure Switch

Closes On Opens On High
Rising Pressure Pressure

Annunciator Flow Switch

Opens On Low
Flow
Limit Switch Limit Switch
Normally Closed Normally Open

Temp. Switch XX Relay Coil

Open On CR=Control Relay
High Temp. MS=Motor Starter

N.O. Contact N.C. Contact

Level Switch Level Switch

Closes On Opens On
Rising Level High Level

Light Indicating
R R=Red Solenoid Valve
G=Green
A=Amber
W=White

Figure 50. Electrical Symbols Legend

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WORK AID 3: RESOURCES USED TO GENERATE PLC LADDER

PROGRAMS

Ladder Diagram Format

Rung: Power is provided from left to right (L1-L2).

No reverse power flow.

Sort the Actions to be taken from the conditions to be examined.

Select the appropriate input instruction for each condition and the
appropriate output instruction for each action.

Rung Logic: Arrange input conditions on the left side of the rung.

Arrange output instructions on the right side of the rung.

Label each instruction with the name of the device it examines or

controls.

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WORK AID 4: RESOURCES USED FOR ENTERING AND TESTING A

PLC LADDER LOGIC PROGRAM

Work Aid 4A: Procedural Steps To Enter And Test The Program

1. Load the Topdoc program.

2. Create a new program file with the name “Lab 4”. Configure the program
for a PLC-2/20, station address 3, and 3 I/O racks.

3. Enter the Edit mode.

4. Enter the Insert mode.

5. Enter the instructions shown in Figure 52.

6. After the instructions are entered assemble the rung.

7. Add the element descriptors.

8. Test the completed program using the Emulation mode.

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Work Aid 4B: Addendum - Topdoc Program Development and

Documentation

Work Aid 4C: Handout - PLC-5 Programming Software: Instruction

Set Reference

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WORK AID 5: PROCEDURES FOR GENERATING PROGRAM

DOCUMENTATION

The Participant will use the Addendum: Topdoc Program Development and
Documentation: Section - Generating Reports (Pages TD-5 to TD-25)

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GLOSSARY

address 1) An alphanumeric value that uniquely identifies

where data is stored. 2) An alphanumeric value
used to identify a specific I/O rack, module group,
and terminal.

AND A Boolean operation that yields a logic “1” output if

all inputs are “1,” and a logic “0” if any input is “0.”

AND gate A logic device requiring all its inputs to be satisfied

before activating its output.

application program The set of instructions written by the User for

control, data acquisition, or report generation. This
software is stored in the application memory.

binary word A related grouping of ones and zeros having coded

meaning assigned by position, or as a group, has
some numerical value. A 10010010 is an eight bit
binary word, in which each bit could have coded
significance or as a group represent the number
146 in decimal.

bit One binary digit. The smallest unit of binary

information (Abbreviation of Binary digIT). A bit can
have a value of “1” or “0”.

bit storage A user defined data table area in which bits can be
set or reset without directly affecting or controlling
output devices. However, any storage bit can be
monitored as necessary in the user program.

communication module Allows the user to connect the PLC to high-speed

local networks that may differ from the network
communication provided with the PLC.

cathode ray tube A vacuum tube with an integral viewing screen.

CRT Cathode Ray Tube

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cursor An illuminated position indicator on the display of

the programming device. The cursor indicates
where the next character or instruction will be
located.

data files The area of processor memory in which are stored

status and data values that can be accessed by the
ladder logic program.

discrete control A process that allows inputs and outputs to be in

only one or the other two states, for example, off or
on.

display A device that provides information in a visual form,

such as on a CRT. See monitor.

Exclusive OR gate A logic device requiring one or the other but not
both of its inputs to be satisfied before activating its
output.

firmware A semi conductor memory device that contains

computer instructions and data as a read-only
instructions and data.

industrial terminal The device used to enter and monitor the program
in a PLC.

instruction A statement that represents a specific PLC

operation. An instruction includes an operation
code and an address.

JIC (Joint International Standards used in drafting relay logic.

Congress) standards

monitor A device used to display program instructions and

process information. See: display

motor starter A special relay designed to provide power to

motors; has both a contactor relay and an overload
relay connected in series an prewired so that if the
overload operates, the contactor is deenergized.

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NOR A logical operation that yields a logic “1” output if all

inputs are “0” and a logic “0” output if any input is
“1.” The negated OR function. Result of negating
the output of an OR gate, by following it with a NOT
symbol.

NOT A logical operation that yields a logic “1” at the

output with a logic “0” at the input, and a logic “0” at
the output with a logic “1” at the input. The NOT is
also called the inverter function.

off-line programming The ability to write program and store it in the

personal computer without being connected to a
PLC.

on-line programming Entering program directly into a PLC.

op code (opcode) See: operation code

operand A variable, constant, or function upon which an

operation is to be performed. For example, in the
expression A = B + 3, B and 3 are the operands.

operating system A collection of software, firmware, and hardware

elements that control the execution of computer
programs and provide such services as computer
resource allocation, job control, input/output control,
and file management in a PLC system.

operation In computer arithmetic, the action specified by an

operator on one or more operands. For example, in
the expression A = B + 3, the process of adding 3 to
B to obtain A.

operation code A character or set of characters that specifies a

CPU operation; for example, the code XIC is used
to designate the operation “examine if closed.”

OR A logic operation that yields a logic 1 if any 1 or

more of the inputs to the OR circuit is a logic 1. The
output of the OR function is a logic 0 if all of the
inputs to the OR circuit are a logic 0.

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OR gate A logic device requiring one or the other or both of

its inputs to be satisfied before activating its output.

output (1) Pertaining to data transmitted to an external

destination. (2) Pertaining to a device, process, or
channel involved in transmitting data to an external
destination. (3) To transmit data to an external
destination. (4) Output data.

program files The area of processor memory where the ladder

logic programming stored.

register A collection of memory cells used for temporary

storage of binary information.

status The present state of a device. For a digital device,

the status is OPEN or CLOSED.

task A set of instructions treated as a basic unit of work.

truth table A table listing that shows the logic states for an
output device for all possible combinations of logic
states for the input devices.

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ADDENDUM: TOPDOC PROGRAM DEVELOPMENT AND

DOCUMENTATION

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