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DC 03
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Logic Gates
Logic gates are physical devices which implement simple Boolean functions.
Some of the simple gates:
ANSI/IEEE-1973 ANSI/IEEE-1984 Truth Table:
X Y
BUFFER Y=X X Y X 1 Y 0 0
1 1
X Y
INVERTER (NOT)
X Y X 1 Y 0 1
1 0
X Y Z
X X 0 0 0
AND Z=X•Y
Y
Z
Y
& Z 0 1 0
1 0 0
1 1 1
X Y Z
X X 0 0 0
OR Z=X+Y
Y
Z
Y
≥1 Z 0 1 1
1 0 1
1 1 1
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Digital Circuits
X Y Z
X X 0 0 1
NOR Y
Z
Y
≥1 Z 0 1 0
1 0 0
(NOT OR) 1 1 0
X Y Z
X
X 0 0 0
XOR (Difference) ⊕ Z Y
=1 Z
0 1 1
Y
1 0 1
1 1 0
X X Y Z
X =1 Z 0 0 1
XNOR (Equality) ⊙ Z
Y Y 0 1 0
1 0 0
1 1 1
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Digital Circuits
Integrated Circuits – IC
Logic gates are manufactured in integrated circuit (IC) (chip) form.
Often, a large number of mixed logic gates are packaged in a single integrated circuit.
For example, a ULSI (Ultra large-scale integration) chip can include more than
100,000 gates.
ICs themselves come in different types of packages.
Dual in-line Package (DIP) ICs
pin 1 pin 20
pin 1 pin 14
pin 8 pin 11
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Digital Circuits
You can find necessary information about ICs in their datasheet catalogs.
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Digital Circuits
Digital Circuits
ABC
A A
NOT gates can also be used where necessary.
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Example: Implementation of a Boolean Function represented (given) by truth table
A B C F
0 0 0 0
0 0 1 1 F(A, B, C)= Σm(1,3,5,6,7) 1. canonical form
0 1 0 0 = A'B'C + A'BC + AB'C + ABC' + ABC = F1
0 1 1 1 = AB+C = F2 (minimized)
1 0 0 0 F(A, B, C)= ΠM(0,2,4) 2. canonical form
1 0 1 1
1 1 0 1 = (A + B + C) (A + B' + C) (A' + B + C) = F3
1 1 1 1 = (A + C) (B + C) = F4 (minimized)
A
F1 = F2 = F3 = F4
B
F1 1. canonical form (SOP)
C
F2 minimized (SOP)
F3
2. canonical form (POS)
minimized (POS)
F4
Example:
Z = A' • B' • (C + D) = (A' • (B' • (C + D))) (Associative Law)
A A Z
B Z ≡ B
B'(C+D)
C
D C
D C+D
3-input gate
Only 2-input gates
• Reduction of logic equations is still necessary to fit the equations into a small
number of ICs.
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Digital Circuits
≡
X · X
· Y
Digital Circuits
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Digital Circuits
NAND NOR
x' = x | x x' = x ↓ x
NOT: = (x·x)' = (x+x)' x x'
x x'
= x' = x'
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Digital Circuits
1. ≡ 3. ≡
2. ≡ 4. ≡
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Example: Z = (A • B) + (C • D)
A A
B B
C
Z ≡ C
Z
D D
NAND (See. 3.12)
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Digital Circuits
Example (cont’d):
Solution using algebraic conversion:
Expression is inverted twice. (Z')' = Z (Involution)
Z = (A • B) + (C • D) (SOP form)
= [( (A • B) + (C • D) )' ]'
= [(A • B)' • (C • D)' ]' (De Morgan)
= (A | B) | (C | D) (only NAND gates)
Algebraic verification:
A A
B
? B
Z Z
C ≡ C
D D
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Digital Circuits
Example (cont’d):
Solution 1:
3. Implementation with 2-input NAND gates
A B C D
Solution 2:
Manipulating the original expression to obtain a simpler circuit
Z= ABC + ACD = A(BC + CD)
A B C D The circuit in solution 2 is
cheaper to implement than
Z
the circuit in solution 1.
Therefore, solution 2 is
preferable to solution 1.
(BC + CD)
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Digital Circuits
B B
Z Z
C C
D D
Remember: We can
implement NOT gates x x'
using NOR gates.
(a')' = a (Involution)
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Digital Circuits
Example: Z = (A + B) • (C + D)
A A
B B
C
Z ≡ C
Z
D D
A
B NOR (See. 3.12 -1)
Z
C
D
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A A
B B
Z Z
C C
D D
NAND
Remember: We can x x'
implement NOT gates
using NAND gates.
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