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    Lab 4

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    triet.truong2405

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    Lab 4

    Uploaded by

    triet.truong2405
    3 views8 pages

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    Copyright:

    © All Rights Reserved
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    Download as docx, pdf, or txt
    3 views8 pages

    Lab 4

    Uploaded by

    triet.truong2405

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    of 8

    2.3.

    1)Design and simulate a Full Adder built from Half Adders in


    Logisim
    1. Half adder
    Half adder is a combinational arithmetic circuit that adds two 1-bit numbers and
    produces a sum bit (S) and a carry bit (C) as the output.

    2. Full adder
    Full adder is a combinational arithmetic circuit that performs an addition operation on
    three 1-bit binary numbers and generates a sum bit (S) and a carry bit (C) as the
    output.

    3. Design a Full Adder built from Half Adders


    In many ways, the full adder can be thought of as two half adders connected together

    Truth table
    Cin B A Sum Cout
    0 0 0 0 0
    0 0 1 1 0
    0 1 0 1 0
    0 1 1 0 1
    1 0 0 1 0
    1 0 1 0 1
    1 1 0 0 1
    1 1 1 1 1
    2.3.2 Design, simulate and implement a 4-bit Ripple Carry Adder using
    IC 7483
    1. 4-bit ripple carry adder
    A 4-bit Ripple Carry Adder is a digital circuit designed to perform the addition of
    two 4-bit binary numbers. It utilizes multiple Full Adders to add pairs of bits
    sequentially, from the least significant bit to the most significant bit.
    Structure
    Input
    Two 4-bit binary numbers: A3 A2 A1 A0 and B3 B2 B1 B0.
    A carry input (C0), usually initialized to 0.
    Output
    A 4-bit binary sum: S3 S2 S1 S0, representing the result of the addition.
    A carry-out (C4), indicating whether there was an overflow in the addition.
    2. IC 7483
    IC 7483 is a 4-bit binary full adder integrated circuit (IC) that can add two 4-bit
    binary numbers together and produce a 4-bit sum along with a carry-out.

    Logic symbol and pin diagram of IC 7483


    3. Design
    Components Required
     IC 7483
     4-bit input sources
     Leds
    2.3.3 Design, simulate and implement a MOD-10 Asynchronous UP
    Counter using J-K Flipflops (IC 7473)
    DESIGN
    - The counter circuit is an asynchronous counting circuit from 0 to 9.Using J-K FF
    active circuit up, the output signal is taken from the Q signal of the FF;connect Q’ of
    the previous FF with the input CLK signal of the following FF.
    - The counter circuit has 10 states,so the numbers of FFs needed is at least 4.
    TRUTH TABLE
    Reset QD QC QB QA
    0 0 0 0 0
    0 0 0 0 1
    0 0 0 1 0
    0 0 0 1 1
    0 0 1 0 0
    0 0 1 0 1
    0 0 1 1 0
    0 0 1 1 1
    0 1 0 0 0
    0 1 0 0 1
    1 1 0 1 0

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